xref: /linux/Documentation/devicetree/bindings/arm/atmel-sysregs.txt (revision 7a012a692e7cfbca245d195a80f23634d3d74fcc)
1Atmel system registers
2
3Chipid required properties:
4- compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipid"
5			"microchip,sama7d65-chipid"
6- reg : Should contain registers location and length
7
8PIT Timer required properties:
9- compatible: Should be "atmel,at91sam9260-pit"
10- reg: Should contain registers location and length
11- interrupts: Should contain interrupt for the PIT which is the IRQ line
12  shared across all System Controller members.
13
14PIT64B Timer required properties:
15- compatible: Should be "microchip,sam9x60-pit64b" or
16			"microchip,sam9x7-pit64b", "microchip,sam9x60-pit64b"
17			"microchip,sama7d65-pit64b", "microchip,sam9x60-pit64b"
18- reg: Should contain registers location and length
19- interrupts: Should contain interrupt for PIT64B timer
20- clocks: Should contain the available clock sources for PIT64B timer.
21
22System Timer (ST) required properties:
23- compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
24- reg: Should contain registers location and length
25- interrupts: Should contain interrupt for the ST which is the IRQ line
26  shared across all System Controller members.
27- clocks: phandle to input clock.
28Its subnodes can be:
29- watchdog: compatible should be "atmel,at91rm9200-wdt"
30
31RAMC SDRAM/DDR Controller required properties:
32- compatible: Should be "atmel,at91rm9200-sdramc", "syscon" or
33			"atmel,at91sam9260-sdramc" or
34			"atmel,at91sam9g45-ddramc" or
35			"atmel,sama5d3-ddramc" or
36			"microchip,sam9x60-ddramc" or
37			"microchip,sama7g5-uddrc" or
38			"microchip,sama7d65-uddrc", "microchip,sama7g5-uddrc" or
39			"microchip,sam9x7-ddramc", "atmel,sama5d3-ddramc".
40- reg: Should contain registers location and length
41
42Examples:
43
44	ramc0: ramc@ffffe800 {
45		compatible = "atmel,at91sam9g45-ddramc";
46		reg = <0xffffe800 0x200>;
47	};
48
49Security Module (SECUMOD)
50
51The Security Module macrocell provides all necessary secure functions to avoid
52voltage, temperature, frequency and mechanical attacks on the chip. It also
53embeds secure memories that can be scrambled.
54
55The Security Module also offers the PIOBU pins which can be used as GPIO pins.
56Note that they maintain their voltage during Backup/Self-refresh.
57
58required properties:
59- compatible: Should be "atmel,<chip>-secumod", "syscon".
60  <chip> can be "sama5d2".
61- reg: Should contain registers location and length
62- gpio-controller:	Marks the port as GPIO controller.
63- #gpio-cells:		There are 2. The pin number is the
64			first, the second represents additional
65			parameters such as GPIO_ACTIVE_HIGH/LOW.
66
67
68	secumod@fc040000 {
69		compatible = "atmel,sama5d2-secumod", "syscon";
70		reg = <0xfc040000 0x100>;
71		gpio-controller;
72		#gpio-cells = <2>;
73	};
74