1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/arm/arm,coresight-etb10.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Arm CoreSight Embedded Trace Buffer 8 9maintainers: 10 - Mathieu Poirier <mathieu.poirier@linaro.org> 11 - Mike Leach <mike.leach@linaro.org> 12 - Leo Yan <leo.yan@linaro.org> 13 - Suzuki K Poulose <suzuki.poulose@arm.com> 14 15description: | 16 CoreSight components are compliant with the ARM CoreSight architecture 17 specification and can be connected in various topologies to suit a particular 18 SoCs tracing needs. These trace components can generally be classified as 19 sinks, links and sources. Trace data produced by one or more sources flows 20 through the intermediate links connecting the source to the currently selected 21 sink. 22 23 The CoreSight Embedded Trace Buffer stores traces in a dedicated SRAM that is 24 used as a circular buffer. 25 26# Need a custom select here or 'arm,primecell' will match on lots of nodes 27select: 28 properties: 29 compatible: 30 contains: 31 const: arm,coresight-etb10 32 required: 33 - compatible 34 35allOf: 36 - $ref: /schemas/arm/primecell.yaml# 37 38properties: 39 compatible: 40 items: 41 - const: arm,coresight-etb10 42 - const: arm,primecell 43 44 reg: 45 maxItems: 1 46 47 clocks: 48 minItems: 1 49 maxItems: 2 50 51 clock-names: 52 minItems: 1 53 items: 54 - const: apb_pclk 55 - const: atclk 56 57 label: 58 description: 59 Description of a coresight device. 60 61 power-domains: 62 maxItems: 1 63 64 in-ports: 65 $ref: /schemas/graph.yaml#/properties/ports 66 additionalProperties: false 67 68 properties: 69 port: 70 description: Input connection from CoreSight Trace bus. 71 $ref: /schemas/graph.yaml#/properties/port 72 73required: 74 - compatible 75 - reg 76 - clocks 77 - clock-names 78 - in-ports 79 80unevaluatedProperties: false 81 82examples: 83 - | 84 etb@20010000 { 85 compatible = "arm,coresight-etb10", "arm,primecell"; 86 reg = <0x20010000 0x1000>; 87 88 clocks = <&oscclk6a>; 89 clock-names = "apb_pclk"; 90 in-ports { 91 port { 92 etb_in_port: endpoint { 93 remote-endpoint = <&replicator_out_port0>; 94 }; 95 }; 96 }; 97 }; 98 99... 100