xref: /linux/Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml (revision db4a3f0fbedb0398f77b9047e8b8bb2b49f355bb)
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/arm/arm,coresight-dummy-sink.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: ARM Coresight Dummy sink component
8
9description: |
10  CoreSight components are compliant with the ARM CoreSight architecture
11  specification and can be connected in various topologies to suit a particular
12  SoCs tracing needs. These trace components can generally be classified as
13  sinks, links and sources. Trace data produced by one or more sources flows
14  through the intermediate links connecting the source to the currently selected
15  sink.
16
17  The Coresight dummy sink component is for the specific coresight sink devices
18  kernel don't have permission to access or configure, e.g., CoreSight EUD on
19  Qualcomm platforms. It is a mini-USB hub implemented to support the USB-based
20  debug and trace capabilities. For this device, a dummy driver is needed to
21  register it as Coresight sink device in kernel side, so that path can be
22  created in the driver. Then the trace flow would be transferred to EUD via
23  coresight link of AP processor. It provides Coresight API for operations on
24  dummy source devices, such as enabling and disabling them. It also provides
25  the Coresight dummy source paths for debugging.
26
27  The primary use case of the coresight dummy sink is to build path in kernel
28  side for dummy sink component.
29
30maintainers:
31  - Mike Leach <mike.leach@linaro.org>
32  - Suzuki K Poulose <suzuki.poulose@arm.com>
33  - James Clark <james.clark@linaro.org>
34  - Mao Jinlong <quic_jinlmao@quicinc.com>
35  - Hao Zhang <quic_hazha@quicinc.com>
36
37properties:
38  compatible:
39    enum:
40      - arm,coresight-dummy-sink
41
42  label:
43    description:
44      Description of a coresight device.
45
46  in-ports:
47    $ref: /schemas/graph.yaml#/properties/ports
48
49    properties:
50      port:
51        description: Input connection from the Coresight Trace bus to
52          dummy sink, such as Embedded USB debugger(EUD).
53
54        $ref: /schemas/graph.yaml#/properties/port
55
56required:
57  - compatible
58  - in-ports
59
60additionalProperties: false
61
62examples:
63  # Minimum dummy sink definition. Dummy sink connect to coresight replicator.
64  - |
65    sink {
66      compatible = "arm,coresight-dummy-sink";
67
68      in-ports {
69        port {
70          eud_in_replicator_swao: endpoint {
71            remote-endpoint = <&replicator_swao_out_eud>;
72          };
73        };
74      };
75    };
76
77...
78