xref: /linux/Documentation/core-api/irq/irq-affinity.rst (revision 4b4193256c8d3bc3a5397b5cd9494c2ad386317d)
1*e00b0ab8SMauro Carvalho Chehab================
2*e00b0ab8SMauro Carvalho ChehabSMP IRQ affinity
3*e00b0ab8SMauro Carvalho Chehab================
4*e00b0ab8SMauro Carvalho Chehab
5*e00b0ab8SMauro Carvalho ChehabChangeLog:
6*e00b0ab8SMauro Carvalho Chehab	- Started by Ingo Molnar <mingo@redhat.com>
7*e00b0ab8SMauro Carvalho Chehab	- Update by Max Krasnyansky <maxk@qualcomm.com>
8*e00b0ab8SMauro Carvalho Chehab
9*e00b0ab8SMauro Carvalho Chehab
10*e00b0ab8SMauro Carvalho Chehab/proc/irq/IRQ#/smp_affinity and /proc/irq/IRQ#/smp_affinity_list specify
11*e00b0ab8SMauro Carvalho Chehabwhich target CPUs are permitted for a given IRQ source.  It's a bitmask
12*e00b0ab8SMauro Carvalho Chehab(smp_affinity) or cpu list (smp_affinity_list) of allowed CPUs.  It's not
13*e00b0ab8SMauro Carvalho Chehaballowed to turn off all CPUs, and if an IRQ controller does not support
14*e00b0ab8SMauro Carvalho ChehabIRQ affinity then the value will not change from the default of all cpus.
15*e00b0ab8SMauro Carvalho Chehab
16*e00b0ab8SMauro Carvalho Chehab/proc/irq/default_smp_affinity specifies default affinity mask that applies
17*e00b0ab8SMauro Carvalho Chehabto all non-active IRQs. Once IRQ is allocated/activated its affinity bitmask
18*e00b0ab8SMauro Carvalho Chehabwill be set to the default mask. It can then be changed as described above.
19*e00b0ab8SMauro Carvalho ChehabDefault mask is 0xffffffff.
20*e00b0ab8SMauro Carvalho Chehab
21*e00b0ab8SMauro Carvalho ChehabHere is an example of restricting IRQ44 (eth1) to CPU0-3 then restricting
22*e00b0ab8SMauro Carvalho Chehabit to CPU4-7 (this is an 8-CPU SMP box)::
23*e00b0ab8SMauro Carvalho Chehab
24*e00b0ab8SMauro Carvalho Chehab	[root@moon 44]# cd /proc/irq/44
25*e00b0ab8SMauro Carvalho Chehab	[root@moon 44]# cat smp_affinity
26*e00b0ab8SMauro Carvalho Chehab	ffffffff
27*e00b0ab8SMauro Carvalho Chehab
28*e00b0ab8SMauro Carvalho Chehab	[root@moon 44]# echo 0f > smp_affinity
29*e00b0ab8SMauro Carvalho Chehab	[root@moon 44]# cat smp_affinity
30*e00b0ab8SMauro Carvalho Chehab	0000000f
31*e00b0ab8SMauro Carvalho Chehab	[root@moon 44]# ping -f h
32*e00b0ab8SMauro Carvalho Chehab	PING hell (195.4.7.3): 56 data bytes
33*e00b0ab8SMauro Carvalho Chehab	...
34*e00b0ab8SMauro Carvalho Chehab	--- hell ping statistics ---
35*e00b0ab8SMauro Carvalho Chehab	6029 packets transmitted, 6027 packets received, 0% packet loss
36*e00b0ab8SMauro Carvalho Chehab	round-trip min/avg/max = 0.1/0.1/0.4 ms
37*e00b0ab8SMauro Carvalho Chehab	[root@moon 44]# cat /proc/interrupts | grep 'CPU\|44:'
38*e00b0ab8SMauro Carvalho Chehab		CPU0       CPU1       CPU2       CPU3      CPU4       CPU5        CPU6       CPU7
39*e00b0ab8SMauro Carvalho Chehab	44:       1068       1785       1785       1783         0          0           0         0    IO-APIC-level  eth1
40*e00b0ab8SMauro Carvalho Chehab
41*e00b0ab8SMauro Carvalho ChehabAs can be seen from the line above IRQ44 was delivered only to the first four
42*e00b0ab8SMauro Carvalho Chehabprocessors (0-3).
43*e00b0ab8SMauro Carvalho ChehabNow lets restrict that IRQ to CPU(4-7).
44*e00b0ab8SMauro Carvalho Chehab
45*e00b0ab8SMauro Carvalho Chehab::
46*e00b0ab8SMauro Carvalho Chehab
47*e00b0ab8SMauro Carvalho Chehab	[root@moon 44]# echo f0 > smp_affinity
48*e00b0ab8SMauro Carvalho Chehab	[root@moon 44]# cat smp_affinity
49*e00b0ab8SMauro Carvalho Chehab	000000f0
50*e00b0ab8SMauro Carvalho Chehab	[root@moon 44]# ping -f h
51*e00b0ab8SMauro Carvalho Chehab	PING hell (195.4.7.3): 56 data bytes
52*e00b0ab8SMauro Carvalho Chehab	..
53*e00b0ab8SMauro Carvalho Chehab	--- hell ping statistics ---
54*e00b0ab8SMauro Carvalho Chehab	2779 packets transmitted, 2777 packets received, 0% packet loss
55*e00b0ab8SMauro Carvalho Chehab	round-trip min/avg/max = 0.1/0.5/585.4 ms
56*e00b0ab8SMauro Carvalho Chehab	[root@moon 44]# cat /proc/interrupts |  'CPU\|44:'
57*e00b0ab8SMauro Carvalho Chehab		CPU0       CPU1       CPU2       CPU3      CPU4       CPU5        CPU6       CPU7
58*e00b0ab8SMauro Carvalho Chehab	44:       1068       1785       1785       1783      1784       1069        1070       1069   IO-APIC-level  eth1
59*e00b0ab8SMauro Carvalho Chehab
60*e00b0ab8SMauro Carvalho ChehabThis time around IRQ44 was delivered only to the last four processors.
61*e00b0ab8SMauro Carvalho Chehabi.e counters for the CPU0-3 did not change.
62*e00b0ab8SMauro Carvalho Chehab
63*e00b0ab8SMauro Carvalho ChehabHere is an example of limiting that same irq (44) to cpus 1024 to 1031::
64*e00b0ab8SMauro Carvalho Chehab
65*e00b0ab8SMauro Carvalho Chehab	[root@moon 44]# echo 1024-1031 > smp_affinity_list
66*e00b0ab8SMauro Carvalho Chehab	[root@moon 44]# cat smp_affinity_list
67*e00b0ab8SMauro Carvalho Chehab	1024-1031
68*e00b0ab8SMauro Carvalho Chehab
69*e00b0ab8SMauro Carvalho ChehabNote that to do this with a bitmask would require 32 bitmasks of zero
70*e00b0ab8SMauro Carvalho Chehabto follow the pertinent one.
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