1================= 2x86 IOMMU Support 3================= 4 5The architecture specs can be obtained from the vendor websites. 6Search for the following documents to obtain the latest versions: 7 8- Intel: Intel Virtualization Technology for Directed I/O Architecture Specification (ID: D51397) 9- AMD: AMD I/O Virtualization Technology (IOMMU) Specification (ID: 48882) 10 11This guide gives a quick cheat sheet for some basic understanding. 12 13Basic stuff 14----------- 15 16ACPI enumerates and lists the different IOMMUs on the platform, and 17device scope relationships between devices and which IOMMU controls 18them. 19 20Some ACPI Keywords: 21 22- DMAR - Intel DMA Remapping table 23- DRHD - Intel DMA Remapping Hardware Unit Definition 24- RMRR - Intel Reserved Memory Region Reporting Structure 25- IVRS - AMD I/O Virtualization Reporting Structure 26- IVDB - AMD I/O Virtualization Definition Block 27- IVHD - AMD I/O Virtualization Hardware Definition 28 29What is Intel RMRR? 30^^^^^^^^^^^^^^^^^^^ 31 32There are some devices the BIOS controls, for e.g USB devices to perform 33PS2 emulation. The regions of memory used for these devices are marked 34reserved in the e820 map. When we turn on DMA translation, DMA to those 35regions will fail. Hence BIOS uses RMRR to specify these regions along with 36devices that need to access these regions. OS is expected to setup 37unity mappings for these regions for these devices to access these regions. 38 39What is AMD IVRS? 40^^^^^^^^^^^^^^^^^ 41 42The architecture defines an ACPI-compatible data structure called an I/O 43Virtualization Reporting Structure (IVRS) that is used to convey information 44related to I/O virtualization to system software. The IVRS describes the 45configuration and capabilities of the IOMMUs contained in the platform as 46well as information about the devices that each IOMMU virtualizes. 47 48The IVRS provides information about the following: 49 50- IOMMUs present in the platform including their capabilities and proper configuration 51- System I/O topology relevant to each IOMMU 52- Peripheral devices that cannot be otherwise enumerated 53- Memory regions used by SMI/SMM, platform firmware, and platform hardware. These are generally exclusion ranges to be configured by system software. 54 55How is an I/O Virtual Address (IOVA) generated? 56----------------------------------------------- 57 58Well behaved drivers call dma_map_*() calls before sending command to device 59that needs to perform DMA. Once DMA is completed and mapping is no longer 60required, driver performs dma_unmap_*() calls to unmap the region. 61 62Intel Specific Notes 63-------------------- 64 65Graphics Problems? 66^^^^^^^^^^^^^^^^^^ 67 68If you encounter issues with graphics devices, you can try adding 69option intel_iommu=igfx_off to turn off the integrated graphics engine. 70If this fixes anything, please ensure you file a bug reporting the problem. 71 72Some exceptions to IOVA 73^^^^^^^^^^^^^^^^^^^^^^^ 74 75Interrupt ranges are not address translated, (0xfee00000 - 0xfeefffff). 76The same is true for peer to peer transactions. Hence we reserve the 77address from PCI MMIO ranges so they are not allocated for IOVA addresses. 78 79AMD Specific Notes 80------------------ 81 82Graphics Problems? 83^^^^^^^^^^^^^^^^^^ 84 85If you encounter issues with integrated graphics devices, you can try adding 86option iommu=pt to the kernel command line use a 1:1 mapping for the IOMMU. If 87this fixes anything, please ensure you file a bug reporting the problem. 88 89Fault reporting 90--------------- 91When errors are reported, the IOMMU signals via an interrupt. The fault 92reason and device that caused it is printed on the console. 93 94 95Kernel Log Samples 96------------------ 97 98Intel Boot Messages 99^^^^^^^^^^^^^^^^^^^ 100 101Something like this gets printed indicating presence of DMAR tables 102in ACPI: 103 104:: 105 106 ACPI: DMAR (v001 A M I OEMDMAR 0x00000001 MSFT 0x00000097) @ 0x000000007f5b5ef0 107 108When DMAR is being processed and initialized by ACPI, prints DMAR locations 109and any RMRR's processed: 110 111:: 112 113 ACPI DMAR:Host address width 36 114 ACPI DMAR:DRHD (flags: 0x00000000)base: 0x00000000fed90000 115 ACPI DMAR:DRHD (flags: 0x00000000)base: 0x00000000fed91000 116 ACPI DMAR:DRHD (flags: 0x00000001)base: 0x00000000fed93000 117 ACPI DMAR:RMRR base: 0x00000000000ed000 end: 0x00000000000effff 118 ACPI DMAR:RMRR base: 0x000000007f600000 end: 0x000000007fffffff 119 120When DMAR is enabled for use, you will notice: 121 122:: 123 124 PCI-DMA: Using DMAR IOMMU 125 126Intel Fault reporting 127^^^^^^^^^^^^^^^^^^^^^ 128 129:: 130 131 DMAR:[DMA Write] Request device [00:02.0] fault addr 6df084000 132 DMAR:[fault reason 05] PTE Write access is not set 133 DMAR:[DMA Write] Request device [00:02.0] fault addr 6df084000 134 DMAR:[fault reason 05] PTE Write access is not set 135 136AMD Boot Messages 137^^^^^^^^^^^^^^^^^ 138 139Something like this gets printed indicating presence of the IOMMU: 140 141:: 142 143 iommu: Default domain type: Translated 144 iommu: DMA domain TLB invalidation policy: lazy mode 145 146AMD Fault reporting 147^^^^^^^^^^^^^^^^^^^ 148 149:: 150 151 AMD-Vi: Event logged [IO_PAGE_FAULT domain=0x0007 address=0xffffc02000 flags=0x0000] 152 AMD-Vi: Event logged [IO_PAGE_FAULT device=07:00.0 domain=0x0007 address=0xffffc02000 flags=0x0000] 153