1*4f4cfa6cSMauro Carvalho Chehab======================================= 2*4f4cfa6cSMauro Carvalho ChehabReal Time Clock (RTC) Drivers for Linux 3*4f4cfa6cSMauro Carvalho Chehab======================================= 4*4f4cfa6cSMauro Carvalho Chehab 5*4f4cfa6cSMauro Carvalho ChehabWhen Linux developers talk about a "Real Time Clock", they usually mean 6*4f4cfa6cSMauro Carvalho Chehabsomething that tracks wall clock time and is battery backed so that it 7*4f4cfa6cSMauro Carvalho Chehabworks even with system power off. Such clocks will normally not track 8*4f4cfa6cSMauro Carvalho Chehabthe local time zone or daylight savings time -- unless they dual boot 9*4f4cfa6cSMauro Carvalho Chehabwith MS-Windows -- but will instead be set to Coordinated Universal Time 10*4f4cfa6cSMauro Carvalho Chehab(UTC, formerly "Greenwich Mean Time"). 11*4f4cfa6cSMauro Carvalho Chehab 12*4f4cfa6cSMauro Carvalho ChehabThe newest non-PC hardware tends to just count seconds, like the time(2) 13*4f4cfa6cSMauro Carvalho Chehabsystem call reports, but RTCs also very commonly represent time using 14*4f4cfa6cSMauro Carvalho Chehabthe Gregorian calendar and 24 hour time, as reported by gmtime(3). 15*4f4cfa6cSMauro Carvalho Chehab 16*4f4cfa6cSMauro Carvalho ChehabLinux has two largely-compatible userspace RTC API families you may 17*4f4cfa6cSMauro Carvalho Chehabneed to know about: 18*4f4cfa6cSMauro Carvalho Chehab 19*4f4cfa6cSMauro Carvalho Chehab * /dev/rtc ... is the RTC provided by PC compatible systems, 20*4f4cfa6cSMauro Carvalho Chehab so it's not very portable to non-x86 systems. 21*4f4cfa6cSMauro Carvalho Chehab 22*4f4cfa6cSMauro Carvalho Chehab * /dev/rtc0, /dev/rtc1 ... are part of a framework that's 23*4f4cfa6cSMauro Carvalho Chehab supported by a wide variety of RTC chips on all systems. 24*4f4cfa6cSMauro Carvalho Chehab 25*4f4cfa6cSMauro Carvalho ChehabProgrammers need to understand that the PC/AT functionality is not 26*4f4cfa6cSMauro Carvalho Chehabalways available, and some systems can do much more. That is, the 27*4f4cfa6cSMauro Carvalho ChehabRTCs use the same API to make requests in both RTC frameworks (using 28*4f4cfa6cSMauro Carvalho Chehabdifferent filenames of course), but the hardware may not offer the 29*4f4cfa6cSMauro Carvalho Chehabsame functionality. For example, not every RTC is hooked up to an 30*4f4cfa6cSMauro Carvalho ChehabIRQ, so they can't all issue alarms; and where standard PC RTCs can 31*4f4cfa6cSMauro Carvalho Chehabonly issue an alarm up to 24 hours in the future, other hardware may 32*4f4cfa6cSMauro Carvalho Chehabbe able to schedule one any time in the upcoming century. 33*4f4cfa6cSMauro Carvalho Chehab 34*4f4cfa6cSMauro Carvalho Chehab 35*4f4cfa6cSMauro Carvalho ChehabOld PC/AT-Compatible driver: /dev/rtc 36*4f4cfa6cSMauro Carvalho Chehab-------------------------------------- 37*4f4cfa6cSMauro Carvalho Chehab 38*4f4cfa6cSMauro Carvalho ChehabAll PCs (even Alpha machines) have a Real Time Clock built into them. 39*4f4cfa6cSMauro Carvalho ChehabUsually they are built into the chipset of the computer, but some may 40*4f4cfa6cSMauro Carvalho Chehabactually have a Motorola MC146818 (or clone) on the board. This is the 41*4f4cfa6cSMauro Carvalho Chehabclock that keeps the date and time while your computer is turned off. 42*4f4cfa6cSMauro Carvalho Chehab 43*4f4cfa6cSMauro Carvalho ChehabACPI has standardized that MC146818 functionality, and extended it in 44*4f4cfa6cSMauro Carvalho Chehaba few ways (enabling longer alarm periods, and wake-from-hibernate). 45*4f4cfa6cSMauro Carvalho ChehabThat functionality is NOT exposed in the old driver. 46*4f4cfa6cSMauro Carvalho Chehab 47*4f4cfa6cSMauro Carvalho ChehabHowever it can also be used to generate signals from a slow 2Hz to a 48*4f4cfa6cSMauro Carvalho Chehabrelatively fast 8192Hz, in increments of powers of two. These signals 49*4f4cfa6cSMauro Carvalho Chehabare reported by interrupt number 8. (Oh! So *that* is what IRQ 8 is 50*4f4cfa6cSMauro Carvalho Chehabfor...) It can also function as a 24hr alarm, raising IRQ 8 when the 51*4f4cfa6cSMauro Carvalho Chehabalarm goes off. The alarm can also be programmed to only check any 52*4f4cfa6cSMauro Carvalho Chehabsubset of the three programmable values, meaning that it could be set to 53*4f4cfa6cSMauro Carvalho Chehabring on the 30th second of the 30th minute of every hour, for example. 54*4f4cfa6cSMauro Carvalho ChehabThe clock can also be set to generate an interrupt upon every clock 55*4f4cfa6cSMauro Carvalho Chehabupdate, thus generating a 1Hz signal. 56*4f4cfa6cSMauro Carvalho Chehab 57*4f4cfa6cSMauro Carvalho ChehabThe interrupts are reported via /dev/rtc (major 10, minor 135, read only 58*4f4cfa6cSMauro Carvalho Chehabcharacter device) in the form of an unsigned long. The low byte contains 59*4f4cfa6cSMauro Carvalho Chehabthe type of interrupt (update-done, alarm-rang, or periodic) that was 60*4f4cfa6cSMauro Carvalho Chehabraised, and the remaining bytes contain the number of interrupts since 61*4f4cfa6cSMauro Carvalho Chehabthe last read. Status information is reported through the pseudo-file 62*4f4cfa6cSMauro Carvalho Chehab/proc/driver/rtc if the /proc filesystem was enabled. The driver has 63*4f4cfa6cSMauro Carvalho Chehabbuilt in locking so that only one process is allowed to have the /dev/rtc 64*4f4cfa6cSMauro Carvalho Chehabinterface open at a time. 65*4f4cfa6cSMauro Carvalho Chehab 66*4f4cfa6cSMauro Carvalho ChehabA user process can monitor these interrupts by doing a read(2) or a 67*4f4cfa6cSMauro Carvalho Chehabselect(2) on /dev/rtc -- either will block/stop the user process until 68*4f4cfa6cSMauro Carvalho Chehabthe next interrupt is received. This is useful for things like 69*4f4cfa6cSMauro Carvalho Chehabreasonably high frequency data acquisition where one doesn't want to 70*4f4cfa6cSMauro Carvalho Chehabburn up 100% CPU by polling gettimeofday etc. etc. 71*4f4cfa6cSMauro Carvalho Chehab 72*4f4cfa6cSMauro Carvalho ChehabAt high frequencies, or under high loads, the user process should check 73*4f4cfa6cSMauro Carvalho Chehabthe number of interrupts received since the last read to determine if 74*4f4cfa6cSMauro Carvalho Chehabthere has been any interrupt "pileup" so to speak. Just for reference, a 75*4f4cfa6cSMauro Carvalho Chehabtypical 486-33 running a tight read loop on /dev/rtc will start to suffer 76*4f4cfa6cSMauro Carvalho Chehaboccasional interrupt pileup (i.e. > 1 IRQ event since last read) for 77*4f4cfa6cSMauro Carvalho Chehabfrequencies above 1024Hz. So you really should check the high bytes 78*4f4cfa6cSMauro Carvalho Chehabof the value you read, especially at frequencies above that of the 79*4f4cfa6cSMauro Carvalho Chehabnormal timer interrupt, which is 100Hz. 80*4f4cfa6cSMauro Carvalho Chehab 81*4f4cfa6cSMauro Carvalho ChehabProgramming and/or enabling interrupt frequencies greater than 64Hz is 82*4f4cfa6cSMauro Carvalho Chehabonly allowed by root. This is perhaps a bit conservative, but we don't want 83*4f4cfa6cSMauro Carvalho Chehaban evil user generating lots of IRQs on a slow 386sx-16, where it might have 84*4f4cfa6cSMauro Carvalho Chehaba negative impact on performance. This 64Hz limit can be changed by writing 85*4f4cfa6cSMauro Carvalho Chehaba different value to /proc/sys/dev/rtc/max-user-freq. Note that the 86*4f4cfa6cSMauro Carvalho Chehabinterrupt handler is only a few lines of code to minimize any possibility 87*4f4cfa6cSMauro Carvalho Chehabof this effect. 88*4f4cfa6cSMauro Carvalho Chehab 89*4f4cfa6cSMauro Carvalho ChehabAlso, if the kernel time is synchronized with an external source, the 90*4f4cfa6cSMauro Carvalho Chehabkernel will write the time back to the CMOS clock every 11 minutes. In 91*4f4cfa6cSMauro Carvalho Chehabthe process of doing this, the kernel briefly turns off RTC periodic 92*4f4cfa6cSMauro Carvalho Chehabinterrupts, so be aware of this if you are doing serious work. If you 93*4f4cfa6cSMauro Carvalho Chehabdon't synchronize the kernel time with an external source (via ntp or 94*4f4cfa6cSMauro Carvalho Chehabwhatever) then the kernel will keep its hands off the RTC, allowing you 95*4f4cfa6cSMauro Carvalho Chehabexclusive access to the device for your applications. 96*4f4cfa6cSMauro Carvalho Chehab 97*4f4cfa6cSMauro Carvalho ChehabThe alarm and/or interrupt frequency are programmed into the RTC via 98*4f4cfa6cSMauro Carvalho Chehabvarious ioctl(2) calls as listed in ./include/linux/rtc.h 99*4f4cfa6cSMauro Carvalho ChehabRather than write 50 pages describing the ioctl() and so on, it is 100*4f4cfa6cSMauro Carvalho Chehabperhaps more useful to include a small test program that demonstrates 101*4f4cfa6cSMauro Carvalho Chehabhow to use them, and demonstrates the features of the driver. This is 102*4f4cfa6cSMauro Carvalho Chehabprobably a lot more useful to people interested in writing applications 103*4f4cfa6cSMauro Carvalho Chehabthat will be using this driver. See the code at the end of this document. 104*4f4cfa6cSMauro Carvalho Chehab 105*4f4cfa6cSMauro Carvalho Chehab(The original /dev/rtc driver was written by Paul Gortmaker.) 106*4f4cfa6cSMauro Carvalho Chehab 107*4f4cfa6cSMauro Carvalho Chehab 108*4f4cfa6cSMauro Carvalho ChehabNew portable "RTC Class" drivers: /dev/rtcN 109*4f4cfa6cSMauro Carvalho Chehab-------------------------------------------- 110*4f4cfa6cSMauro Carvalho Chehab 111*4f4cfa6cSMauro Carvalho ChehabBecause Linux supports many non-ACPI and non-PC platforms, some of which 112*4f4cfa6cSMauro Carvalho Chehabhave more than one RTC style clock, it needed a more portable solution 113*4f4cfa6cSMauro Carvalho Chehabthan expecting a single battery-backed MC146818 clone on every system. 114*4f4cfa6cSMauro Carvalho ChehabAccordingly, a new "RTC Class" framework has been defined. It offers 115*4f4cfa6cSMauro Carvalho Chehabthree different userspace interfaces: 116*4f4cfa6cSMauro Carvalho Chehab 117*4f4cfa6cSMauro Carvalho Chehab * /dev/rtcN ... much the same as the older /dev/rtc interface 118*4f4cfa6cSMauro Carvalho Chehab 119*4f4cfa6cSMauro Carvalho Chehab * /sys/class/rtc/rtcN ... sysfs attributes support readonly 120*4f4cfa6cSMauro Carvalho Chehab access to some RTC attributes. 121*4f4cfa6cSMauro Carvalho Chehab 122*4f4cfa6cSMauro Carvalho Chehab * /proc/driver/rtc ... the system clock RTC may expose itself 123*4f4cfa6cSMauro Carvalho Chehab using a procfs interface. If there is no RTC for the system clock, 124*4f4cfa6cSMauro Carvalho Chehab rtc0 is used by default. More information is (currently) shown 125*4f4cfa6cSMauro Carvalho Chehab here than through sysfs. 126*4f4cfa6cSMauro Carvalho Chehab 127*4f4cfa6cSMauro Carvalho ChehabThe RTC Class framework supports a wide variety of RTCs, ranging from those 128*4f4cfa6cSMauro Carvalho Chehabintegrated into embeddable system-on-chip (SOC) processors to discrete chips 129*4f4cfa6cSMauro Carvalho Chehabusing I2C, SPI, or some other bus to communicate with the host CPU. There's 130*4f4cfa6cSMauro Carvalho Chehabeven support for PC-style RTCs ... including the features exposed on newer PCs 131*4f4cfa6cSMauro Carvalho Chehabthrough ACPI. 132*4f4cfa6cSMauro Carvalho Chehab 133*4f4cfa6cSMauro Carvalho ChehabThe new framework also removes the "one RTC per system" restriction. For 134*4f4cfa6cSMauro Carvalho Chehabexample, maybe the low-power battery-backed RTC is a discrete I2C chip, but 135*4f4cfa6cSMauro Carvalho Chehaba high functionality RTC is integrated into the SOC. That system might read 136*4f4cfa6cSMauro Carvalho Chehabthe system clock from the discrete RTC, but use the integrated one for all 137*4f4cfa6cSMauro Carvalho Chehabother tasks, because of its greater functionality. 138*4f4cfa6cSMauro Carvalho Chehab 139*4f4cfa6cSMauro Carvalho ChehabCheck out tools/testing/selftests/rtc/rtctest.c for an example usage of the 140*4f4cfa6cSMauro Carvalho Chehabioctl interface. 141