1====================================================== 2HiSilicon SoC uncore Performance Monitoring Unit (PMU) 3====================================================== 4 5The HiSilicon SoC chip includes various independent system device PMUs 6such as L3 cache (L3C), Hydra Home Agent (HHA) and DDRC. These PMUs are 7independent and have hardware logic to gather statistics and performance 8information. 9 10The HiSilicon SoC encapsulates multiple CPU and IO dies. Each CPU cluster 11(CCL) is made up of 4 cpu cores sharing one L3 cache; each CPU die is 12called Super CPU cluster (SCCL) and is made up of 6 CCLs. Each SCCL has 13two HHAs (0 - 1) and four DDRCs (0 - 3), respectively. 14 15HiSilicon SoC uncore PMU driver 16------------------------------- 17 18Each device PMU has separate registers for event counting, control and 19interrupt, and the PMU driver shall register perf PMU drivers like L3C, 20HHA and DDRC etc. The available events and configuration options shall 21be described in the sysfs, see: 22 23/sys/devices/hisi_sccl{X}_<l3c{Y}/hha{Y}/ddrc{Y}>/, or 24/sys/bus/event_source/devices/hisi_sccl{X}_<l3c{Y}/hha{Y}/ddrc{Y}>. 25The "perf list" command shall list the available events from sysfs. 26 27Each L3C, HHA and DDRC is registered as a separate PMU with perf. The PMU 28name will appear in event listing as hisi_sccl<sccl-id>_module<index-id>. 29where "sccl-id" is the identifier of the SCCL and "index-id" is the index of 30module. 31 32e.g. hisi_sccl3_l3c0/rd_hit_cpipe is READ_HIT_CPIPE event of L3C index #0 in 33SCCL ID #3. 34 35e.g. hisi_sccl1_hha0/rx_operations is RX_OPERATIONS event of HHA index #0 in 36SCCL ID #1. 37 38The driver also provides a "cpumask" sysfs attribute, which shows the CPU core 39ID used to count the uncore PMU event. 40 41Example usage of perf:: 42 43 $# perf list 44 hisi_sccl3_l3c0/rd_hit_cpipe/ [kernel PMU event] 45 ------------------------------------------ 46 hisi_sccl3_l3c0/wr_hit_cpipe/ [kernel PMU event] 47 ------------------------------------------ 48 hisi_sccl1_l3c0/rd_hit_cpipe/ [kernel PMU event] 49 ------------------------------------------ 50 hisi_sccl1_l3c0/wr_hit_cpipe/ [kernel PMU event] 51 ------------------------------------------ 52 53 $# perf stat -a -e hisi_sccl3_l3c0/rd_hit_cpipe/ sleep 5 54 $# perf stat -a -e hisi_sccl3_l3c0/config=0x02/ sleep 5 55 56The current driver does not support sampling. So "perf record" is unsupported. 57Also attach to a task is unsupported as the events are all uncore. 58 59Note: Please contact the maintainer for a complete list of events supported for 60the PMU devices in the SoC and its information if needed. 61