1==================================== 2Arm Network-on Chip Interconnect PMU 3==================================== 4 5NI-700 and friends implement a distinct PMU for each clock domain within the 6interconnect. Correspondingly, the driver exposes multiple PMU devices named 7arm_ni_<x>_cd_<y>, where <x> is an (arbitrary) instance identifier and <y> is 8the clock domain ID within that particular instance. If multiple NI instances 9exist within a system, the PMU devices can be correlated with the underlying 10hardware instance via sysfs parentage. 11 12Each PMU exposes base event aliases for the interface types present in its clock 13domain. These require qualifying with the "eventid" and "nodeid" parameters 14to specify the event code to count and the interface at which to count it 15(per the configured hardware ID as reflected in the xxNI_NODE_INFO register). 16The exception is the "cycles" alias for the PMU cycle counter, which is encoded 17with the PMU node type and needs no further qualification. 18