1*1c5e4cf1SMichael Riesch.. SPDX-License-Identifier: GPL-2.0 2*1c5e4cf1SMichael Riesch 3*1c5e4cf1SMichael Riesch========================================= 4*1c5e4cf1SMichael RieschRockchip Camera Interface (CIF) 5*1c5e4cf1SMichael Riesch========================================= 6*1c5e4cf1SMichael Riesch 7*1c5e4cf1SMichael RieschIntroduction 8*1c5e4cf1SMichael Riesch============ 9*1c5e4cf1SMichael Riesch 10*1c5e4cf1SMichael RieschThe Rockchip Camera Interface (CIF) is featured in many Rockchip SoCs in 11*1c5e4cf1SMichael Rieschdifferent variants. 12*1c5e4cf1SMichael RieschThe different variants are combinations of common building blocks, such as 13*1c5e4cf1SMichael Riesch 14*1c5e4cf1SMichael Riesch* INTERFACE blocks of different types, namely 15*1c5e4cf1SMichael Riesch 16*1c5e4cf1SMichael Riesch * the Digital Video Port (DVP, a parallel data interface) 17*1c5e4cf1SMichael Riesch * the interface block for the MIPI CSI-2 receiver 18*1c5e4cf1SMichael Riesch 19*1c5e4cf1SMichael Riesch* CROP units 20*1c5e4cf1SMichael Riesch 21*1c5e4cf1SMichael Riesch* MIPI CSI-2 receiver (not available on all variants): This unit is referred 22*1c5e4cf1SMichael Riesch to as MIPI CSI HOST in the Rockchip documentation. 23*1c5e4cf1SMichael Riesch Technically, it is a separate hardware block, but it is strongly coupled to 24*1c5e4cf1SMichael Riesch the CIF and therefore included here. 25*1c5e4cf1SMichael Riesch 26*1c5e4cf1SMichael Riesch* MUX units (not available on all variants) that pass the video data to an 27*1c5e4cf1SMichael Riesch image signal processor (ISP) 28*1c5e4cf1SMichael Riesch 29*1c5e4cf1SMichael Riesch* SCALE units (not available on all variants) 30*1c5e4cf1SMichael Riesch 31*1c5e4cf1SMichael Riesch* DMA engines that transfer video data into system memory using a 32*1c5e4cf1SMichael Riesch double-buffering mechanism called ping-pong mode 33*1c5e4cf1SMichael Riesch 34*1c5e4cf1SMichael Riesch* Support for four streams per INTERFACE block (not available on all 35*1c5e4cf1SMichael Riesch variants), e.g., for MIPI CSI-2 Virtual Channels (VCs) 36*1c5e4cf1SMichael Riesch 37*1c5e4cf1SMichael RieschThis document describes the different variants of the CIF, their hardware 38*1c5e4cf1SMichael Rieschlayout, as well as their representation in the media controller centric rkcif 39*1c5e4cf1SMichael Rieschdevice driver, which is located under drivers/media/platform/rockchip/rkcif. 40*1c5e4cf1SMichael Riesch 41*1c5e4cf1SMichael RieschVariants 42*1c5e4cf1SMichael Riesch======== 43*1c5e4cf1SMichael Riesch 44*1c5e4cf1SMichael RieschRockchip PX30 Video Input Processor (VIP) 45*1c5e4cf1SMichael Riesch----------------------------------------- 46*1c5e4cf1SMichael Riesch 47*1c5e4cf1SMichael RieschThe PX30 Video Input Processor (VIP) features a digital video port that accepts 48*1c5e4cf1SMichael Rieschparallel video data or BT.656. 49*1c5e4cf1SMichael RieschSince these protocols do not feature multiple streams, the VIP has one DMA 50*1c5e4cf1SMichael Rieschengine that transfers the input video data into system memory. 51*1c5e4cf1SMichael Riesch 52*1c5e4cf1SMichael RieschThe rkcif driver represents this hardware variant by exposing one V4L2 subdevice 53*1c5e4cf1SMichael Riesch(the DVP INTERFACE/CROP block) and one V4L2 device (the DVP DMA engine). 54*1c5e4cf1SMichael Riesch 55*1c5e4cf1SMichael RieschRockchip RK3568 Video Capture (VICAP) 56*1c5e4cf1SMichael Riesch------------------------------------- 57*1c5e4cf1SMichael Riesch 58*1c5e4cf1SMichael RieschThe RK3568 Video Capture (VICAP) unit features a digital video port and a MIPI 59*1c5e4cf1SMichael RieschCSI-2 receiver that can receive video data independently. 60*1c5e4cf1SMichael RieschThe DVP accepts parallel video data, BT.656 and BT.1120. 61*1c5e4cf1SMichael RieschSince the BT.1120 protocol may feature more than one stream, the RK3568 VICAP 62*1c5e4cf1SMichael RieschDVP features four DMA engines that can capture different streams. 63*1c5e4cf1SMichael RieschSimilarly, the RK3568 VICAP MIPI CSI-2 receiver features four DMA engines to 64*1c5e4cf1SMichael Rieschhandle different Virtual Channels (VCs). 65*1c5e4cf1SMichael Riesch 66*1c5e4cf1SMichael RieschThe rkcif driver represents this hardware variant by exposing up the following 67*1c5e4cf1SMichael RieschV4L2 subdevices: 68*1c5e4cf1SMichael Riesch 69*1c5e4cf1SMichael Riesch* rkcif-dvp0: INTERFACE/CROP block for the DVP 70*1c5e4cf1SMichael Riesch 71*1c5e4cf1SMichael Rieschand the following video devices: 72*1c5e4cf1SMichael Riesch 73*1c5e4cf1SMichael Riesch* rkcif-dvp0-id0: The support for multiple streams on the DVP is not yet 74*1c5e4cf1SMichael Riesch implemented, as it is hard to find test hardware. Thus, this video device 75*1c5e4cf1SMichael Riesch represents the first DMA engine of the RK3568 DVP. 76*1c5e4cf1SMichael Riesch 77*1c5e4cf1SMichael Riesch.. kernel-figure:: rkcif-rk3568-vicap.dot 78*1c5e4cf1SMichael Riesch :alt: Topology of the RK3568 Video Capture (VICAP) unit 79*1c5e4cf1SMichael Riesch :align: center 80