1What: /sys/devices/platform/<platform>/etr3 2Date: Apr 2021 3KernelVersion: 5.13 4Contact: "Tomas Winkler" <tomas.winkler@intel.com> 5Description: 6 The file exposes "Extended Test Mode Register 3" global 7 reset bits. The bits are used during an Intel platform 8 manufacturing process to indicate that consequent reset 9 of the platform is a "global reset". This type of reset 10 is required in order for manufacturing configurations 11 to take effect. 12 13 Display global reset setting bits for PMC. 14 15 * bit 31 - global reset is locked 16 * bit 20 - global reset is set 17 18 Writing bit 20 value to the etr3 will induce 19 a platform "global reset" upon consequent platform reset, 20 in case the register is not locked. 21 The "global reset bit" should be locked on a production 22 system and the file is in read-only mode. 23