1e4664c0eSWu HaoWhat: /sys/bus/platform/devices/dfl-port.0/id 2e4664c0eSWu HaoDate: June 2018 3e4664c0eSWu HaoKernelVersion: 4.19 4e4664c0eSWu HaoContact: Wu Hao <hao.wu@intel.com> 5e4664c0eSWu HaoDescription: Read-only. It returns id of this port. One DFL FPGA device 6e4664c0eSWu Hao may have more than one port. Userspace could use this id to 7e4664c0eSWu Hao distinguish different ports under same FPGA device. 8*857a2622SXiao Guangrong 9*857a2622SXiao GuangrongWhat: /sys/bus/platform/devices/dfl-port.0/afu_id 10*857a2622SXiao GuangrongDate: June 2018 11*857a2622SXiao GuangrongKernelVersion: 4.19 12*857a2622SXiao GuangrongContact: Wu Hao <hao.wu@intel.com> 13*857a2622SXiao GuangrongDescription: Read-only. User can program different PR bitstreams to FPGA 14*857a2622SXiao Guangrong Accelerator Function Unit (AFU) for different functions. It 15*857a2622SXiao Guangrong returns uuid which could be used to identify which PR bitstream 16*857a2622SXiao Guangrong is programmed in this AFU. 17