1What: /sys/bus/platform/devices/dfl-fme.0/ports_num 2Date: June 2018 3KernelVersion: 4.19 4Contact: Wu Hao <hao.wu@intel.com> 5Description: Read-only. One DFL FPGA device may have more than 1 6 port/Accelerator Function Unit (AFU). It returns the 7 number of ports on the FPGA device when read it. 8 9What: /sys/bus/platform/devices/dfl-fme.0/bitstream_id 10Date: June 2018 11KernelVersion: 4.19 12Contact: Wu Hao <hao.wu@intel.com> 13Description: Read-only. It returns Bitstream (static FPGA region) 14 identifier number, which includes the detailed version 15 and other information of this static FPGA region. 16 17What: /sys/bus/platform/devices/dfl-fme.0/bitstream_metadata 18Date: June 2018 19KernelVersion: 4.19 20Contact: Wu Hao <hao.wu@intel.com> 21Description: Read-only. It returns Bitstream (static FPGA region) meta 22 data, which includes the synthesis date, seed and other 23 information of this static FPGA region. 24