1*3397c3cdSYaxing GuoWhat: /sys/bus/pci/drivers/uio_pci_sva/<pci_dev>/pasid 2*3397c3cdSYaxing GuoDate: September 2025 3*3397c3cdSYaxing GuoContact: Yaxing Guo <guoyaxing@bosc.ac.cn> 4*3397c3cdSYaxing GuoDescription: 5*3397c3cdSYaxing Guo Process Address Space ID (PASID) assigned by IOMMU driver to 6*3397c3cdSYaxing Guo the device for use with Shared Virtual Addressing (SVA). 7*3397c3cdSYaxing Guo 8*3397c3cdSYaxing Guo This read-only attribute exposes the PASID (A 20-bit identifier 9*3397c3cdSYaxing Guo used in PCIe Address Translation Services and iommu table walks) 10*3397c3cdSYaxing Guo allocated by the IOMMU driver during sva device binding. 11*3397c3cdSYaxing Guo 12*3397c3cdSYaxing Guo User-space UIO applications must read this attribute to obtain 13*3397c3cdSYaxing Guo the PASID and program it into the device's configuration registers. 14*3397c3cdSYaxing Guo This enables the device to perform DMA using user-space virtual 15*3397c3cdSYaxing Guo address, with address translation handled by IOMMU. 16*3397c3cdSYaxing Guo 17*3397c3cdSYaxing Guo UIO User-space applications must: 18*3397c3cdSYaxing Guo - Opening device and Mapping the device's register space via /dev/uioX 19*3397c3cdSYaxing Guo (This triggers the IOMMU driver to allocate the PASID) 20*3397c3cdSYaxing Guo - Reading the PASID from sysfs 21*3397c3cdSYaxing Guo - Writing the PASID to a device-specific register (with example offset) 22*3397c3cdSYaxing Guo The code may be like: 23*3397c3cdSYaxing Guo 24*3397c3cdSYaxing Guo map = mmap(..., "/dev/uio0", ...); 25*3397c3cdSYaxing Guo 26*3397c3cdSYaxing Guo f = fopen("/sys/.../pasid", "r"); 27*3397c3cdSYaxing Guo fscanf(f, "%d", &pasid); 28*3397c3cdSYaxing Guo 29*3397c3cdSYaxing Guo map[REG_PASID_OFFSET] = pasid; 30