1What: /sys/devices/platform/HISI04Bx:00/chipX/all_linked 2What: /sys/devices/platform/HISI04Bx:00/chipX/linked_full_lane 3What: /sys/devices/platform/HISI04Bx:00/chipX/crc_err_cnt 4Date: November 2023 5KernelVersion: 6.6 6Contact: Huisong Li <lihuisong@huawei.com> 7Description: 8 The /sys/devices/platform/HISI04Bx:00/chipX/ directory 9 contains read-only attributes exposing some summarization 10 information of all HCCS ports under a specified chip. 11 The X in 'chipX' indicates the Xth chip on platform. 12 13 There are following attributes in this directory: 14 15 ================= ==== ========================================= 16 all_linked: (RO) if all enabled ports on this chip are 17 linked (bool). 18 linked_full_lane: (RO) if all linked ports on this chip are full 19 lane (bool). 20 crc_err_cnt: (RO) total CRC err count for all ports on this 21 chip. 22 ================= ==== ========================================= 23 24What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/all_linked 25What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/linked_full_lane 26What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/crc_err_cnt 27Date: November 2023 28KernelVersion: 6.6 29Contact: Huisong Li <lihuisong@huawei.com> 30Description: 31 The /sys/devices/platform/HISI04Bx:00/chipX/dieY/ directory 32 contains read-only attributes exposing some summarization 33 information of all HCCS ports under a specified die. 34 The Y in 'dieY' indicates the hardware id of the die on chip who 35 has chip id X. 36 37 There are following attributes in this directory: 38 39 ================= ==== ========================================= 40 all_linked: (RO) if all enabled ports on this die are 41 linked (bool). 42 linked_full_lane: (RO) if all linked ports on this die are full 43 lane (bool). 44 crc_err_cnt: (RO) total CRC err count for all ports on this 45 die. 46 ================= ==== ========================================= 47 48What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/type 49What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/lane_mode 50What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/enable 51What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/cur_lane_num 52What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/link_fsm 53What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/lane_mask 54What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/crc_err_cnt 55Date: November 2023 56KernelVersion: 6.6 57Contact: Huisong Li <lihuisong@huawei.com> 58Description: 59 The /sys/devices/platform/HISI04Bx/chipX/dieX/hccsN/ directory 60 contains read-only attributes exposing information about 61 a HCCS port. The N value in 'hccsN' indicates this port id. 62 The X in 'chipX' indicates the ID of the chip to which the 63 HCCS port belongs. For example, X ranges from to 'n - 1' if the 64 chip number on platform is n. 65 The Y in 'dieY' indicates the hardware id of the die to which 66 the hccs port belongs. 67 Note: type, lane_mode and enable are fixed attributes on running 68 platform. 69 70 The HCCS port have the following attributes: 71 72 ============= ==== ============================================= 73 type: (RO) port type (string), e.g. HCCS-v1 -> H32 74 lane_mode: (RO) the lane mode of this port (string), e.g. x8 75 enable: (RO) indicate if this port is enabled (bool). 76 cur_lane_num: (RO) current lane number of this port. 77 link_fsm: (RO) link finite state machine of this port. 78 lane_mask: (RO) current lane mask of this port, every bit 79 indicates a lane. 80 crc_err_cnt: (RO) CRC err count on this port. 81 ============= ==== ============================================= 82