xref: /linux/Documentation/ABI/testing/sysfs-class-fpga-manager (revision afb79e993a949d02895b912eacc86ab0e416b6fd)
1*afb79e99SAlan TullWhat:		/sys/class/fpga_manager/<fpga>/name
2*afb79e99SAlan TullDate:		August 2015
3*afb79e99SAlan TullKernelVersion:	4.3
4*afb79e99SAlan TullContact:	Alan Tull <atull@opensource.altera.com>
5*afb79e99SAlan TullDescription:	Name of low level fpga manager driver.
6*afb79e99SAlan Tull
7*afb79e99SAlan TullWhat:		/sys/class/fpga_manager/<fpga>/state
8*afb79e99SAlan TullDate:		August 2015
9*afb79e99SAlan TullKernelVersion:	4.3
10*afb79e99SAlan TullContact:	Alan Tull <atull@opensource.altera.com>
11*afb79e99SAlan TullDescription:	Read fpga manager state as a string.
12*afb79e99SAlan Tull		The intent is to provide enough detail that if something goes
13*afb79e99SAlan Tull		wrong during FPGA programming (something that the driver can't
14*afb79e99SAlan Tull		fix) then userspace can know, i.e. if the firmware request
15*afb79e99SAlan Tull		fails, that could be due to not being able to find the firmware
16*afb79e99SAlan Tull		file.
17*afb79e99SAlan Tull
18*afb79e99SAlan Tull		This is a superset of FPGA states and fpga manager driver
19*afb79e99SAlan Tull		states.  The fpga manager driver is walking through these steps
20*afb79e99SAlan Tull		to get the FPGA into a known operating state.  It's a sequence,
21*afb79e99SAlan Tull		though some steps may get skipped.  Valid FPGA states will vary
22*afb79e99SAlan Tull		by manufacturer; this is a superset.
23*afb79e99SAlan Tull
24*afb79e99SAlan Tull		* unknown		= can't determine state
25*afb79e99SAlan Tull		* power off		= FPGA power is off
26*afb79e99SAlan Tull		* power up		= FPGA reports power is up
27*afb79e99SAlan Tull		* reset			= FPGA held in reset state
28*afb79e99SAlan Tull		* firmware request	= firmware class request in progress
29*afb79e99SAlan Tull		* firmware request error = firmware request failed
30*afb79e99SAlan Tull		* write init		= preparing FPGA for programming
31*afb79e99SAlan Tull		* write init error	= Error while preparing FPGA for
32*afb79e99SAlan Tull					  programming
33*afb79e99SAlan Tull		* write			= FPGA ready to receive image data
34*afb79e99SAlan Tull		* write error		= Error while programming
35*afb79e99SAlan Tull		* write complete	= Doing post programming steps
36*afb79e99SAlan Tull		* write complete error	= Error while doing post programming
37*afb79e99SAlan Tull		* operating		= FPGA is programmed and operating
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