1b27a6a3fSAlexander ShishkinWhat: /sys/bus/intel_th/devices/<intel_th_id>-gth/masters/* 2b27a6a3fSAlexander ShishkinDate: June 2015 3b27a6a3fSAlexander ShishkinKernelVersion: 4.3 4b27a6a3fSAlexander ShishkinContact: Alexander Shishkin <alexander.shishkin@linux.intel.com> 5b27a6a3fSAlexander ShishkinDescription: (RW) Configure output ports for STP masters. Writing -1 6b27a6a3fSAlexander Shishkin disables a master; any 7b27a6a3fSAlexander Shishkin 8b27a6a3fSAlexander ShishkinWhat: /sys/bus/intel_th/devices/<intel_th_id>-gth/outputs/[0-7]_port 9b27a6a3fSAlexander ShishkinDate: June 2015 10b27a6a3fSAlexander ShishkinKernelVersion: 4.3 11b27a6a3fSAlexander ShishkinContact: Alexander Shishkin <alexander.shishkin@linux.intel.com> 12b27a6a3fSAlexander ShishkinDescription: (RO) Output port type: 13*54a19b4dSMauro Carvalho Chehab 14*54a19b4dSMauro Carvalho Chehab == ========================= 15*54a19b4dSMauro Carvalho Chehab 0 not present, 16*54a19b4dSMauro Carvalho Chehab 1 MSU (Memory Storage Unit) 17*54a19b4dSMauro Carvalho Chehab 2 CTP (Common Trace Port) 18*54a19b4dSMauro Carvalho Chehab 4 PTI (MIPI PTI). 19*54a19b4dSMauro Carvalho Chehab == ========================= 20b27a6a3fSAlexander Shishkin 21b27a6a3fSAlexander ShishkinWhat: /sys/bus/intel_th/devices/<intel_th_id>-gth/outputs/[0-7]_drop 22b27a6a3fSAlexander ShishkinDate: June 2015 23b27a6a3fSAlexander ShishkinKernelVersion: 4.3 24b27a6a3fSAlexander ShishkinContact: Alexander Shishkin <alexander.shishkin@linux.intel.com> 25b27a6a3fSAlexander ShishkinDescription: (RW) Data retention policy setting: keep (0) or drop (1) 26b27a6a3fSAlexander Shishkin incoming data while output port is in reset. 27b27a6a3fSAlexander Shishkin 28b27a6a3fSAlexander ShishkinWhat: /sys/bus/intel_th/devices/<intel_th_id>-gth/outputs/[0-7]_null 29b27a6a3fSAlexander ShishkinDate: June 2015 30b27a6a3fSAlexander ShishkinKernelVersion: 4.3 31b27a6a3fSAlexander ShishkinContact: Alexander Shishkin <alexander.shishkin@linux.intel.com> 32b27a6a3fSAlexander ShishkinDescription: (RW) STP NULL packet generation: enabled (1) or disabled (0). 33b27a6a3fSAlexander Shishkin 34b27a6a3fSAlexander ShishkinWhat: /sys/bus/intel_th/devices/<intel_th_id>-gth/outputs/[0-7]_flush 35b27a6a3fSAlexander ShishkinDate: June 2015 36b27a6a3fSAlexander ShishkinKernelVersion: 4.3 37b27a6a3fSAlexander ShishkinContact: Alexander Shishkin <alexander.shishkin@linux.intel.com> 38b27a6a3fSAlexander ShishkinDescription: (RW) Force flush data from byte packing buffer for the output 39b27a6a3fSAlexander Shishkin port. 40b27a6a3fSAlexander Shishkin 41b27a6a3fSAlexander ShishkinWhat: /sys/bus/intel_th/devices/<intel_th_id>-gth/outputs/[0-7]_reset 42b27a6a3fSAlexander ShishkinDate: June 2015 43b27a6a3fSAlexander ShishkinKernelVersion: 4.3 44b27a6a3fSAlexander ShishkinContact: Alexander Shishkin <alexander.shishkin@linux.intel.com> 45b27a6a3fSAlexander ShishkinDescription: (RO) Output port is in reset (1). 46b27a6a3fSAlexander Shishkin 47b27a6a3fSAlexander ShishkinWhat: /sys/bus/intel_th/devices/<intel_th_id>-gth/outputs/[0-7]_smcfreq 48b27a6a3fSAlexander ShishkinDate: June 2015 49b27a6a3fSAlexander ShishkinKernelVersion: 4.3 50b27a6a3fSAlexander ShishkinContact: Alexander Shishkin <alexander.shishkin@linux.intel.com> 51b27a6a3fSAlexander ShishkinDescription: (RW) STP sync packet frequency for the port. Specifies the 52b27a6a3fSAlexander Shishkin number of clocks between mainenance packets. 53