17a25ec8eSMathieu PoirierWhat: /sys/bus/coresight/devices/<memory_map>.funnel/funnel_ctrl 27a25ec8eSMathieu PoirierDate: November 2014 37a25ec8eSMathieu PoirierKernelVersion: 3.19 47a25ec8eSMathieu PoirierContact: Mathieu Poirier <mathieu.poirier@linaro.org> 57a25ec8eSMathieu PoirierDescription: (RW) Enables the slave ports and defines the hold time of the 67a25ec8eSMathieu Poirier slave ports. 77a25ec8eSMathieu Poirier 87a25ec8eSMathieu PoirierWhat: /sys/bus/coresight/devices/<memory_map>.funnel/priority 97a25ec8eSMathieu PoirierDate: November 2014 107a25ec8eSMathieu PoirierKernelVersion: 3.19 117a25ec8eSMathieu PoirierContact: Mathieu Poirier <mathieu.poirier@linaro.org> 127a25ec8eSMathieu PoirierDescription: (RW) Defines input port priority order. 13*01f96b81SMao Jinlong 14*01f96b81SMao JinlongWhat: /sys/bus/coresight/devices/<memory_map>.funnel/label 15*01f96b81SMao JinlongDate: Aug 2025 16*01f96b81SMao JinlongKernelVersion 6.18 17*01f96b81SMao JinlongContact: Mao Jinlong <quic_jinlmao@quicinc.com> 18*01f96b81SMao JinlongDescription: (Read) Show hardware context information of device. 19