1*4fbfa17fSShradha TodiWhat: /sys/kernel/debug/dwc_pcie_<dev>/rasdes_debug/lane_detect 2*4fbfa17fSShradha TodiDate: February 2025 3*4fbfa17fSShradha TodiContact: Shradha Todi <shradha.t@samsung.com> 4*4fbfa17fSShradha TodiDescription: (RW) Write the lane number to be checked for detection. Read 5*4fbfa17fSShradha Todi will return whether PHY indicates receiver detection on the 6*4fbfa17fSShradha Todi selected lane. The default selected lane is Lane0. 7*4fbfa17fSShradha Todi 8*4fbfa17fSShradha TodiWhat: /sys/kernel/debug/dwc_pcie_<dev>/rasdes_debug/rx_valid 9*4fbfa17fSShradha TodiDate: February 2025 10*4fbfa17fSShradha TodiContact: Shradha Todi <shradha.t@samsung.com> 11*4fbfa17fSShradha TodiDescription: (RW) Write the lane number to be checked as valid or invalid. 12*4fbfa17fSShradha Todi Read will return the status of PIPE RXVALID signal of the 13*4fbfa17fSShradha Todi selected lane. The default selected lane is Lane0. 14