1What: /sys/kernel/debug/dcc/.../ready 2Date: December 2022 3Contact: Souradeep Chowdhury <quic_schowdhu@quicinc.com> 4Description: 5 This file is used to check the status of the dcc 6 hardware if it's ready to receive user configurations. 7 A 'Y' here indicates dcc is ready. 8 9What: /sys/kernel/debug/dcc/.../trigger 10Date: December 2022 11Contact: Souradeep Chowdhury <quic_schowdhu@quicinc.com> 12Description: 13 This is the debugfs interface for manual software 14 triggers. The trigger can be invoked by writing '1' 15 to the file. 16 17What: /sys/kernel/debug/dcc/.../config_reset 18Date: December 2022 19Contact: Souradeep Chowdhury <quic_schowdhu@quicinc.com> 20Description: 21 This file is used to reset the configuration of 22 a dcc driver to the default configuration. When '1' 23 is written to the file, all the previous addresses 24 stored in the driver gets removed and users need to 25 reconfigure addresses again. 26 27What: /sys/kernel/debug/dcc/.../[list-number]/config 28Date: December 2022 29Contact: Souradeep Chowdhury <quic_schowdhu@quicinc.com> 30Description: 31 This stores the addresses of the registers which 32 can be read in case of a hardware crash or manual 33 software triggers. The input addresses type 34 can be one of following dcc instructions: read, 35 write, read-write, and loop type. The lists need to 36 be configured sequentially and not in a overlapping 37 manner; e.g. users can jump to list x only after 38 list y is configured and enabled. The input format for 39 each type is as follows: 40 41 i) Read instruction 42 43 :: 44 45 echo R <addr> <n> <bus> >/sys/kernel/debug/dcc/../[list-number]/config 46 47 where: 48 49 <addr> 50 The address to be read. 51 52 <n> 53 The addresses word count, starting from address <1>. 54 Each word is 32 bits (4 bytes). If omitted, defaulted 55 to 1. 56 57 <bus type> 58 The bus type, which can be either 'apb' or 'ahb'. 59 The default is 'ahb' if leaved out. 60 61 ii) Write instruction 62 63 :: 64 65 echo W <addr> <n> <bus type> > /sys/kernel/debug/dcc/../[list-number]/config 66 67 where: 68 69 <addr> 70 The address to be written. 71 72 <n> 73 The value to be written at <addr>. 74 75 <bus type> 76 The bus type, which can be either 'apb' or 'ahb'. 77 78 iii) Read-write instruction 79 80 :: 81 82 echo RW <addr> <n> <mask> > /sys/kernel/debug/dcc/../[list-number]/config 83 84 where: 85 86 <addr> 87 The address to be read and written. 88 89 <n> 90 The value to be written at <addr>. 91 92 <mask> 93 The value mask. 94 95 iv) Loop instruction 96 97 :: 98 99 echo L <loop count> <address count> <address>... > /sys/kernel/debug/dcc/../[list-number]/config 100 101 where: 102 103 <loop count> 104 Number of iterations 105 106 <address count> 107 total number of addresses to be written 108 109 <address> 110 Space-separated list of addresses. 111 112What: /sys/kernel/debug/dcc/.../[list-number]/enable 113Date: December 2022 114Contact: Souradeep Chowdhury <quic_schowdhu@quicinc.com> 115Description: 116 This debugfs interface is used for enabling the 117 the dcc hardware. A file named "enable" is in the 118 directory list number where users can enable/disable 119 the specific list by writing boolean (1 or 0) to the 120 file. 121 122 On enabling the dcc, all the addresses specified 123 by the user for the corresponding list is written 124 into dcc sram which is read by the dcc hardware 125 on manual or crash induced triggers. Lists must 126 be configured and enabled sequentially, e.g. list 127 2 can only be enabled when list 1 have so. 128