1What: /sys/bus/platform/drivers/aspeed-vuart/*/lpc_address 2Date: April 2017 3Contact: Jeremy Kerr <jk@ozlabs.org> 4Description: Configures which IO port the host side of the UART 5 will appear on the host <-> BMC LPC bus. 6Users: OpenBMC. Proposed changes should be mailed to 7 openbmc@lists.ozlabs.org 8 9What: /sys/bus/platform/drivers/aspeed-vuart/*/sirq 10Date: April 2017 11Contact: Jeremy Kerr <jk@ozlabs.org> 12Description: Configures which interrupt number the host side of 13 the UART will appear on the host <-> BMC LPC bus. 14Users: OpenBMC. Proposed changes should be mailed to 15 openbmc@lists.ozlabs.org 16 17What: /sys/bus/platform/drivers/aspeed-vuart/*/sirq_polarity 18Date: July 2019 19Contact: Oskar Senft <osk@google.com> 20Description: Configures the polarity of the serial interrupt to the 21 host via the BMC LPC bus. 22 Set to 0 for active-low or 1 for active-high. 23Users: OpenBMC. Proposed changes should be mailed to 24 openbmc@lists.ozlabs.org 25