1*7fbcf3afSJeremy KerrWhat: /sys/bus/platform/drivers/aspeed-vuart/*/lpc_address 2*7fbcf3afSJeremy KerrDate: April 2017 3*7fbcf3afSJeremy KerrContact: Jeremy Kerr <jk@ozlabs.org> 4*7fbcf3afSJeremy KerrDescription: Configures which IO port the host side of the UART 5*7fbcf3afSJeremy Kerr will appear on the host <-> BMC LPC bus. 6*7fbcf3afSJeremy KerrUsers: OpenBMC. Proposed changes should be mailed to 7*7fbcf3afSJeremy Kerr openbmc@lists.ozlabs.org 8*7fbcf3afSJeremy Kerr 9*7fbcf3afSJeremy KerrWhat: /sys/bus/platform/drivers/aspeed-vuart*/sirq 10*7fbcf3afSJeremy KerrDate: April 2017 11*7fbcf3afSJeremy KerrContact: Jeremy Kerr <jk@ozlabs.org> 12*7fbcf3afSJeremy KerrDescription: Configures which interrupt number the host side of 13*7fbcf3afSJeremy Kerr the UART will appear on the host <-> BMC LPC bus. 14*7fbcf3afSJeremy KerrUsers: OpenBMC. Proposed changes should be mailed to 15*7fbcf3afSJeremy Kerr openbmc@lists.ozlabs.org 16