1# 2# CDDL HEADER START 3# 4# The contents of this file are subject to the terms of the 5# Common Development and Distribution License (the "License"). 6# You may not use this file except in compliance with the License. 7# 8# You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9# or http://www.opensolaris.org/os/licensing. 10# See the License for the specific language governing permissions 11# and limitations under the License. 12# 13# When distributing Covered Code, include this CDDL HEADER in each 14# file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15# If applicable, add the following below this CDDL HEADER, with the 16# fields enclosed by brackets "[]" replaced with your own identifying 17# information: Portions Copyright [yyyy] [name of copyright owner] 18# 19# CDDL HEADER END 20# 21# 22# Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved. 23# 24# Copyright 2019, Joyent, Inc. 25# Copyright 2021 Oxide Computer Company 26# 27# This Makefile builds 28# the Intel Core Architecture Performance Counter BackEnd (PCBE). 29# 30 31UTSBASE = ../.. 32 33# 34# The following objects are autogenerated by cpcgen. 35# 36CPCGEN_OBJS = \ 37 core_pcbe_cpcgen.o \ 38 core_pcbe_bdw_de.o \ 39 core_pcbe_bdw.o \ 40 core_pcbe_bdx.o \ 41 core_pcbe_bnl.o \ 42 core_pcbe_clx.o \ 43 core_pcbe_glm.o \ 44 core_pcbe_glp.o \ 45 core_pcbe_hsw.o \ 46 core_pcbe_hsx.o \ 47 core_pcbe_icl.o \ 48 core_pcbe_ivb.o \ 49 core_pcbe_ivt.o \ 50 core_pcbe_jkt.o \ 51 core_pcbe_nhm_ep.o \ 52 core_pcbe_nhm_ex.o \ 53 core_pcbe_skl.o \ 54 core_pcbe_skx.o \ 55 core_pcbe_slm.o \ 56 core_pcbe_snb.o \ 57 core_pcbe_snr.o \ 58 core_pcbe_tgl.o \ 59 core_pcbe_wsm_ep_dp.o \ 60 core_pcbe_wsm_ep_sp.o \ 61 core_pcbe_wsm_ex.o 62 63CPCGEN_COMMON = core_pcbe_cpcgen.c 64CPCGEN_CMD = $(CPCGEN) -d $(SRC)/data/perfmon -o . 65CPCGEN_SRCS = $(CPCGEN_OBJS:%.o=%.c) core_pcbe_cpcgen.h 66 67# 68# Define module and object file sets. 69# 70MODULE = pcbe.GenuineIntel.6.15 71OBJECTS = $(CORE_PCBE_OBJS:%=$(OBJS_DIR)/%) 72OBJECTS += $(CPCGEN_OBJS:%=$(OBJS_DIR)/%) 73ROOTMODULE = $(USR_PCBE_DIR)/$(MODULE) 74 75# 76# This order matches the families declared in uts/intel/sys/x86_archext.h. 77# 78SOFTLINKS = \ 79 pcbe.GenuineIntel.6.23 \ 80 pcbe.GenuineIntel.6.29 \ 81 pcbe.GenuineIntel.6.30 \ 82 pcbe.GenuineIntel.6.31 \ 83 pcbe.GenuineIntel.6.26 \ 84 pcbe.GenuineIntel.6.46 \ 85 pcbe.GenuineIntel.6.37 \ 86 pcbe.GenuineIntel.6.44 \ 87 pcbe.GenuineIntel.6.47 \ 88 pcbe.GenuineIntel.6.42 \ 89 pcbe.GenuineIntel.6.45 \ 90 pcbe.GenuineIntel.6.58 \ 91 pcbe.GenuineIntel.6.62 \ 92 pcbe.GenuineIntel.6.60 \ 93 pcbe.GenuineIntel.6.69 \ 94 pcbe.GenuineIntel.6.70 \ 95 pcbe.GenuineIntel.6.63 \ 96 pcbe.GenuineIntel.6.61 \ 97 pcbe.GenuineIntel.6.71 \ 98 pcbe.GenuineIntel.6.79 \ 99 pcbe.GenuineIntel.6.86 \ 100 pcbe.GenuineIntel.6.78 \ 101 pcbe.GenuineIntel.6.85 \ 102 pcbe.GenuineIntel.6.94 \ 103 pcbe.GenuineIntel.6.142 \ 104 pcbe.GenuineIntel.6.158 \ 105 pcbe.GenuineIntel.6.165 \ 106 pcbe.GenuineIntel.6.166 \ 107 pcbe.GenuineIntel.6.28 \ 108 pcbe.GenuineIntel.6.38 \ 109 pcbe.GenuineIntel.6.39 \ 110 pcbe.GenuineIntel.6.53 \ 111 pcbe.GenuineIntel.6.54 \ 112 pcbe.GenuineIntel.6.55 \ 113 pcbe.GenuineIntel.6.77 \ 114 pcbe.GenuineIntel.6.76 \ 115 pcbe.GenuineIntel.6.92 \ 116 pcbe.GenuineIntel.6.95 \ 117 pcbe.GenuineIntel.6.122 \ 118 pcbe.GenuineIntel.6.126 \ 119 pcbe.GenuineIntel.6.134 \ 120 pcbe.GenuineIntel.6.140 \ 121 pcbe.GenuineIntel.6.141 122 123ROOTSOFTLINKS = $(SOFTLINKS:%=$(USR_PCBE_DIR)/%) 124 125# 126# Include common rules. 127# 128include $(UTSBASE)/intel/Makefile.intel 129 130CERRWARN += $(CNOWARN_UNINIT) 131CERRWARN += -_gcc=-Wno-unused-variable 132 133CPPFLAGS += -I$(UTSBASE)/intel/core_pcbe 134CLEANFILES += $(CPCGEN_SRCS) 135 136# 137# Define targets. 138# 139ALL_TARGET = $(CPCGEN_COMMON) .WAIT $(BINARY) 140INSTALL_TARGET = $(CPCGEN_COMMON) .WAIT $(BINARY) $(ROOTMODULE) $(ROOTSOFTLINKS) 141 142# 143# Default build targets. 144# 145.KEEP_STATE: 146 147def: $(DEF_DEPS) 148 149all: $(ALL_DEPS) 150 151clean: $(CLEAN_DEPS) 152 153clobber: $(CLOBBER_DEPS) 154 155install: $(INSTALL_DEPS) 156 157$(ROOTSOFTLINKS): $(ROOTMODULE) 158 -$(RM) $@; $(SYMLINK) $(MODULE) $@ 159 160core_pcbe_cpcgen.c: 161 $(CPCGEN_CMD) -a -H 162 163core_pcbe_%.c: $(CPCGEN_COMMON) 164 $(CPCGEN_CMD) -c -p \ 165 $$(echo $@ | \ 166 $(SED) -e 's/core_pcbe_//g' -e 's/_/-/g' -e 's/.c$$//g') 167 168$(OBJS_DIR)/%.o: %.c 169 $(COMPILE.c) -I$(SRC)/uts/intel/pcbe/ -o $@ $< 170 $(CTFCONVERT_O) 171 172# 173# Include common targets. 174# 175include $(UTSBASE)/intel/Makefile.targ 176