1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright (c) 1992, 2010, Oracle and/or its affiliates. All rights reserved. 23 */ 24 25 /* 26 * x86 root nexus driver 27 */ 28 29 #include <sys/sysmacros.h> 30 #include <sys/conf.h> 31 #include <sys/autoconf.h> 32 #include <sys/sysmacros.h> 33 #include <sys/debug.h> 34 #include <sys/psw.h> 35 #include <sys/ddidmareq.h> 36 #include <sys/promif.h> 37 #include <sys/devops.h> 38 #include <sys/kmem.h> 39 #include <sys/cmn_err.h> 40 #include <vm/seg.h> 41 #include <vm/seg_kmem.h> 42 #include <vm/seg_dev.h> 43 #include <sys/vmem.h> 44 #include <sys/mman.h> 45 #include <vm/hat.h> 46 #include <vm/as.h> 47 #include <vm/page.h> 48 #include <sys/avintr.h> 49 #include <sys/errno.h> 50 #include <sys/modctl.h> 51 #include <sys/ddi_impldefs.h> 52 #include <sys/sunddi.h> 53 #include <sys/sunndi.h> 54 #include <sys/mach_intr.h> 55 #include <sys/psm.h> 56 #include <sys/ontrap.h> 57 #include <sys/atomic.h> 58 #include <sys/sdt.h> 59 #include <sys/rootnex.h> 60 #include <vm/hat_i86.h> 61 #include <sys/ddifm.h> 62 #include <sys/ddi_isa.h> 63 #include <sys/apic.h> 64 65 #ifdef __xpv 66 #include <sys/bootinfo.h> 67 #include <sys/hypervisor.h> 68 #include <sys/bootconf.h> 69 #include <vm/kboot_mmu.h> 70 #endif 71 72 #if defined(__amd64) && !defined(__xpv) 73 #include <sys/immu.h> 74 #endif 75 76 77 /* 78 * enable/disable extra checking of function parameters. Useful for debugging 79 * drivers. 80 */ 81 #ifdef DEBUG 82 int rootnex_alloc_check_parms = 1; 83 int rootnex_bind_check_parms = 1; 84 int rootnex_bind_check_inuse = 1; 85 int rootnex_unbind_verify_buffer = 0; 86 int rootnex_sync_check_parms = 1; 87 #else 88 int rootnex_alloc_check_parms = 0; 89 int rootnex_bind_check_parms = 0; 90 int rootnex_bind_check_inuse = 0; 91 int rootnex_unbind_verify_buffer = 0; 92 int rootnex_sync_check_parms = 0; 93 #endif 94 95 boolean_t rootnex_dmar_not_setup; 96 97 /* Master Abort and Target Abort panic flag */ 98 int rootnex_fm_ma_ta_panic_flag = 0; 99 100 /* Semi-temporary patchables to phase in bug fixes, test drivers, etc. */ 101 int rootnex_bind_fail = 1; 102 int rootnex_bind_warn = 1; 103 uint8_t *rootnex_warn_list; 104 /* bitmasks for rootnex_warn_list. Up to 8 different warnings with uint8_t */ 105 #define ROOTNEX_BIND_WARNING (0x1 << 0) 106 107 /* 108 * revert back to old broken behavior of always sync'ing entire copy buffer. 109 * This is useful if be have a buggy driver which doesn't correctly pass in 110 * the offset and size into ddi_dma_sync(). 111 */ 112 int rootnex_sync_ignore_params = 0; 113 114 /* 115 * For the 64-bit kernel, pre-alloc enough cookies for a 256K buffer plus 1 116 * page for alignment. For the 32-bit kernel, pre-alloc enough cookies for a 117 * 64K buffer plus 1 page for alignment (we have less kernel space in a 32-bit 118 * kernel). Allocate enough windows to handle a 256K buffer w/ at least 65 119 * sgllen DMA engine, and enough copybuf buffer state pages to handle 2 pages 120 * (< 8K). We will still need to allocate the copy buffer during bind though 121 * (if we need one). These can only be modified in /etc/system before rootnex 122 * attach. 123 */ 124 #if defined(__amd64) 125 int rootnex_prealloc_cookies = 65; 126 int rootnex_prealloc_windows = 4; 127 int rootnex_prealloc_copybuf = 2; 128 #else 129 int rootnex_prealloc_cookies = 33; 130 int rootnex_prealloc_windows = 4; 131 int rootnex_prealloc_copybuf = 2; 132 #endif 133 134 /* driver global state */ 135 static rootnex_state_t *rootnex_state; 136 137 #ifdef DEBUG 138 /* shortcut to rootnex counters */ 139 static uint64_t *rootnex_cnt; 140 #endif 141 142 /* 143 * XXX - does x86 even need these or are they left over from the SPARC days? 144 */ 145 /* statically defined integer/boolean properties for the root node */ 146 static rootnex_intprop_t rootnex_intprp[] = { 147 { "PAGESIZE", PAGESIZE }, 148 { "MMU_PAGESIZE", MMU_PAGESIZE }, 149 { "MMU_PAGEOFFSET", MMU_PAGEOFFSET }, 150 { DDI_RELATIVE_ADDRESSING, 1 }, 151 }; 152 #define NROOT_INTPROPS (sizeof (rootnex_intprp) / sizeof (rootnex_intprop_t)) 153 154 /* 155 * If we're dom0, we're using a real device so we need to load 156 * the cookies with MFNs instead of PFNs. 157 */ 158 #ifdef __xpv 159 typedef maddr_t rootnex_addr_t; 160 #define ROOTNEX_PADDR_TO_RBASE(pa) \ 161 (DOMAIN_IS_INITDOMAIN(xen_info) ? pa_to_ma(pa) : (pa)) 162 #else 163 typedef paddr_t rootnex_addr_t; 164 #define ROOTNEX_PADDR_TO_RBASE(pa) (pa) 165 #endif 166 167 #if !defined(__xpv) 168 char _depends_on[] = "misc/iommulib misc/acpica"; 169 #endif 170 171 static struct cb_ops rootnex_cb_ops = { 172 nodev, /* open */ 173 nodev, /* close */ 174 nodev, /* strategy */ 175 nodev, /* print */ 176 nodev, /* dump */ 177 nodev, /* read */ 178 nodev, /* write */ 179 nodev, /* ioctl */ 180 nodev, /* devmap */ 181 nodev, /* mmap */ 182 nodev, /* segmap */ 183 nochpoll, /* chpoll */ 184 ddi_prop_op, /* cb_prop_op */ 185 NULL, /* struct streamtab */ 186 D_NEW | D_MP | D_HOTPLUG, /* compatibility flags */ 187 CB_REV, /* Rev */ 188 nodev, /* cb_aread */ 189 nodev /* cb_awrite */ 190 }; 191 192 static int rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, 193 off_t offset, off_t len, caddr_t *vaddrp); 194 static int rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip, 195 struct hat *hat, struct seg *seg, caddr_t addr, 196 struct devpage *dp, pfn_t pfn, uint_t prot, uint_t lock); 197 static int rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip, 198 struct ddi_dma_req *dmareq, ddi_dma_handle_t *handlep); 199 static int rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, 200 ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg, 201 ddi_dma_handle_t *handlep); 202 static int rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, 203 ddi_dma_handle_t handle); 204 static int rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 205 ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 206 ddi_dma_cookie_t *cookiep, uint_t *ccountp); 207 static int rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 208 ddi_dma_handle_t handle); 209 static int rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip, 210 ddi_dma_handle_t handle, off_t off, size_t len, uint_t cache_flags); 211 static int rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, 212 ddi_dma_handle_t handle, uint_t win, off_t *offp, size_t *lenp, 213 ddi_dma_cookie_t *cookiep, uint_t *ccountp); 214 static int rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip, 215 ddi_dma_handle_t handle, enum ddi_dma_ctlops request, 216 off_t *offp, size_t *lenp, caddr_t *objp, uint_t cache_flags); 217 static int rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip, 218 ddi_ctl_enum_t ctlop, void *arg, void *result); 219 static int rootnex_fm_init(dev_info_t *dip, dev_info_t *tdip, int tcap, 220 ddi_iblock_cookie_t *ibc); 221 static int rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip, 222 ddi_intr_op_t intr_op, ddi_intr_handle_impl_t *hdlp, void *result); 223 static int rootnex_alloc_intr_fixed(dev_info_t *, ddi_intr_handle_impl_t *, 224 void *); 225 static int rootnex_free_intr_fixed(dev_info_t *, ddi_intr_handle_impl_t *); 226 227 static int rootnex_coredma_allochdl(dev_info_t *dip, dev_info_t *rdip, 228 ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg, 229 ddi_dma_handle_t *handlep); 230 static int rootnex_coredma_freehdl(dev_info_t *dip, dev_info_t *rdip, 231 ddi_dma_handle_t handle); 232 static int rootnex_coredma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 233 ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 234 ddi_dma_cookie_t *cookiep, uint_t *ccountp); 235 static int rootnex_coredma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 236 ddi_dma_handle_t handle); 237 #if defined(__amd64) && !defined(__xpv) 238 static void rootnex_coredma_reset_cookies(dev_info_t *dip, 239 ddi_dma_handle_t handle); 240 static int rootnex_coredma_get_cookies(dev_info_t *dip, ddi_dma_handle_t handle, 241 ddi_dma_cookie_t **cookiepp, uint_t *ccountp); 242 static int rootnex_coredma_set_cookies(dev_info_t *dip, ddi_dma_handle_t handle, 243 ddi_dma_cookie_t *cookiep, uint_t ccount); 244 static int rootnex_coredma_clear_cookies(dev_info_t *dip, 245 ddi_dma_handle_t handle); 246 static int rootnex_coredma_get_sleep_flags(ddi_dma_handle_t handle); 247 #endif 248 static int rootnex_coredma_sync(dev_info_t *dip, dev_info_t *rdip, 249 ddi_dma_handle_t handle, off_t off, size_t len, uint_t cache_flags); 250 static int rootnex_coredma_win(dev_info_t *dip, dev_info_t *rdip, 251 ddi_dma_handle_t handle, uint_t win, off_t *offp, size_t *lenp, 252 ddi_dma_cookie_t *cookiep, uint_t *ccountp); 253 254 #if defined(__amd64) && !defined(__xpv) 255 static int rootnex_coredma_hdl_setprivate(dev_info_t *dip, dev_info_t *rdip, 256 ddi_dma_handle_t handle, void *v); 257 static void *rootnex_coredma_hdl_getprivate(dev_info_t *dip, dev_info_t *rdip, 258 ddi_dma_handle_t handle); 259 #endif 260 261 262 static struct bus_ops rootnex_bus_ops = { 263 BUSO_REV, 264 rootnex_map, 265 NULL, 266 NULL, 267 NULL, 268 rootnex_map_fault, 269 rootnex_dma_map, 270 rootnex_dma_allochdl, 271 rootnex_dma_freehdl, 272 rootnex_dma_bindhdl, 273 rootnex_dma_unbindhdl, 274 rootnex_dma_sync, 275 rootnex_dma_win, 276 rootnex_dma_mctl, 277 rootnex_ctlops, 278 ddi_bus_prop_op, 279 i_ddi_rootnex_get_eventcookie, 280 i_ddi_rootnex_add_eventcall, 281 i_ddi_rootnex_remove_eventcall, 282 i_ddi_rootnex_post_event, 283 0, /* bus_intr_ctl */ 284 0, /* bus_config */ 285 0, /* bus_unconfig */ 286 rootnex_fm_init, /* bus_fm_init */ 287 NULL, /* bus_fm_fini */ 288 NULL, /* bus_fm_access_enter */ 289 NULL, /* bus_fm_access_exit */ 290 NULL, /* bus_powr */ 291 rootnex_intr_ops /* bus_intr_op */ 292 }; 293 294 static int rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd); 295 static int rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd); 296 static int rootnex_quiesce(dev_info_t *dip); 297 298 static struct dev_ops rootnex_ops = { 299 DEVO_REV, 300 0, 301 ddi_no_info, 302 nulldev, 303 nulldev, 304 rootnex_attach, 305 rootnex_detach, 306 nulldev, 307 &rootnex_cb_ops, 308 &rootnex_bus_ops, 309 NULL, 310 rootnex_quiesce, /* quiesce */ 311 }; 312 313 static struct modldrv rootnex_modldrv = { 314 &mod_driverops, 315 "i86pc root nexus", 316 &rootnex_ops 317 }; 318 319 static struct modlinkage rootnex_modlinkage = { 320 MODREV_1, 321 (void *)&rootnex_modldrv, 322 NULL 323 }; 324 325 #if defined(__amd64) && !defined(__xpv) 326 static iommulib_nexops_t iommulib_nexops = { 327 IOMMU_NEXOPS_VERSION, 328 "Rootnex IOMMU ops Vers 1.1", 329 NULL, 330 rootnex_coredma_allochdl, 331 rootnex_coredma_freehdl, 332 rootnex_coredma_bindhdl, 333 rootnex_coredma_unbindhdl, 334 rootnex_coredma_reset_cookies, 335 rootnex_coredma_get_cookies, 336 rootnex_coredma_set_cookies, 337 rootnex_coredma_clear_cookies, 338 rootnex_coredma_get_sleep_flags, 339 rootnex_coredma_sync, 340 rootnex_coredma_win, 341 rootnex_dma_map, 342 rootnex_dma_mctl, 343 rootnex_coredma_hdl_setprivate, 344 rootnex_coredma_hdl_getprivate 345 }; 346 #endif 347 348 /* 349 * extern hacks 350 */ 351 extern struct seg_ops segdev_ops; 352 extern int ignore_hardware_nodes; /* force flag from ddi_impl.c */ 353 #ifdef DDI_MAP_DEBUG 354 extern int ddi_map_debug_flag; 355 #define ddi_map_debug if (ddi_map_debug_flag) prom_printf 356 #endif 357 extern void i86_pp_map(page_t *pp, caddr_t kaddr); 358 extern void i86_va_map(caddr_t vaddr, struct as *asp, caddr_t kaddr); 359 extern int (*psm_intr_ops)(dev_info_t *, ddi_intr_handle_impl_t *, 360 psm_intr_op_t, int *); 361 extern int impl_ddi_sunbus_initchild(dev_info_t *dip); 362 extern void impl_ddi_sunbus_removechild(dev_info_t *dip); 363 364 /* 365 * Use device arena to use for device control register mappings. 366 * Various kernel memory walkers (debugger, dtrace) need to know 367 * to avoid this address range to prevent undesired device activity. 368 */ 369 extern void *device_arena_alloc(size_t size, int vm_flag); 370 extern void device_arena_free(void * vaddr, size_t size); 371 372 373 /* 374 * Internal functions 375 */ 376 static int rootnex_dma_init(); 377 static void rootnex_add_props(dev_info_t *); 378 static int rootnex_ctl_reportdev(dev_info_t *dip); 379 static struct intrspec *rootnex_get_ispec(dev_info_t *rdip, int inum); 380 static int rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp); 381 static int rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp); 382 static int rootnex_map_handle(ddi_map_req_t *mp); 383 static void rootnex_clean_dmahdl(ddi_dma_impl_t *hp); 384 static int rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegsize); 385 static int rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, 386 ddi_dma_attr_t *attr); 387 static void rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl, 388 rootnex_sglinfo_t *sglinfo); 389 static void rootnex_dvma_get_sgl(ddi_dma_obj_t *dmar_object, 390 ddi_dma_cookie_t *sgl, rootnex_sglinfo_t *sglinfo); 391 static int rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 392 rootnex_dma_t *dma, ddi_dma_attr_t *attr, ddi_dma_obj_t *dmao, int kmflag); 393 static int rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 394 rootnex_dma_t *dma, ddi_dma_attr_t *attr); 395 static void rootnex_teardown_copybuf(rootnex_dma_t *dma); 396 static int rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 397 ddi_dma_attr_t *attr, ddi_dma_obj_t *dmao, int kmflag); 398 static void rootnex_teardown_windows(rootnex_dma_t *dma); 399 static void rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 400 rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset); 401 static void rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, 402 rootnex_dma_t *dma, ddi_dma_cookie_t *cookie, off_t cur_offset, 403 size_t *copybuf_used, page_t **cur_pp); 404 static int rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp, 405 rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, 406 ddi_dma_attr_t *attr, off_t cur_offset); 407 static int rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, 408 rootnex_dma_t *dma, rootnex_window_t **windowp, 409 ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used); 410 static int rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp, 411 rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie); 412 static int rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win, 413 off_t offset, size_t size, uint_t cache_flags); 414 static int rootnex_verify_buffer(rootnex_dma_t *dma); 415 static int rootnex_dma_check(dev_info_t *dip, const void *handle, 416 const void *comp_addr, const void *not_used); 417 static boolean_t rootnex_need_bounce_seg(ddi_dma_obj_t *dmar_object, 418 rootnex_sglinfo_t *sglinfo); 419 static struct as *rootnex_get_as(ddi_dma_obj_t *dmar_object); 420 421 /* 422 * _init() 423 * 424 */ 425 int 426 _init(void) 427 { 428 429 rootnex_state = NULL; 430 return (mod_install(&rootnex_modlinkage)); 431 } 432 433 434 /* 435 * _info() 436 * 437 */ 438 int 439 _info(struct modinfo *modinfop) 440 { 441 return (mod_info(&rootnex_modlinkage, modinfop)); 442 } 443 444 445 /* 446 * _fini() 447 * 448 */ 449 int 450 _fini(void) 451 { 452 return (EBUSY); 453 } 454 455 456 /* 457 * rootnex_attach() 458 * 459 */ 460 static int 461 rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 462 { 463 int fmcap; 464 int e; 465 466 switch (cmd) { 467 case DDI_ATTACH: 468 break; 469 case DDI_RESUME: 470 #if defined(__amd64) && !defined(__xpv) 471 return (immu_unquiesce()); 472 #else 473 return (DDI_SUCCESS); 474 #endif 475 default: 476 return (DDI_FAILURE); 477 } 478 479 /* 480 * We should only have one instance of rootnex. Save it away since we 481 * don't have an easy way to get it back later. 482 */ 483 ASSERT(rootnex_state == NULL); 484 rootnex_state = kmem_zalloc(sizeof (rootnex_state_t), KM_SLEEP); 485 486 rootnex_state->r_dip = dip; 487 rootnex_state->r_err_ibc = (ddi_iblock_cookie_t)ipltospl(15); 488 rootnex_state->r_reserved_msg_printed = B_FALSE; 489 #ifdef DEBUG 490 rootnex_cnt = &rootnex_state->r_counters[0]; 491 #endif 492 493 /* 494 * Set minimum fm capability level for i86pc platforms and then 495 * initialize error handling. Since we're the rootnex, we don't 496 * care what's returned in the fmcap field. 497 */ 498 ddi_system_fmcap = DDI_FM_EREPORT_CAPABLE | DDI_FM_ERRCB_CAPABLE | 499 DDI_FM_ACCCHK_CAPABLE | DDI_FM_DMACHK_CAPABLE; 500 fmcap = ddi_system_fmcap; 501 ddi_fm_init(dip, &fmcap, &rootnex_state->r_err_ibc); 502 503 /* initialize DMA related state */ 504 e = rootnex_dma_init(); 505 if (e != DDI_SUCCESS) { 506 kmem_free(rootnex_state, sizeof (rootnex_state_t)); 507 return (DDI_FAILURE); 508 } 509 510 /* Add static root node properties */ 511 rootnex_add_props(dip); 512 513 /* since we can't call ddi_report_dev() */ 514 cmn_err(CE_CONT, "?root nexus = %s\n", ddi_get_name(dip)); 515 516 /* Initialize rootnex event handle */ 517 i_ddi_rootnex_init_events(dip); 518 519 #if defined(__amd64) && !defined(__xpv) 520 e = iommulib_nexus_register(dip, &iommulib_nexops, 521 &rootnex_state->r_iommulib_handle); 522 523 ASSERT(e == DDI_SUCCESS); 524 #endif 525 526 return (DDI_SUCCESS); 527 } 528 529 530 /* 531 * rootnex_detach() 532 * 533 */ 534 /*ARGSUSED*/ 535 static int 536 rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 537 { 538 switch (cmd) { 539 case DDI_SUSPEND: 540 #if defined(__amd64) && !defined(__xpv) 541 return (immu_quiesce()); 542 #else 543 return (DDI_SUCCESS); 544 #endif 545 default: 546 return (DDI_FAILURE); 547 } 548 /*NOTREACHED*/ 549 550 } 551 552 553 /* 554 * rootnex_dma_init() 555 * 556 */ 557 /*ARGSUSED*/ 558 static int 559 rootnex_dma_init() 560 { 561 size_t bufsize; 562 563 564 /* 565 * size of our cookie/window/copybuf state needed in dma bind that we 566 * pre-alloc in dma_alloc_handle 567 */ 568 rootnex_state->r_prealloc_cookies = rootnex_prealloc_cookies; 569 rootnex_state->r_prealloc_size = 570 (rootnex_state->r_prealloc_cookies * sizeof (ddi_dma_cookie_t)) + 571 (rootnex_prealloc_windows * sizeof (rootnex_window_t)) + 572 (rootnex_prealloc_copybuf * sizeof (rootnex_pgmap_t)); 573 574 /* 575 * setup DDI DMA handle kmem cache, align each handle on 64 bytes, 576 * allocate 16 extra bytes for struct pointer alignment 577 * (p->dmai_private & dma->dp_prealloc_buffer) 578 */ 579 bufsize = sizeof (ddi_dma_impl_t) + sizeof (rootnex_dma_t) + 580 rootnex_state->r_prealloc_size + 0x10; 581 rootnex_state->r_dmahdl_cache = kmem_cache_create("rootnex_dmahdl", 582 bufsize, 64, NULL, NULL, NULL, NULL, NULL, 0); 583 if (rootnex_state->r_dmahdl_cache == NULL) { 584 return (DDI_FAILURE); 585 } 586 587 /* 588 * allocate array to track which major numbers we have printed warnings 589 * for. 590 */ 591 rootnex_warn_list = kmem_zalloc(devcnt * sizeof (*rootnex_warn_list), 592 KM_SLEEP); 593 594 return (DDI_SUCCESS); 595 } 596 597 598 /* 599 * rootnex_add_props() 600 * 601 */ 602 static void 603 rootnex_add_props(dev_info_t *dip) 604 { 605 rootnex_intprop_t *rpp; 606 int i; 607 608 /* Add static integer/boolean properties to the root node */ 609 rpp = rootnex_intprp; 610 for (i = 0; i < NROOT_INTPROPS; i++) { 611 (void) e_ddi_prop_update_int(DDI_DEV_T_NONE, dip, 612 rpp[i].prop_name, rpp[i].prop_value); 613 } 614 } 615 616 617 618 /* 619 * ************************* 620 * ctlops related routines 621 * ************************* 622 */ 623 624 /* 625 * rootnex_ctlops() 626 * 627 */ 628 /*ARGSUSED*/ 629 static int 630 rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip, ddi_ctl_enum_t ctlop, 631 void *arg, void *result) 632 { 633 int n, *ptr; 634 struct ddi_parent_private_data *pdp; 635 636 switch (ctlop) { 637 case DDI_CTLOPS_DMAPMAPC: 638 /* 639 * Return 'partial' to indicate that dma mapping 640 * has to be done in the main MMU. 641 */ 642 return (DDI_DMA_PARTIAL); 643 644 case DDI_CTLOPS_BTOP: 645 /* 646 * Convert byte count input to physical page units. 647 * (byte counts that are not a page-size multiple 648 * are rounded down) 649 */ 650 *(ulong_t *)result = btop(*(ulong_t *)arg); 651 return (DDI_SUCCESS); 652 653 case DDI_CTLOPS_PTOB: 654 /* 655 * Convert size in physical pages to bytes 656 */ 657 *(ulong_t *)result = ptob(*(ulong_t *)arg); 658 return (DDI_SUCCESS); 659 660 case DDI_CTLOPS_BTOPR: 661 /* 662 * Convert byte count input to physical page units 663 * (byte counts that are not a page-size multiple 664 * are rounded up) 665 */ 666 *(ulong_t *)result = btopr(*(ulong_t *)arg); 667 return (DDI_SUCCESS); 668 669 case DDI_CTLOPS_INITCHILD: 670 return (impl_ddi_sunbus_initchild(arg)); 671 672 case DDI_CTLOPS_UNINITCHILD: 673 impl_ddi_sunbus_removechild(arg); 674 return (DDI_SUCCESS); 675 676 case DDI_CTLOPS_REPORTDEV: 677 return (rootnex_ctl_reportdev(rdip)); 678 679 case DDI_CTLOPS_IOMIN: 680 /* 681 * Nothing to do here but reflect back.. 682 */ 683 return (DDI_SUCCESS); 684 685 case DDI_CTLOPS_REGSIZE: 686 case DDI_CTLOPS_NREGS: 687 break; 688 689 case DDI_CTLOPS_SIDDEV: 690 if (ndi_dev_is_prom_node(rdip)) 691 return (DDI_SUCCESS); 692 if (ndi_dev_is_persistent_node(rdip)) 693 return (DDI_SUCCESS); 694 return (DDI_FAILURE); 695 696 case DDI_CTLOPS_POWER: 697 return ((*pm_platform_power)((power_req_t *)arg)); 698 699 case DDI_CTLOPS_RESERVED0: /* Was DDI_CTLOPS_NINTRS, obsolete */ 700 case DDI_CTLOPS_RESERVED1: /* Was DDI_CTLOPS_POKE_INIT, obsolete */ 701 case DDI_CTLOPS_RESERVED2: /* Was DDI_CTLOPS_POKE_FLUSH, obsolete */ 702 case DDI_CTLOPS_RESERVED3: /* Was DDI_CTLOPS_POKE_FINI, obsolete */ 703 case DDI_CTLOPS_RESERVED4: /* Was DDI_CTLOPS_INTR_HILEVEL, obsolete */ 704 case DDI_CTLOPS_RESERVED5: /* Was DDI_CTLOPS_XLATE_INTRS, obsolete */ 705 if (!rootnex_state->r_reserved_msg_printed) { 706 rootnex_state->r_reserved_msg_printed = B_TRUE; 707 cmn_err(CE_WARN, "Failing ddi_ctlops call(s) for " 708 "1 or more reserved/obsolete operations."); 709 } 710 return (DDI_FAILURE); 711 712 default: 713 return (DDI_FAILURE); 714 } 715 /* 716 * The rest are for "hardware" properties 717 */ 718 if ((pdp = ddi_get_parent_data(rdip)) == NULL) 719 return (DDI_FAILURE); 720 721 if (ctlop == DDI_CTLOPS_NREGS) { 722 ptr = (int *)result; 723 *ptr = pdp->par_nreg; 724 } else { 725 off_t *size = (off_t *)result; 726 727 ptr = (int *)arg; 728 n = *ptr; 729 if (n >= pdp->par_nreg) { 730 return (DDI_FAILURE); 731 } 732 *size = (off_t)pdp->par_reg[n].regspec_size; 733 } 734 return (DDI_SUCCESS); 735 } 736 737 738 /* 739 * rootnex_ctl_reportdev() 740 * 741 */ 742 static int 743 rootnex_ctl_reportdev(dev_info_t *dev) 744 { 745 int i, n, len, f_len = 0; 746 char *buf; 747 748 buf = kmem_alloc(REPORTDEV_BUFSIZE, KM_SLEEP); 749 f_len += snprintf(buf, REPORTDEV_BUFSIZE, 750 "%s%d at root", ddi_driver_name(dev), ddi_get_instance(dev)); 751 len = strlen(buf); 752 753 for (i = 0; i < sparc_pd_getnreg(dev); i++) { 754 755 struct regspec *rp = sparc_pd_getreg(dev, i); 756 757 if (i == 0) 758 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 759 ": "); 760 else 761 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 762 " and "); 763 len = strlen(buf); 764 765 switch (rp->regspec_bustype) { 766 767 case BTEISA: 768 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 769 "%s 0x%x", DEVI_EISA_NEXNAME, rp->regspec_addr); 770 break; 771 772 case BTISA: 773 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 774 "%s 0x%x", DEVI_ISA_NEXNAME, rp->regspec_addr); 775 break; 776 777 default: 778 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 779 "space %x offset %x", 780 rp->regspec_bustype, rp->regspec_addr); 781 break; 782 } 783 len = strlen(buf); 784 } 785 for (i = 0, n = sparc_pd_getnintr(dev); i < n; i++) { 786 int pri; 787 788 if (i != 0) { 789 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 790 ","); 791 len = strlen(buf); 792 } 793 pri = INT_IPL(sparc_pd_getintr(dev, i)->intrspec_pri); 794 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 795 " sparc ipl %d", pri); 796 len = strlen(buf); 797 } 798 #ifdef DEBUG 799 if (f_len + 1 >= REPORTDEV_BUFSIZE) { 800 cmn_err(CE_NOTE, "next message is truncated: " 801 "printed length 1024, real length %d", f_len); 802 } 803 #endif /* DEBUG */ 804 cmn_err(CE_CONT, "?%s\n", buf); 805 kmem_free(buf, REPORTDEV_BUFSIZE); 806 return (DDI_SUCCESS); 807 } 808 809 810 /* 811 * ****************** 812 * map related code 813 * ****************** 814 */ 815 816 /* 817 * rootnex_map() 818 * 819 */ 820 static int 821 rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, off_t offset, 822 off_t len, caddr_t *vaddrp) 823 { 824 struct regspec *rp, tmp_reg; 825 ddi_map_req_t mr = *mp; /* Get private copy of request */ 826 int error; 827 828 mp = &mr; 829 830 switch (mp->map_op) { 831 case DDI_MO_MAP_LOCKED: 832 case DDI_MO_UNMAP: 833 case DDI_MO_MAP_HANDLE: 834 break; 835 default: 836 #ifdef DDI_MAP_DEBUG 837 cmn_err(CE_WARN, "rootnex_map: unimplemented map op %d.", 838 mp->map_op); 839 #endif /* DDI_MAP_DEBUG */ 840 return (DDI_ME_UNIMPLEMENTED); 841 } 842 843 if (mp->map_flags & DDI_MF_USER_MAPPING) { 844 #ifdef DDI_MAP_DEBUG 845 cmn_err(CE_WARN, "rootnex_map: unimplemented map type: user."); 846 #endif /* DDI_MAP_DEBUG */ 847 return (DDI_ME_UNIMPLEMENTED); 848 } 849 850 /* 851 * First, if given an rnumber, convert it to a regspec... 852 * (Presumably, this is on behalf of a child of the root node?) 853 */ 854 855 if (mp->map_type == DDI_MT_RNUMBER) { 856 857 int rnumber = mp->map_obj.rnumber; 858 #ifdef DDI_MAP_DEBUG 859 static char *out_of_range = 860 "rootnex_map: Out of range rnumber <%d>, device <%s>"; 861 #endif /* DDI_MAP_DEBUG */ 862 863 rp = i_ddi_rnumber_to_regspec(rdip, rnumber); 864 if (rp == NULL) { 865 #ifdef DDI_MAP_DEBUG 866 cmn_err(CE_WARN, out_of_range, rnumber, 867 ddi_get_name(rdip)); 868 #endif /* DDI_MAP_DEBUG */ 869 return (DDI_ME_RNUMBER_RANGE); 870 } 871 872 /* 873 * Convert the given ddi_map_req_t from rnumber to regspec... 874 */ 875 876 mp->map_type = DDI_MT_REGSPEC; 877 mp->map_obj.rp = rp; 878 } 879 880 /* 881 * Adjust offset and length correspnding to called values... 882 * XXX: A non-zero length means override the one in the regspec 883 * XXX: (regardless of what's in the parent's range?) 884 */ 885 886 tmp_reg = *(mp->map_obj.rp); /* Preserve underlying data */ 887 rp = mp->map_obj.rp = &tmp_reg; /* Use tmp_reg in request */ 888 889 #ifdef DDI_MAP_DEBUG 890 cmn_err(CE_CONT, "rootnex: <%s,%s> <0x%x, 0x%x, 0x%d> offset %d len %d " 891 "handle 0x%x\n", ddi_get_name(dip), ddi_get_name(rdip), 892 rp->regspec_bustype, rp->regspec_addr, rp->regspec_size, offset, 893 len, mp->map_handlep); 894 #endif /* DDI_MAP_DEBUG */ 895 896 /* 897 * I/O or memory mapping: 898 * 899 * <bustype=0, addr=x, len=x>: memory 900 * <bustype=1, addr=x, len=x>: i/o 901 * <bustype>1, addr=0, len=x>: x86-compatibility i/o 902 */ 903 904 if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) { 905 cmn_err(CE_WARN, "<%s,%s> invalid register spec" 906 " <0x%x, 0x%x, 0x%x>", ddi_get_name(dip), 907 ddi_get_name(rdip), rp->regspec_bustype, 908 rp->regspec_addr, rp->regspec_size); 909 return (DDI_ME_INVAL); 910 } 911 912 if (rp->regspec_bustype > 1 && rp->regspec_addr == 0) { 913 /* 914 * compatibility i/o mapping 915 */ 916 rp->regspec_bustype += (uint_t)offset; 917 } else { 918 /* 919 * Normal memory or i/o mapping 920 */ 921 rp->regspec_addr += (uint_t)offset; 922 } 923 924 if (len != 0) 925 rp->regspec_size = (uint_t)len; 926 927 #ifdef DDI_MAP_DEBUG 928 cmn_err(CE_CONT, " <%s,%s> <0x%x, 0x%x, 0x%d> offset %d " 929 "len %d handle 0x%x\n", ddi_get_name(dip), ddi_get_name(rdip), 930 rp->regspec_bustype, rp->regspec_addr, rp->regspec_size, 931 offset, len, mp->map_handlep); 932 #endif /* DDI_MAP_DEBUG */ 933 934 /* 935 * Apply any parent ranges at this level, if applicable. 936 * (This is where nexus specific regspec translation takes place. 937 * Use of this function is implicit agreement that translation is 938 * provided via ddi_apply_range.) 939 */ 940 941 #ifdef DDI_MAP_DEBUG 942 ddi_map_debug("applying range of parent <%s> to child <%s>...\n", 943 ddi_get_name(dip), ddi_get_name(rdip)); 944 #endif /* DDI_MAP_DEBUG */ 945 946 if ((error = i_ddi_apply_range(dip, rdip, mp->map_obj.rp)) != 0) 947 return (error); 948 949 switch (mp->map_op) { 950 case DDI_MO_MAP_LOCKED: 951 952 /* 953 * Set up the locked down kernel mapping to the regspec... 954 */ 955 956 return (rootnex_map_regspec(mp, vaddrp)); 957 958 case DDI_MO_UNMAP: 959 960 /* 961 * Release mapping... 962 */ 963 964 return (rootnex_unmap_regspec(mp, vaddrp)); 965 966 case DDI_MO_MAP_HANDLE: 967 968 return (rootnex_map_handle(mp)); 969 970 default: 971 return (DDI_ME_UNIMPLEMENTED); 972 } 973 } 974 975 976 /* 977 * rootnex_map_fault() 978 * 979 * fault in mappings for requestors 980 */ 981 /*ARGSUSED*/ 982 static int 983 rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip, struct hat *hat, 984 struct seg *seg, caddr_t addr, struct devpage *dp, pfn_t pfn, uint_t prot, 985 uint_t lock) 986 { 987 988 #ifdef DDI_MAP_DEBUG 989 ddi_map_debug("rootnex_map_fault: address <%x> pfn <%x>", addr, pfn); 990 ddi_map_debug(" Seg <%s>\n", 991 seg->s_ops == &segdev_ops ? "segdev" : 992 seg == &kvseg ? "segkmem" : "NONE!"); 993 #endif /* DDI_MAP_DEBUG */ 994 995 /* 996 * This is all terribly broken, but it is a start 997 * 998 * XXX Note that this test means that segdev_ops 999 * must be exported from seg_dev.c. 1000 * XXX What about devices with their own segment drivers? 1001 */ 1002 if (seg->s_ops == &segdev_ops) { 1003 struct segdev_data *sdp = (struct segdev_data *)seg->s_data; 1004 1005 if (hat == NULL) { 1006 /* 1007 * This is one plausible interpretation of 1008 * a null hat i.e. use the first hat on the 1009 * address space hat list which by convention is 1010 * the hat of the system MMU. At alternative 1011 * would be to panic .. this might well be better .. 1012 */ 1013 ASSERT(AS_READ_HELD(seg->s_as, &seg->s_as->a_lock)); 1014 hat = seg->s_as->a_hat; 1015 cmn_err(CE_NOTE, "rootnex_map_fault: nil hat"); 1016 } 1017 hat_devload(hat, addr, MMU_PAGESIZE, pfn, prot | sdp->hat_attr, 1018 (lock ? HAT_LOAD_LOCK : HAT_LOAD)); 1019 } else if (seg == &kvseg && dp == NULL) { 1020 hat_devload(kas.a_hat, addr, MMU_PAGESIZE, pfn, prot, 1021 HAT_LOAD_LOCK); 1022 } else 1023 return (DDI_FAILURE); 1024 return (DDI_SUCCESS); 1025 } 1026 1027 1028 /* 1029 * rootnex_map_regspec() 1030 * we don't support mapping of I/O cards above 4Gb 1031 */ 1032 static int 1033 rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp) 1034 { 1035 rootnex_addr_t rbase; 1036 void *cvaddr; 1037 uint_t npages, pgoffset; 1038 struct regspec *rp; 1039 ddi_acc_hdl_t *hp; 1040 ddi_acc_impl_t *ap; 1041 uint_t hat_acc_flags; 1042 paddr_t pbase; 1043 1044 rp = mp->map_obj.rp; 1045 hp = mp->map_handlep; 1046 1047 #ifdef DDI_MAP_DEBUG 1048 ddi_map_debug( 1049 "rootnex_map_regspec: <0x%x 0x%x 0x%x> handle 0x%x\n", 1050 rp->regspec_bustype, rp->regspec_addr, 1051 rp->regspec_size, mp->map_handlep); 1052 #endif /* DDI_MAP_DEBUG */ 1053 1054 /* 1055 * I/O or memory mapping 1056 * 1057 * <bustype=0, addr=x, len=x>: memory 1058 * <bustype=1, addr=x, len=x>: i/o 1059 * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1060 */ 1061 1062 if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) { 1063 cmn_err(CE_WARN, "rootnex: invalid register spec" 1064 " <0x%x, 0x%x, 0x%x>", rp->regspec_bustype, 1065 rp->regspec_addr, rp->regspec_size); 1066 return (DDI_FAILURE); 1067 } 1068 1069 if (rp->regspec_bustype != 0) { 1070 /* 1071 * I/O space - needs a handle. 1072 */ 1073 if (hp == NULL) { 1074 return (DDI_FAILURE); 1075 } 1076 ap = (ddi_acc_impl_t *)hp->ah_platform_private; 1077 ap->ahi_acc_attr |= DDI_ACCATTR_IO_SPACE; 1078 impl_acc_hdl_init(hp); 1079 1080 if (mp->map_flags & DDI_MF_DEVICE_MAPPING) { 1081 #ifdef DDI_MAP_DEBUG 1082 ddi_map_debug("rootnex_map_regspec: mmap() " 1083 "to I/O space is not supported.\n"); 1084 #endif /* DDI_MAP_DEBUG */ 1085 return (DDI_ME_INVAL); 1086 } else { 1087 /* 1088 * 1275-compliant vs. compatibility i/o mapping 1089 */ 1090 *vaddrp = 1091 (rp->regspec_bustype > 1 && rp->regspec_addr == 0) ? 1092 ((caddr_t)(uintptr_t)rp->regspec_bustype) : 1093 ((caddr_t)(uintptr_t)rp->regspec_addr); 1094 #ifdef __xpv 1095 if (DOMAIN_IS_INITDOMAIN(xen_info)) { 1096 hp->ah_pfn = xen_assign_pfn( 1097 mmu_btop((ulong_t)rp->regspec_addr & 1098 MMU_PAGEMASK)); 1099 } else { 1100 hp->ah_pfn = mmu_btop( 1101 (ulong_t)rp->regspec_addr & MMU_PAGEMASK); 1102 } 1103 #else 1104 hp->ah_pfn = mmu_btop((ulong_t)rp->regspec_addr & 1105 MMU_PAGEMASK); 1106 #endif 1107 hp->ah_pnum = mmu_btopr(rp->regspec_size + 1108 (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET); 1109 } 1110 1111 #ifdef DDI_MAP_DEBUG 1112 ddi_map_debug( 1113 "rootnex_map_regspec: \"Mapping\" %d bytes I/O space at 0x%x\n", 1114 rp->regspec_size, *vaddrp); 1115 #endif /* DDI_MAP_DEBUG */ 1116 return (DDI_SUCCESS); 1117 } 1118 1119 /* 1120 * Memory space 1121 */ 1122 1123 if (hp != NULL) { 1124 /* 1125 * hat layer ignores 1126 * hp->ah_acc.devacc_attr_endian_flags. 1127 */ 1128 switch (hp->ah_acc.devacc_attr_dataorder) { 1129 case DDI_STRICTORDER_ACC: 1130 hat_acc_flags = HAT_STRICTORDER; 1131 break; 1132 case DDI_UNORDERED_OK_ACC: 1133 hat_acc_flags = HAT_UNORDERED_OK; 1134 break; 1135 case DDI_MERGING_OK_ACC: 1136 hat_acc_flags = HAT_MERGING_OK; 1137 break; 1138 case DDI_LOADCACHING_OK_ACC: 1139 hat_acc_flags = HAT_LOADCACHING_OK; 1140 break; 1141 case DDI_STORECACHING_OK_ACC: 1142 hat_acc_flags = HAT_STORECACHING_OK; 1143 break; 1144 } 1145 ap = (ddi_acc_impl_t *)hp->ah_platform_private; 1146 ap->ahi_acc_attr |= DDI_ACCATTR_CPU_VADDR; 1147 impl_acc_hdl_init(hp); 1148 hp->ah_hat_flags = hat_acc_flags; 1149 } else { 1150 hat_acc_flags = HAT_STRICTORDER; 1151 } 1152 1153 rbase = (rootnex_addr_t)(rp->regspec_addr & MMU_PAGEMASK); 1154 #ifdef __xpv 1155 /* 1156 * If we're dom0, we're using a real device so we need to translate 1157 * the MA to a PA. 1158 */ 1159 if (DOMAIN_IS_INITDOMAIN(xen_info)) { 1160 pbase = pfn_to_pa(xen_assign_pfn(mmu_btop(rbase))); 1161 } else { 1162 pbase = rbase; 1163 } 1164 #else 1165 pbase = rbase; 1166 #endif 1167 pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET; 1168 1169 if (rp->regspec_size == 0) { 1170 #ifdef DDI_MAP_DEBUG 1171 ddi_map_debug("rootnex_map_regspec: zero regspec_size\n"); 1172 #endif /* DDI_MAP_DEBUG */ 1173 return (DDI_ME_INVAL); 1174 } 1175 1176 if (mp->map_flags & DDI_MF_DEVICE_MAPPING) { 1177 /* extra cast to make gcc happy */ 1178 *vaddrp = (caddr_t)((uintptr_t)mmu_btop(pbase)); 1179 } else { 1180 npages = mmu_btopr(rp->regspec_size + pgoffset); 1181 1182 #ifdef DDI_MAP_DEBUG 1183 ddi_map_debug("rootnex_map_regspec: Mapping %d pages " 1184 "physical %llx", npages, pbase); 1185 #endif /* DDI_MAP_DEBUG */ 1186 1187 cvaddr = device_arena_alloc(ptob(npages), VM_NOSLEEP); 1188 if (cvaddr == NULL) 1189 return (DDI_ME_NORESOURCES); 1190 1191 /* 1192 * Now map in the pages we've allocated... 1193 */ 1194 hat_devload(kas.a_hat, cvaddr, mmu_ptob(npages), 1195 mmu_btop(pbase), mp->map_prot | hat_acc_flags, 1196 HAT_LOAD_LOCK); 1197 *vaddrp = (caddr_t)cvaddr + pgoffset; 1198 1199 /* save away pfn and npages for FMA */ 1200 hp = mp->map_handlep; 1201 if (hp) { 1202 hp->ah_pfn = mmu_btop(pbase); 1203 hp->ah_pnum = npages; 1204 } 1205 } 1206 1207 #ifdef DDI_MAP_DEBUG 1208 ddi_map_debug("at virtual 0x%x\n", *vaddrp); 1209 #endif /* DDI_MAP_DEBUG */ 1210 return (DDI_SUCCESS); 1211 } 1212 1213 1214 /* 1215 * rootnex_unmap_regspec() 1216 * 1217 */ 1218 static int 1219 rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp) 1220 { 1221 caddr_t addr = (caddr_t)*vaddrp; 1222 uint_t npages, pgoffset; 1223 struct regspec *rp; 1224 1225 if (mp->map_flags & DDI_MF_DEVICE_MAPPING) 1226 return (0); 1227 1228 rp = mp->map_obj.rp; 1229 1230 if (rp->regspec_size == 0) { 1231 #ifdef DDI_MAP_DEBUG 1232 ddi_map_debug("rootnex_unmap_regspec: zero regspec_size\n"); 1233 #endif /* DDI_MAP_DEBUG */ 1234 return (DDI_ME_INVAL); 1235 } 1236 1237 /* 1238 * I/O or memory mapping: 1239 * 1240 * <bustype=0, addr=x, len=x>: memory 1241 * <bustype=1, addr=x, len=x>: i/o 1242 * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1243 */ 1244 if (rp->regspec_bustype != 0) { 1245 /* 1246 * This is I/O space, which requires no particular 1247 * processing on unmap since it isn't mapped in the 1248 * first place. 1249 */ 1250 return (DDI_SUCCESS); 1251 } 1252 1253 /* 1254 * Memory space 1255 */ 1256 pgoffset = (uintptr_t)addr & MMU_PAGEOFFSET; 1257 npages = mmu_btopr(rp->regspec_size + pgoffset); 1258 hat_unload(kas.a_hat, addr - pgoffset, ptob(npages), HAT_UNLOAD_UNLOCK); 1259 device_arena_free(addr - pgoffset, ptob(npages)); 1260 1261 /* 1262 * Destroy the pointer - the mapping has logically gone 1263 */ 1264 *vaddrp = NULL; 1265 1266 return (DDI_SUCCESS); 1267 } 1268 1269 1270 /* 1271 * rootnex_map_handle() 1272 * 1273 */ 1274 static int 1275 rootnex_map_handle(ddi_map_req_t *mp) 1276 { 1277 rootnex_addr_t rbase; 1278 ddi_acc_hdl_t *hp; 1279 uint_t pgoffset; 1280 struct regspec *rp; 1281 paddr_t pbase; 1282 1283 rp = mp->map_obj.rp; 1284 1285 #ifdef DDI_MAP_DEBUG 1286 ddi_map_debug( 1287 "rootnex_map_handle: <0x%x 0x%x 0x%x> handle 0x%x\n", 1288 rp->regspec_bustype, rp->regspec_addr, 1289 rp->regspec_size, mp->map_handlep); 1290 #endif /* DDI_MAP_DEBUG */ 1291 1292 /* 1293 * I/O or memory mapping: 1294 * 1295 * <bustype=0, addr=x, len=x>: memory 1296 * <bustype=1, addr=x, len=x>: i/o 1297 * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1298 */ 1299 if (rp->regspec_bustype != 0) { 1300 /* 1301 * This refers to I/O space, and we don't support "mapping" 1302 * I/O space to a user. 1303 */ 1304 return (DDI_FAILURE); 1305 } 1306 1307 /* 1308 * Set up the hat_flags for the mapping. 1309 */ 1310 hp = mp->map_handlep; 1311 1312 switch (hp->ah_acc.devacc_attr_endian_flags) { 1313 case DDI_NEVERSWAP_ACC: 1314 hp->ah_hat_flags = HAT_NEVERSWAP | HAT_STRICTORDER; 1315 break; 1316 case DDI_STRUCTURE_LE_ACC: 1317 hp->ah_hat_flags = HAT_STRUCTURE_LE; 1318 break; 1319 case DDI_STRUCTURE_BE_ACC: 1320 return (DDI_FAILURE); 1321 default: 1322 return (DDI_REGS_ACC_CONFLICT); 1323 } 1324 1325 switch (hp->ah_acc.devacc_attr_dataorder) { 1326 case DDI_STRICTORDER_ACC: 1327 break; 1328 case DDI_UNORDERED_OK_ACC: 1329 hp->ah_hat_flags |= HAT_UNORDERED_OK; 1330 break; 1331 case DDI_MERGING_OK_ACC: 1332 hp->ah_hat_flags |= HAT_MERGING_OK; 1333 break; 1334 case DDI_LOADCACHING_OK_ACC: 1335 hp->ah_hat_flags |= HAT_LOADCACHING_OK; 1336 break; 1337 case DDI_STORECACHING_OK_ACC: 1338 hp->ah_hat_flags |= HAT_STORECACHING_OK; 1339 break; 1340 default: 1341 return (DDI_FAILURE); 1342 } 1343 1344 rbase = (rootnex_addr_t)rp->regspec_addr & 1345 (~(rootnex_addr_t)MMU_PAGEOFFSET); 1346 pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET; 1347 1348 if (rp->regspec_size == 0) 1349 return (DDI_ME_INVAL); 1350 1351 #ifdef __xpv 1352 /* 1353 * If we're dom0, we're using a real device so we need to translate 1354 * the MA to a PA. 1355 */ 1356 if (DOMAIN_IS_INITDOMAIN(xen_info)) { 1357 pbase = pfn_to_pa(xen_assign_pfn(mmu_btop(rbase))) | 1358 (rbase & MMU_PAGEOFFSET); 1359 } else { 1360 pbase = rbase; 1361 } 1362 #else 1363 pbase = rbase; 1364 #endif 1365 1366 hp->ah_pfn = mmu_btop(pbase); 1367 hp->ah_pnum = mmu_btopr(rp->regspec_size + pgoffset); 1368 1369 return (DDI_SUCCESS); 1370 } 1371 1372 1373 1374 /* 1375 * ************************ 1376 * interrupt related code 1377 * ************************ 1378 */ 1379 1380 /* 1381 * rootnex_intr_ops() 1382 * bus_intr_op() function for interrupt support 1383 */ 1384 /* ARGSUSED */ 1385 static int 1386 rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip, ddi_intr_op_t intr_op, 1387 ddi_intr_handle_impl_t *hdlp, void *result) 1388 { 1389 struct intrspec *ispec; 1390 1391 DDI_INTR_NEXDBG((CE_CONT, 1392 "rootnex_intr_ops: pdip = %p, rdip = %p, intr_op = %x, hdlp = %p\n", 1393 (void *)pdip, (void *)rdip, intr_op, (void *)hdlp)); 1394 1395 /* Process the interrupt operation */ 1396 switch (intr_op) { 1397 case DDI_INTROP_GETCAP: 1398 /* First check with pcplusmp */ 1399 if (psm_intr_ops == NULL) 1400 return (DDI_FAILURE); 1401 1402 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_CAP, result)) { 1403 *(int *)result = 0; 1404 return (DDI_FAILURE); 1405 } 1406 break; 1407 case DDI_INTROP_SETCAP: 1408 if (psm_intr_ops == NULL) 1409 return (DDI_FAILURE); 1410 1411 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_CAP, result)) 1412 return (DDI_FAILURE); 1413 break; 1414 case DDI_INTROP_ALLOC: 1415 ASSERT(hdlp->ih_type == DDI_INTR_TYPE_FIXED); 1416 return (rootnex_alloc_intr_fixed(rdip, hdlp, result)); 1417 case DDI_INTROP_FREE: 1418 ASSERT(hdlp->ih_type == DDI_INTR_TYPE_FIXED); 1419 return (rootnex_free_intr_fixed(rdip, hdlp)); 1420 case DDI_INTROP_GETPRI: 1421 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 1422 return (DDI_FAILURE); 1423 *(int *)result = ispec->intrspec_pri; 1424 break; 1425 case DDI_INTROP_SETPRI: 1426 /* Validate the interrupt priority passed to us */ 1427 if (*(int *)result > LOCK_LEVEL) 1428 return (DDI_FAILURE); 1429 1430 /* Ensure that PSM is all initialized and ispec is ok */ 1431 if ((psm_intr_ops == NULL) || 1432 ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)) 1433 return (DDI_FAILURE); 1434 1435 /* Change the priority */ 1436 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_PRI, result) == 1437 PSM_FAILURE) 1438 return (DDI_FAILURE); 1439 1440 /* update the ispec with the new priority */ 1441 ispec->intrspec_pri = *(int *)result; 1442 break; 1443 case DDI_INTROP_ADDISR: 1444 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 1445 return (DDI_FAILURE); 1446 ispec->intrspec_func = hdlp->ih_cb_func; 1447 break; 1448 case DDI_INTROP_REMISR: 1449 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 1450 return (DDI_FAILURE); 1451 ispec->intrspec_func = (uint_t (*)()) 0; 1452 break; 1453 case DDI_INTROP_ENABLE: 1454 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 1455 return (DDI_FAILURE); 1456 1457 /* Call psmi to translate irq with the dip */ 1458 if (psm_intr_ops == NULL) 1459 return (DDI_FAILURE); 1460 1461 ((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec; 1462 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_XLATE_VECTOR, 1463 (int *)&hdlp->ih_vector) == PSM_FAILURE) 1464 return (DDI_FAILURE); 1465 1466 /* Add the interrupt handler */ 1467 if (!add_avintr((void *)hdlp, ispec->intrspec_pri, 1468 hdlp->ih_cb_func, DEVI(rdip)->devi_name, hdlp->ih_vector, 1469 hdlp->ih_cb_arg1, hdlp->ih_cb_arg2, NULL, rdip)) 1470 return (DDI_FAILURE); 1471 break; 1472 case DDI_INTROP_DISABLE: 1473 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 1474 return (DDI_FAILURE); 1475 1476 /* Call psm_ops() to translate irq with the dip */ 1477 if (psm_intr_ops == NULL) 1478 return (DDI_FAILURE); 1479 1480 ((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec; 1481 (void) (*psm_intr_ops)(rdip, hdlp, 1482 PSM_INTR_OP_XLATE_VECTOR, (int *)&hdlp->ih_vector); 1483 1484 /* Remove the interrupt handler */ 1485 rem_avintr((void *)hdlp, ispec->intrspec_pri, 1486 hdlp->ih_cb_func, hdlp->ih_vector); 1487 break; 1488 case DDI_INTROP_SETMASK: 1489 if (psm_intr_ops == NULL) 1490 return (DDI_FAILURE); 1491 1492 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_MASK, NULL)) 1493 return (DDI_FAILURE); 1494 break; 1495 case DDI_INTROP_CLRMASK: 1496 if (psm_intr_ops == NULL) 1497 return (DDI_FAILURE); 1498 1499 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_CLEAR_MASK, NULL)) 1500 return (DDI_FAILURE); 1501 break; 1502 case DDI_INTROP_GETPENDING: 1503 if (psm_intr_ops == NULL) 1504 return (DDI_FAILURE); 1505 1506 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_PENDING, 1507 result)) { 1508 *(int *)result = 0; 1509 return (DDI_FAILURE); 1510 } 1511 break; 1512 case DDI_INTROP_NAVAIL: 1513 case DDI_INTROP_NINTRS: 1514 *(int *)result = i_ddi_get_intx_nintrs(rdip); 1515 if (*(int *)result == 0) { 1516 /* 1517 * Special case for 'pcic' driver' only. This driver 1518 * driver is a child of 'isa' and 'rootnex' drivers. 1519 * 1520 * See detailed comments on this in the function 1521 * rootnex_get_ispec(). 1522 * 1523 * Children of 'pcic' send 'NINITR' request all the 1524 * way to rootnex driver. But, the 'pdp->par_nintr' 1525 * field may not initialized. So, we fake it here 1526 * to return 1 (a la what PCMCIA nexus does). 1527 */ 1528 if (strcmp(ddi_get_name(rdip), "pcic") == 0) 1529 *(int *)result = 1; 1530 else 1531 return (DDI_FAILURE); 1532 } 1533 break; 1534 case DDI_INTROP_SUPPORTED_TYPES: 1535 *(int *)result = DDI_INTR_TYPE_FIXED; /* Always ... */ 1536 break; 1537 default: 1538 return (DDI_FAILURE); 1539 } 1540 1541 return (DDI_SUCCESS); 1542 } 1543 1544 1545 /* 1546 * rootnex_get_ispec() 1547 * convert an interrupt number to an interrupt specification. 1548 * The interrupt number determines which interrupt spec will be 1549 * returned if more than one exists. 1550 * 1551 * Look into the parent private data area of the 'rdip' to find out 1552 * the interrupt specification. First check to make sure there is 1553 * one that matchs "inumber" and then return a pointer to it. 1554 * 1555 * Return NULL if one could not be found. 1556 * 1557 * NOTE: This is needed for rootnex_intr_ops() 1558 */ 1559 static struct intrspec * 1560 rootnex_get_ispec(dev_info_t *rdip, int inum) 1561 { 1562 struct ddi_parent_private_data *pdp = ddi_get_parent_data(rdip); 1563 1564 /* 1565 * Special case handling for drivers that provide their own 1566 * intrspec structures instead of relying on the DDI framework. 1567 * 1568 * A broken hardware driver in ON could potentially provide its 1569 * own intrspec structure, instead of relying on the hardware. 1570 * If these drivers are children of 'rootnex' then we need to 1571 * continue to provide backward compatibility to them here. 1572 * 1573 * Following check is a special case for 'pcic' driver which 1574 * was found to have broken hardwre andby provides its own intrspec. 1575 * 1576 * Verbatim comments from this driver are shown here: 1577 * "Don't use the ddi_add_intr since we don't have a 1578 * default intrspec in all cases." 1579 * 1580 * Since an 'ispec' may not be always created for it, 1581 * check for that and create one if so. 1582 * 1583 * NOTE: Currently 'pcic' is the only driver found to do this. 1584 */ 1585 if (!pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) { 1586 pdp->par_nintr = 1; 1587 pdp->par_intr = kmem_zalloc(sizeof (struct intrspec) * 1588 pdp->par_nintr, KM_SLEEP); 1589 } 1590 1591 /* Validate the interrupt number */ 1592 if (inum >= pdp->par_nintr) 1593 return (NULL); 1594 1595 /* Get the interrupt structure pointer and return that */ 1596 return ((struct intrspec *)&pdp->par_intr[inum]); 1597 } 1598 1599 /* 1600 * Allocate interrupt vector for FIXED (legacy) type. 1601 */ 1602 static int 1603 rootnex_alloc_intr_fixed(dev_info_t *rdip, ddi_intr_handle_impl_t *hdlp, 1604 void *result) 1605 { 1606 struct intrspec *ispec; 1607 ddi_intr_handle_impl_t info_hdl; 1608 int ret; 1609 int free_phdl = 0; 1610 apic_get_type_t type_info; 1611 1612 if (psm_intr_ops == NULL) 1613 return (DDI_FAILURE); 1614 1615 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 1616 return (DDI_FAILURE); 1617 1618 /* 1619 * If the PSM module is "APIX" then pass the request for it 1620 * to allocate the vector now. 1621 */ 1622 bzero(&info_hdl, sizeof (ddi_intr_handle_impl_t)); 1623 info_hdl.ih_private = &type_info; 1624 if ((*psm_intr_ops)(NULL, &info_hdl, PSM_INTR_OP_APIC_TYPE, NULL) == 1625 PSM_SUCCESS && strcmp(type_info.avgi_type, APIC_APIX_NAME) == 0) { 1626 if (hdlp->ih_private == NULL) { /* allocate phdl structure */ 1627 free_phdl = 1; 1628 i_ddi_alloc_intr_phdl(hdlp); 1629 } 1630 ((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec; 1631 ret = (*psm_intr_ops)(rdip, hdlp, 1632 PSM_INTR_OP_ALLOC_VECTORS, result); 1633 if (free_phdl) { /* free up the phdl structure */ 1634 free_phdl = 0; 1635 i_ddi_free_intr_phdl(hdlp); 1636 hdlp->ih_private = NULL; 1637 } 1638 } else { 1639 /* 1640 * No APIX module; fall back to the old scheme where the 1641 * interrupt vector is allocated during ddi_enable_intr() call. 1642 */ 1643 hdlp->ih_pri = ispec->intrspec_pri; 1644 *(int *)result = hdlp->ih_scratch1; 1645 ret = DDI_SUCCESS; 1646 } 1647 1648 return (ret); 1649 } 1650 1651 /* 1652 * Free up interrupt vector for FIXED (legacy) type. 1653 */ 1654 static int 1655 rootnex_free_intr_fixed(dev_info_t *rdip, ddi_intr_handle_impl_t *hdlp) 1656 { 1657 struct intrspec *ispec; 1658 struct ddi_parent_private_data *pdp; 1659 ddi_intr_handle_impl_t info_hdl; 1660 int ret; 1661 apic_get_type_t type_info; 1662 1663 if (psm_intr_ops == NULL) 1664 return (DDI_FAILURE); 1665 1666 /* 1667 * If the PSM module is "APIX" then pass the request for it 1668 * to free up the vector now. 1669 */ 1670 bzero(&info_hdl, sizeof (ddi_intr_handle_impl_t)); 1671 info_hdl.ih_private = &type_info; 1672 if ((*psm_intr_ops)(NULL, &info_hdl, PSM_INTR_OP_APIC_TYPE, NULL) == 1673 PSM_SUCCESS && strcmp(type_info.avgi_type, APIC_APIX_NAME) == 0) { 1674 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 1675 return (DDI_FAILURE); 1676 ((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec; 1677 ret = (*psm_intr_ops)(rdip, hdlp, 1678 PSM_INTR_OP_FREE_VECTORS, NULL); 1679 } else { 1680 /* 1681 * No APIX module; fall back to the old scheme where 1682 * the interrupt vector was already freed during 1683 * ddi_disable_intr() call. 1684 */ 1685 ret = DDI_SUCCESS; 1686 } 1687 1688 pdp = ddi_get_parent_data(rdip); 1689 1690 /* 1691 * Special case for 'pcic' driver' only. 1692 * If an intrspec was created for it, clean it up here 1693 * See detailed comments on this in the function 1694 * rootnex_get_ispec(). 1695 */ 1696 if (pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) { 1697 kmem_free(pdp->par_intr, sizeof (struct intrspec) * 1698 pdp->par_nintr); 1699 /* 1700 * Set it to zero; so that 1701 * DDI framework doesn't free it again 1702 */ 1703 pdp->par_intr = NULL; 1704 pdp->par_nintr = 0; 1705 } 1706 1707 return (ret); 1708 } 1709 1710 1711 /* 1712 * ****************** 1713 * dma related code 1714 * ****************** 1715 */ 1716 1717 /*ARGSUSED*/ 1718 static int 1719 rootnex_coredma_allochdl(dev_info_t *dip, dev_info_t *rdip, 1720 ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg, 1721 ddi_dma_handle_t *handlep) 1722 { 1723 uint64_t maxsegmentsize_ll; 1724 uint_t maxsegmentsize; 1725 ddi_dma_impl_t *hp; 1726 rootnex_dma_t *dma; 1727 uint64_t count_max; 1728 uint64_t seg; 1729 int kmflag; 1730 int e; 1731 1732 1733 /* convert our sleep flags */ 1734 if (waitfp == DDI_DMA_SLEEP) { 1735 kmflag = KM_SLEEP; 1736 } else { 1737 kmflag = KM_NOSLEEP; 1738 } 1739 1740 /* 1741 * We try to do only one memory allocation here. We'll do a little 1742 * pointer manipulation later. If the bind ends up taking more than 1743 * our prealloc's space, we'll have to allocate more memory in the 1744 * bind operation. Not great, but much better than before and the 1745 * best we can do with the current bind interfaces. 1746 */ 1747 hp = kmem_cache_alloc(rootnex_state->r_dmahdl_cache, kmflag); 1748 if (hp == NULL) 1749 return (DDI_DMA_NORESOURCES); 1750 1751 /* Do our pointer manipulation now, align the structures */ 1752 hp->dmai_private = (void *)(((uintptr_t)hp + 1753 (uintptr_t)sizeof (ddi_dma_impl_t) + 0x7) & ~0x7); 1754 dma = (rootnex_dma_t *)hp->dmai_private; 1755 dma->dp_prealloc_buffer = (uchar_t *)(((uintptr_t)dma + 1756 sizeof (rootnex_dma_t) + 0x7) & ~0x7); 1757 1758 /* setup the handle */ 1759 rootnex_clean_dmahdl(hp); 1760 hp->dmai_error.err_fep = NULL; 1761 hp->dmai_error.err_cf = NULL; 1762 dma->dp_dip = rdip; 1763 dma->dp_sglinfo.si_flags = attr->dma_attr_flags; 1764 dma->dp_sglinfo.si_min_addr = attr->dma_attr_addr_lo; 1765 1766 /* 1767 * The BOUNCE_ON_SEG workaround is not needed when an IOMMU 1768 * is being used. Set the upper limit to the seg value. 1769 * There will be enough DVMA space to always get addresses 1770 * that will match the constraints. 1771 */ 1772 if (IOMMU_USED(rdip) && 1773 (attr->dma_attr_flags & _DDI_DMA_BOUNCE_ON_SEG)) { 1774 dma->dp_sglinfo.si_max_addr = attr->dma_attr_seg; 1775 dma->dp_sglinfo.si_flags &= ~_DDI_DMA_BOUNCE_ON_SEG; 1776 } else 1777 dma->dp_sglinfo.si_max_addr = attr->dma_attr_addr_hi; 1778 1779 hp->dmai_minxfer = attr->dma_attr_minxfer; 1780 hp->dmai_burstsizes = attr->dma_attr_burstsizes; 1781 hp->dmai_rdip = rdip; 1782 hp->dmai_attr = *attr; 1783 1784 if (attr->dma_attr_seg >= dma->dp_sglinfo.si_max_addr) 1785 dma->dp_sglinfo.si_cancross = B_FALSE; 1786 else 1787 dma->dp_sglinfo.si_cancross = B_TRUE; 1788 1789 /* we don't need to worry about the SPL since we do a tryenter */ 1790 mutex_init(&dma->dp_mutex, NULL, MUTEX_DRIVER, NULL); 1791 1792 /* 1793 * Figure out our maximum segment size. If the segment size is greater 1794 * than 4G, we will limit it to (4G - 1) since the max size of a dma 1795 * object (ddi_dma_obj_t.dmao_size) is 32 bits. dma_attr_seg and 1796 * dma_attr_count_max are size-1 type values. 1797 * 1798 * Maximum segment size is the largest physically contiguous chunk of 1799 * memory that we can return from a bind (i.e. the maximum size of a 1800 * single cookie). 1801 */ 1802 1803 /* handle the rollover cases */ 1804 seg = attr->dma_attr_seg + 1; 1805 if (seg < attr->dma_attr_seg) { 1806 seg = attr->dma_attr_seg; 1807 } 1808 count_max = attr->dma_attr_count_max + 1; 1809 if (count_max < attr->dma_attr_count_max) { 1810 count_max = attr->dma_attr_count_max; 1811 } 1812 1813 /* 1814 * granularity may or may not be a power of two. If it isn't, we can't 1815 * use a simple mask. 1816 */ 1817 if (attr->dma_attr_granular & (attr->dma_attr_granular - 1)) { 1818 dma->dp_granularity_power_2 = B_FALSE; 1819 } else { 1820 dma->dp_granularity_power_2 = B_TRUE; 1821 } 1822 1823 /* 1824 * maxxfer should be a whole multiple of granularity. If we're going to 1825 * break up a window because we're greater than maxxfer, we might as 1826 * well make sure it's maxxfer is a whole multiple so we don't have to 1827 * worry about triming the window later on for this case. 1828 */ 1829 if (attr->dma_attr_granular > 1) { 1830 if (dma->dp_granularity_power_2) { 1831 dma->dp_maxxfer = attr->dma_attr_maxxfer - 1832 (attr->dma_attr_maxxfer & 1833 (attr->dma_attr_granular - 1)); 1834 } else { 1835 dma->dp_maxxfer = attr->dma_attr_maxxfer - 1836 (attr->dma_attr_maxxfer % attr->dma_attr_granular); 1837 } 1838 } else { 1839 dma->dp_maxxfer = attr->dma_attr_maxxfer; 1840 } 1841 1842 maxsegmentsize_ll = MIN(seg, dma->dp_maxxfer); 1843 maxsegmentsize_ll = MIN(maxsegmentsize_ll, count_max); 1844 if (maxsegmentsize_ll == 0 || (maxsegmentsize_ll > 0xFFFFFFFF)) { 1845 maxsegmentsize = 0xFFFFFFFF; 1846 } else { 1847 maxsegmentsize = maxsegmentsize_ll; 1848 } 1849 dma->dp_sglinfo.si_max_cookie_size = maxsegmentsize; 1850 dma->dp_sglinfo.si_segmask = attr->dma_attr_seg; 1851 1852 /* check the ddi_dma_attr arg to make sure it makes a little sense */ 1853 if (rootnex_alloc_check_parms) { 1854 e = rootnex_valid_alloc_parms(attr, maxsegmentsize); 1855 if (e != DDI_SUCCESS) { 1856 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_ALLOC_FAIL]); 1857 (void) rootnex_dma_freehdl(dip, rdip, 1858 (ddi_dma_handle_t)hp); 1859 return (e); 1860 } 1861 } 1862 1863 *handlep = (ddi_dma_handle_t)hp; 1864 1865 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1866 ROOTNEX_DPROBE1(rootnex__alloc__handle, uint64_t, 1867 rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1868 1869 return (DDI_SUCCESS); 1870 } 1871 1872 1873 /* 1874 * rootnex_dma_allochdl() 1875 * called from ddi_dma_alloc_handle(). 1876 */ 1877 static int 1878 rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_attr_t *attr, 1879 int (*waitfp)(caddr_t), caddr_t arg, ddi_dma_handle_t *handlep) 1880 { 1881 int retval = DDI_SUCCESS; 1882 #if defined(__amd64) && !defined(__xpv) 1883 1884 if (IOMMU_UNITIALIZED(rdip)) { 1885 retval = iommulib_nex_open(dip, rdip); 1886 1887 if (retval != DDI_SUCCESS && retval != DDI_ENOTSUP) 1888 return (retval); 1889 } 1890 1891 if (IOMMU_UNUSED(rdip)) { 1892 retval = rootnex_coredma_allochdl(dip, rdip, attr, waitfp, arg, 1893 handlep); 1894 } else { 1895 retval = iommulib_nexdma_allochdl(dip, rdip, attr, 1896 waitfp, arg, handlep); 1897 } 1898 #else 1899 retval = rootnex_coredma_allochdl(dip, rdip, attr, waitfp, arg, 1900 handlep); 1901 #endif 1902 switch (retval) { 1903 case DDI_DMA_NORESOURCES: 1904 if (waitfp != DDI_DMA_DONTWAIT) { 1905 ddi_set_callback(waitfp, arg, 1906 &rootnex_state->r_dvma_call_list_id); 1907 } 1908 break; 1909 case DDI_SUCCESS: 1910 ndi_fmc_insert(rdip, DMA_HANDLE, *handlep, NULL); 1911 break; 1912 default: 1913 break; 1914 } 1915 return (retval); 1916 } 1917 1918 /*ARGSUSED*/ 1919 static int 1920 rootnex_coredma_freehdl(dev_info_t *dip, dev_info_t *rdip, 1921 ddi_dma_handle_t handle) 1922 { 1923 ddi_dma_impl_t *hp; 1924 rootnex_dma_t *dma; 1925 1926 1927 hp = (ddi_dma_impl_t *)handle; 1928 dma = (rootnex_dma_t *)hp->dmai_private; 1929 1930 /* unbind should have been called first */ 1931 ASSERT(!dma->dp_inuse); 1932 1933 mutex_destroy(&dma->dp_mutex); 1934 kmem_cache_free(rootnex_state->r_dmahdl_cache, hp); 1935 1936 ROOTNEX_DPROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1937 ROOTNEX_DPROBE1(rootnex__free__handle, uint64_t, 1938 rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1939 1940 return (DDI_SUCCESS); 1941 } 1942 1943 /* 1944 * rootnex_dma_freehdl() 1945 * called from ddi_dma_free_handle(). 1946 */ 1947 static int 1948 rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle) 1949 { 1950 int ret; 1951 1952 ndi_fmc_remove(rdip, DMA_HANDLE, handle); 1953 #if defined(__amd64) && !defined(__xpv) 1954 if (IOMMU_USED(rdip)) 1955 ret = iommulib_nexdma_freehdl(dip, rdip, handle); 1956 else 1957 #endif 1958 ret = rootnex_coredma_freehdl(dip, rdip, handle); 1959 1960 if (rootnex_state->r_dvma_call_list_id) 1961 ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 1962 1963 return (ret); 1964 } 1965 1966 /*ARGSUSED*/ 1967 static int 1968 rootnex_coredma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 1969 ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 1970 ddi_dma_cookie_t *cookiep, uint_t *ccountp) 1971 { 1972 rootnex_sglinfo_t *sinfo; 1973 ddi_dma_obj_t *dmao; 1974 #if defined(__amd64) && !defined(__xpv) 1975 struct dvmaseg *dvs; 1976 ddi_dma_cookie_t *cookie; 1977 #endif 1978 ddi_dma_attr_t *attr; 1979 ddi_dma_impl_t *hp; 1980 rootnex_dma_t *dma; 1981 int kmflag; 1982 int e; 1983 uint_t ncookies; 1984 1985 hp = (ddi_dma_impl_t *)handle; 1986 dma = (rootnex_dma_t *)hp->dmai_private; 1987 dmao = &dma->dp_dma; 1988 sinfo = &dma->dp_sglinfo; 1989 attr = &hp->dmai_attr; 1990 1991 if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 1992 dma->dp_sleep_flags = KM_SLEEP; 1993 } else { 1994 dma->dp_sleep_flags = KM_NOSLEEP; 1995 } 1996 1997 hp->dmai_rflags = dmareq->dmar_flags & DMP_DDIFLAGS; 1998 1999 /* 2000 * This is useful for debugging a driver. Not as useful in a production 2001 * system. The only time this will fail is if you have a driver bug. 2002 */ 2003 if (rootnex_bind_check_inuse) { 2004 /* 2005 * No one else should ever have this lock unless someone else 2006 * is trying to use this handle. So contention on the lock 2007 * is the same as inuse being set. 2008 */ 2009 e = mutex_tryenter(&dma->dp_mutex); 2010 if (e == 0) { 2011 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 2012 return (DDI_DMA_INUSE); 2013 } 2014 if (dma->dp_inuse) { 2015 mutex_exit(&dma->dp_mutex); 2016 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 2017 return (DDI_DMA_INUSE); 2018 } 2019 dma->dp_inuse = B_TRUE; 2020 mutex_exit(&dma->dp_mutex); 2021 } 2022 2023 /* check the ddi_dma_attr arg to make sure it makes a little sense */ 2024 if (rootnex_bind_check_parms) { 2025 e = rootnex_valid_bind_parms(dmareq, attr); 2026 if (e != DDI_SUCCESS) { 2027 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 2028 rootnex_clean_dmahdl(hp); 2029 return (e); 2030 } 2031 } 2032 2033 /* save away the original bind info */ 2034 dma->dp_dma = dmareq->dmar_object; 2035 2036 #if defined(__amd64) && !defined(__xpv) 2037 if (IOMMU_USED(rdip)) { 2038 dmao = &dma->dp_dvma; 2039 e = iommulib_nexdma_mapobject(dip, rdip, handle, dmareq, dmao); 2040 switch (e) { 2041 case DDI_SUCCESS: 2042 if (sinfo->si_cancross || 2043 dmao->dmao_obj.dvma_obj.dv_nseg != 1 || 2044 dmao->dmao_size > sinfo->si_max_cookie_size) { 2045 dma->dp_dvma_used = B_TRUE; 2046 break; 2047 } 2048 sinfo->si_sgl_size = 1; 2049 hp->dmai_rflags |= DMP_NOSYNC; 2050 2051 dma->dp_dvma_used = B_TRUE; 2052 dma->dp_need_to_free_cookie = B_FALSE; 2053 2054 dvs = &dmao->dmao_obj.dvma_obj.dv_seg[0]; 2055 cookie = hp->dmai_cookie = dma->dp_cookies = 2056 (ddi_dma_cookie_t *)dma->dp_prealloc_buffer; 2057 cookie->dmac_laddress = dvs->dvs_start + 2058 dmao->dmao_obj.dvma_obj.dv_off; 2059 cookie->dmac_size = dvs->dvs_len; 2060 cookie->dmac_type = 0; 2061 2062 ROOTNEX_DPROBE1(rootnex__bind__dvmafast, dev_info_t *, 2063 rdip); 2064 goto fast; 2065 case DDI_ENOTSUP: 2066 break; 2067 default: 2068 rootnex_clean_dmahdl(hp); 2069 return (e); 2070 } 2071 } 2072 #endif 2073 2074 /* 2075 * Figure out a rough estimate of what maximum number of pages 2076 * this buffer could use (a high estimate of course). 2077 */ 2078 sinfo->si_max_pages = mmu_btopr(dma->dp_dma.dmao_size) + 1; 2079 2080 if (dma->dp_dvma_used) { 2081 /* 2082 * The number of physical pages is the worst case. 2083 * 2084 * For DVMA, the worst case is the length divided 2085 * by the maximum cookie length, plus 1. Add to that 2086 * the number of segment boundaries potentially crossed, and 2087 * the additional number of DVMA segments that was returned. 2088 * 2089 * In the normal case, for modern devices, si_cancross will 2090 * be false, and dv_nseg will be 1, and the fast path will 2091 * have been taken above. 2092 */ 2093 ncookies = (dma->dp_dma.dmao_size / sinfo->si_max_cookie_size) 2094 + 1; 2095 if (sinfo->si_cancross) 2096 ncookies += 2097 (dma->dp_dma.dmao_size / attr->dma_attr_seg) + 1; 2098 ncookies += (dmao->dmao_obj.dvma_obj.dv_nseg - 1); 2099 2100 sinfo->si_max_pages = MIN(sinfo->si_max_pages, ncookies); 2101 } 2102 2103 /* 2104 * We'll use the pre-allocated cookies for any bind that will *always* 2105 * fit (more important to be consistent, we don't want to create 2106 * additional degenerate cases). 2107 */ 2108 if (sinfo->si_max_pages <= rootnex_state->r_prealloc_cookies) { 2109 dma->dp_cookies = (ddi_dma_cookie_t *)dma->dp_prealloc_buffer; 2110 dma->dp_need_to_free_cookie = B_FALSE; 2111 ROOTNEX_DPROBE2(rootnex__bind__prealloc, dev_info_t *, rdip, 2112 uint_t, sinfo->si_max_pages); 2113 2114 /* 2115 * For anything larger than that, we'll go ahead and allocate the 2116 * maximum number of pages we expect to see. Hopefuly, we won't be 2117 * seeing this path in the fast path for high performance devices very 2118 * frequently. 2119 * 2120 * a ddi bind interface that allowed the driver to provide storage to 2121 * the bind interface would speed this case up. 2122 */ 2123 } else { 2124 /* convert the sleep flags */ 2125 if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 2126 kmflag = KM_SLEEP; 2127 } else { 2128 kmflag = KM_NOSLEEP; 2129 } 2130 2131 /* 2132 * Save away how much memory we allocated. If we're doing a 2133 * nosleep, the alloc could fail... 2134 */ 2135 dma->dp_cookie_size = sinfo->si_max_pages * 2136 sizeof (ddi_dma_cookie_t); 2137 dma->dp_cookies = kmem_alloc(dma->dp_cookie_size, kmflag); 2138 if (dma->dp_cookies == NULL) { 2139 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 2140 rootnex_clean_dmahdl(hp); 2141 return (DDI_DMA_NORESOURCES); 2142 } 2143 dma->dp_need_to_free_cookie = B_TRUE; 2144 ROOTNEX_DPROBE2(rootnex__bind__alloc, dev_info_t *, rdip, 2145 uint_t, sinfo->si_max_pages); 2146 } 2147 hp->dmai_cookie = dma->dp_cookies; 2148 2149 /* 2150 * Get the real sgl. rootnex_get_sgl will fill in cookie array while 2151 * looking at the constraints in the dma structure. It will then put 2152 * some additional state about the sgl in the dma struct (i.e. is 2153 * the sgl clean, or do we need to do some munging; how many pages 2154 * need to be copied, etc.) 2155 */ 2156 if (dma->dp_dvma_used) 2157 rootnex_dvma_get_sgl(dmao, dma->dp_cookies, &dma->dp_sglinfo); 2158 else 2159 rootnex_get_sgl(dmao, dma->dp_cookies, &dma->dp_sglinfo); 2160 2161 out: 2162 ASSERT(sinfo->si_sgl_size <= sinfo->si_max_pages); 2163 /* if we don't need a copy buffer, we don't need to sync */ 2164 if (sinfo->si_copybuf_req == 0) { 2165 hp->dmai_rflags |= DMP_NOSYNC; 2166 } 2167 2168 /* 2169 * if we don't need the copybuf and we don't need to do a partial, we 2170 * hit the fast path. All the high performance devices should be trying 2171 * to hit this path. To hit this path, a device should be able to reach 2172 * all of memory, shouldn't try to bind more than it can transfer, and 2173 * the buffer shouldn't require more cookies than the driver/device can 2174 * handle [sgllen]). 2175 */ 2176 if ((sinfo->si_copybuf_req == 0) && 2177 (sinfo->si_sgl_size <= attr->dma_attr_sgllen) && 2178 (dmao->dmao_size < dma->dp_maxxfer)) { 2179 fast: 2180 /* 2181 * If the driver supports FMA, insert the handle in the FMA DMA 2182 * handle cache. 2183 */ 2184 if (attr->dma_attr_flags & DDI_DMA_FLAGERR) 2185 hp->dmai_error.err_cf = rootnex_dma_check; 2186 2187 /* 2188 * copy out the first cookie and ccountp, set the cookie 2189 * pointer to the second cookie. The first cookie is passed 2190 * back on the stack. Additional cookies are accessed via 2191 * ddi_dma_nextcookie() 2192 */ 2193 *cookiep = dma->dp_cookies[0]; 2194 *ccountp = sinfo->si_sgl_size; 2195 hp->dmai_cookie++; 2196 hp->dmai_rflags &= ~DDI_DMA_PARTIAL; 2197 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2198 ROOTNEX_DPROBE4(rootnex__bind__fast, dev_info_t *, rdip, 2199 uint64_t, rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS], 2200 uint_t, dmao->dmao_size, uint_t, *ccountp); 2201 2202 2203 return (DDI_DMA_MAPPED); 2204 } 2205 2206 /* 2207 * go to the slow path, we may need to alloc more memory, create 2208 * multiple windows, and munge up a sgl to make the device happy. 2209 */ 2210 2211 /* 2212 * With the IOMMU mapobject method used, we should never hit 2213 * the slow path. If we do, something is seriously wrong. 2214 * Clean up and return an error. 2215 */ 2216 2217 if (dma->dp_dvma_used) { 2218 (void) iommulib_nexdma_unmapobject(dip, rdip, handle, 2219 &dma->dp_dvma); 2220 e = DDI_DMA_NOMAPPING; 2221 } else { 2222 e = rootnex_bind_slowpath(hp, dmareq, dma, attr, &dma->dp_dma, 2223 kmflag); 2224 } 2225 if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) { 2226 if (dma->dp_need_to_free_cookie) { 2227 kmem_free(dma->dp_cookies, dma->dp_cookie_size); 2228 } 2229 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 2230 rootnex_clean_dmahdl(hp); /* must be after free cookie */ 2231 return (e); 2232 } 2233 2234 /* 2235 * If the driver supports FMA, insert the handle in the FMA DMA handle 2236 * cache. 2237 */ 2238 if (attr->dma_attr_flags & DDI_DMA_FLAGERR) 2239 hp->dmai_error.err_cf = rootnex_dma_check; 2240 2241 /* if the first window uses the copy buffer, sync it for the device */ 2242 if ((dma->dp_window[dma->dp_current_win].wd_dosync) && 2243 (hp->dmai_rflags & DDI_DMA_WRITE)) { 2244 (void) rootnex_coredma_sync(dip, rdip, handle, 0, 0, 2245 DDI_DMA_SYNC_FORDEV); 2246 } 2247 2248 /* 2249 * copy out the first cookie and ccountp, set the cookie pointer to the 2250 * second cookie. Make sure the partial flag is set/cleared correctly. 2251 * If we have a partial map (i.e. multiple windows), the number of 2252 * cookies we return is the number of cookies in the first window. 2253 */ 2254 if (e == DDI_DMA_MAPPED) { 2255 hp->dmai_rflags &= ~DDI_DMA_PARTIAL; 2256 *ccountp = sinfo->si_sgl_size; 2257 hp->dmai_nwin = 1; 2258 } else { 2259 hp->dmai_rflags |= DDI_DMA_PARTIAL; 2260 *ccountp = dma->dp_window[dma->dp_current_win].wd_cookie_cnt; 2261 ASSERT(hp->dmai_nwin <= dma->dp_max_win); 2262 } 2263 *cookiep = dma->dp_cookies[0]; 2264 hp->dmai_cookie++; 2265 2266 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2267 ROOTNEX_DPROBE4(rootnex__bind__slow, dev_info_t *, rdip, uint64_t, 2268 rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS], uint_t, 2269 dmao->dmao_size, uint_t, *ccountp); 2270 return (e); 2271 } 2272 2273 /* 2274 * rootnex_dma_bindhdl() 2275 * called from ddi_dma_addr_bind_handle() and ddi_dma_buf_bind_handle(). 2276 */ 2277 static int 2278 rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 2279 ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 2280 ddi_dma_cookie_t *cookiep, uint_t *ccountp) 2281 { 2282 int ret; 2283 #if defined(__amd64) && !defined(__xpv) 2284 if (IOMMU_USED(rdip)) 2285 ret = iommulib_nexdma_bindhdl(dip, rdip, handle, dmareq, 2286 cookiep, ccountp); 2287 else 2288 #endif 2289 ret = rootnex_coredma_bindhdl(dip, rdip, handle, dmareq, 2290 cookiep, ccountp); 2291 2292 if (ret == DDI_DMA_NORESOURCES && dmareq->dmar_fp != DDI_DMA_DONTWAIT) { 2293 ddi_set_callback(dmareq->dmar_fp, dmareq->dmar_arg, 2294 &rootnex_state->r_dvma_call_list_id); 2295 } 2296 2297 return (ret); 2298 } 2299 2300 2301 2302 /*ARGSUSED*/ 2303 static int 2304 rootnex_coredma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 2305 ddi_dma_handle_t handle) 2306 { 2307 ddi_dma_impl_t *hp; 2308 rootnex_dma_t *dma; 2309 int e; 2310 2311 hp = (ddi_dma_impl_t *)handle; 2312 dma = (rootnex_dma_t *)hp->dmai_private; 2313 2314 /* make sure the buffer wasn't free'd before calling unbind */ 2315 if (rootnex_unbind_verify_buffer) { 2316 e = rootnex_verify_buffer(dma); 2317 if (e != DDI_SUCCESS) { 2318 ASSERT(0); 2319 return (DDI_FAILURE); 2320 } 2321 } 2322 2323 /* sync the current window before unbinding the buffer */ 2324 if (dma->dp_window && dma->dp_window[dma->dp_current_win].wd_dosync && 2325 (hp->dmai_rflags & DDI_DMA_READ)) { 2326 (void) rootnex_coredma_sync(dip, rdip, handle, 0, 0, 2327 DDI_DMA_SYNC_FORCPU); 2328 } 2329 2330 /* 2331 * cleanup and copy buffer or window state. if we didn't use the copy 2332 * buffer or windows, there won't be much to do :-) 2333 */ 2334 rootnex_teardown_copybuf(dma); 2335 rootnex_teardown_windows(dma); 2336 2337 if (IOMMU_USED(rdip)) 2338 (void) iommulib_nexdma_unmapobject(dip, rdip, handle, 2339 &dma->dp_dvma); 2340 2341 /* 2342 * If we had to allocate space to for the worse case sgl (it didn't 2343 * fit into our pre-allocate buffer), free that up now 2344 */ 2345 if (dma->dp_need_to_free_cookie) { 2346 kmem_free(dma->dp_cookies, dma->dp_cookie_size); 2347 } 2348 2349 /* 2350 * clean up the handle so it's ready for the next bind (i.e. if the 2351 * handle is reused). 2352 */ 2353 rootnex_clean_dmahdl(hp); 2354 hp->dmai_error.err_cf = NULL; 2355 2356 ROOTNEX_DPROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2357 ROOTNEX_DPROBE1(rootnex__unbind, uint64_t, 2358 rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2359 2360 return (DDI_SUCCESS); 2361 } 2362 2363 /* 2364 * rootnex_dma_unbindhdl() 2365 * called from ddi_dma_unbind_handle() 2366 */ 2367 /*ARGSUSED*/ 2368 static int 2369 rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 2370 ddi_dma_handle_t handle) 2371 { 2372 int ret; 2373 2374 #if defined(__amd64) && !defined(__xpv) 2375 if (IOMMU_USED(rdip)) 2376 ret = iommulib_nexdma_unbindhdl(dip, rdip, handle); 2377 else 2378 #endif 2379 ret = rootnex_coredma_unbindhdl(dip, rdip, handle); 2380 2381 if (rootnex_state->r_dvma_call_list_id) 2382 ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 2383 2384 return (ret); 2385 } 2386 2387 #if defined(__amd64) && !defined(__xpv) 2388 2389 static int 2390 rootnex_coredma_get_sleep_flags(ddi_dma_handle_t handle) 2391 { 2392 ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 2393 rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 2394 2395 if (dma->dp_sleep_flags != KM_SLEEP && 2396 dma->dp_sleep_flags != KM_NOSLEEP) 2397 cmn_err(CE_PANIC, "kmem sleep flags not set in DMA handle"); 2398 return (dma->dp_sleep_flags); 2399 } 2400 /*ARGSUSED*/ 2401 static void 2402 rootnex_coredma_reset_cookies(dev_info_t *dip, ddi_dma_handle_t handle) 2403 { 2404 ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 2405 rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 2406 rootnex_window_t *window; 2407 2408 if (dma->dp_window) { 2409 window = &dma->dp_window[dma->dp_current_win]; 2410 hp->dmai_cookie = window->wd_first_cookie; 2411 } else { 2412 hp->dmai_cookie = dma->dp_cookies; 2413 } 2414 hp->dmai_cookie++; 2415 } 2416 2417 /*ARGSUSED*/ 2418 static int 2419 rootnex_coredma_get_cookies(dev_info_t *dip, ddi_dma_handle_t handle, 2420 ddi_dma_cookie_t **cookiepp, uint_t *ccountp) 2421 { 2422 int i; 2423 int km_flags; 2424 ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 2425 rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 2426 rootnex_window_t *window; 2427 ddi_dma_cookie_t *cp; 2428 ddi_dma_cookie_t *cookie; 2429 2430 ASSERT(*cookiepp == NULL); 2431 ASSERT(*ccountp == 0); 2432 2433 if (dma->dp_window) { 2434 window = &dma->dp_window[dma->dp_current_win]; 2435 cp = window->wd_first_cookie; 2436 *ccountp = window->wd_cookie_cnt; 2437 } else { 2438 cp = dma->dp_cookies; 2439 *ccountp = dma->dp_sglinfo.si_sgl_size; 2440 } 2441 2442 km_flags = rootnex_coredma_get_sleep_flags(handle); 2443 cookie = kmem_zalloc(sizeof (ddi_dma_cookie_t) * (*ccountp), km_flags); 2444 if (cookie == NULL) { 2445 return (DDI_DMA_NORESOURCES); 2446 } 2447 2448 for (i = 0; i < *ccountp; i++) { 2449 cookie[i].dmac_notused = cp[i].dmac_notused; 2450 cookie[i].dmac_type = cp[i].dmac_type; 2451 cookie[i].dmac_address = cp[i].dmac_address; 2452 cookie[i].dmac_size = cp[i].dmac_size; 2453 } 2454 2455 *cookiepp = cookie; 2456 2457 return (DDI_SUCCESS); 2458 } 2459 2460 /*ARGSUSED*/ 2461 static int 2462 rootnex_coredma_set_cookies(dev_info_t *dip, ddi_dma_handle_t handle, 2463 ddi_dma_cookie_t *cookiep, uint_t ccount) 2464 { 2465 ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 2466 rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 2467 rootnex_window_t *window; 2468 ddi_dma_cookie_t *cur_cookiep; 2469 2470 ASSERT(cookiep); 2471 ASSERT(ccount != 0); 2472 ASSERT(dma->dp_need_to_switch_cookies == B_FALSE); 2473 2474 if (dma->dp_window) { 2475 window = &dma->dp_window[dma->dp_current_win]; 2476 dma->dp_saved_cookies = window->wd_first_cookie; 2477 window->wd_first_cookie = cookiep; 2478 ASSERT(ccount == window->wd_cookie_cnt); 2479 cur_cookiep = (hp->dmai_cookie - dma->dp_saved_cookies) 2480 + window->wd_first_cookie; 2481 } else { 2482 dma->dp_saved_cookies = dma->dp_cookies; 2483 dma->dp_cookies = cookiep; 2484 ASSERT(ccount == dma->dp_sglinfo.si_sgl_size); 2485 cur_cookiep = (hp->dmai_cookie - dma->dp_saved_cookies) 2486 + dma->dp_cookies; 2487 } 2488 2489 dma->dp_need_to_switch_cookies = B_TRUE; 2490 hp->dmai_cookie = cur_cookiep; 2491 2492 return (DDI_SUCCESS); 2493 } 2494 2495 /*ARGSUSED*/ 2496 static int 2497 rootnex_coredma_clear_cookies(dev_info_t *dip, ddi_dma_handle_t handle) 2498 { 2499 ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 2500 rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 2501 rootnex_window_t *window; 2502 ddi_dma_cookie_t *cur_cookiep; 2503 ddi_dma_cookie_t *cookie_array; 2504 uint_t ccount; 2505 2506 /* check if cookies have not been switched */ 2507 if (dma->dp_need_to_switch_cookies == B_FALSE) 2508 return (DDI_SUCCESS); 2509 2510 ASSERT(dma->dp_saved_cookies); 2511 2512 if (dma->dp_window) { 2513 window = &dma->dp_window[dma->dp_current_win]; 2514 cookie_array = window->wd_first_cookie; 2515 window->wd_first_cookie = dma->dp_saved_cookies; 2516 dma->dp_saved_cookies = NULL; 2517 ccount = window->wd_cookie_cnt; 2518 cur_cookiep = (hp->dmai_cookie - cookie_array) 2519 + window->wd_first_cookie; 2520 } else { 2521 cookie_array = dma->dp_cookies; 2522 dma->dp_cookies = dma->dp_saved_cookies; 2523 dma->dp_saved_cookies = NULL; 2524 ccount = dma->dp_sglinfo.si_sgl_size; 2525 cur_cookiep = (hp->dmai_cookie - cookie_array) 2526 + dma->dp_cookies; 2527 } 2528 2529 kmem_free(cookie_array, sizeof (ddi_dma_cookie_t) * ccount); 2530 2531 hp->dmai_cookie = cur_cookiep; 2532 2533 dma->dp_need_to_switch_cookies = B_FALSE; 2534 2535 return (DDI_SUCCESS); 2536 } 2537 2538 #endif 2539 2540 static struct as * 2541 rootnex_get_as(ddi_dma_obj_t *dmao) 2542 { 2543 struct as *asp; 2544 2545 switch (dmao->dmao_type) { 2546 case DMA_OTYP_VADDR: 2547 case DMA_OTYP_BUFVADDR: 2548 asp = dmao->dmao_obj.virt_obj.v_as; 2549 if (asp == NULL) 2550 asp = &kas; 2551 break; 2552 default: 2553 asp = NULL; 2554 break; 2555 } 2556 return (asp); 2557 } 2558 2559 /* 2560 * rootnex_verify_buffer() 2561 * verify buffer wasn't free'd 2562 */ 2563 static int 2564 rootnex_verify_buffer(rootnex_dma_t *dma) 2565 { 2566 page_t **pplist; 2567 caddr_t vaddr; 2568 uint_t pcnt; 2569 uint_t poff; 2570 page_t *pp; 2571 char b; 2572 int i; 2573 2574 /* Figure out how many pages this buffer occupies */ 2575 if (dma->dp_dma.dmao_type == DMA_OTYP_PAGES) { 2576 poff = dma->dp_dma.dmao_obj.pp_obj.pp_offset & MMU_PAGEOFFSET; 2577 } else { 2578 vaddr = dma->dp_dma.dmao_obj.virt_obj.v_addr; 2579 poff = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2580 } 2581 pcnt = mmu_btopr(dma->dp_dma.dmao_size + poff); 2582 2583 switch (dma->dp_dma.dmao_type) { 2584 case DMA_OTYP_PAGES: 2585 /* 2586 * for a linked list of pp's walk through them to make sure 2587 * they're locked and not free. 2588 */ 2589 pp = dma->dp_dma.dmao_obj.pp_obj.pp_pp; 2590 for (i = 0; i < pcnt; i++) { 2591 if (PP_ISFREE(pp) || !PAGE_LOCKED(pp)) { 2592 return (DDI_FAILURE); 2593 } 2594 pp = pp->p_next; 2595 } 2596 break; 2597 2598 case DMA_OTYP_VADDR: 2599 case DMA_OTYP_BUFVADDR: 2600 pplist = dma->dp_dma.dmao_obj.virt_obj.v_priv; 2601 /* 2602 * for an array of pp's walk through them to make sure they're 2603 * not free. It's possible that they may not be locked. 2604 */ 2605 if (pplist) { 2606 for (i = 0; i < pcnt; i++) { 2607 if (PP_ISFREE(pplist[i])) { 2608 return (DDI_FAILURE); 2609 } 2610 } 2611 2612 /* For a virtual address, try to peek at each page */ 2613 } else { 2614 if (rootnex_get_as(&dma->dp_dma) == &kas) { 2615 for (i = 0; i < pcnt; i++) { 2616 if (ddi_peek8(NULL, vaddr, &b) == 2617 DDI_FAILURE) 2618 return (DDI_FAILURE); 2619 vaddr += MMU_PAGESIZE; 2620 } 2621 } 2622 } 2623 break; 2624 2625 default: 2626 cmn_err(CE_PANIC, "rootnex_verify_buffer: bad DMA object"); 2627 break; 2628 } 2629 2630 return (DDI_SUCCESS); 2631 } 2632 2633 2634 /* 2635 * rootnex_clean_dmahdl() 2636 * Clean the dma handle. This should be called on a handle alloc and an 2637 * unbind handle. Set the handle state to the default settings. 2638 */ 2639 static void 2640 rootnex_clean_dmahdl(ddi_dma_impl_t *hp) 2641 { 2642 rootnex_dma_t *dma; 2643 2644 2645 dma = (rootnex_dma_t *)hp->dmai_private; 2646 2647 hp->dmai_nwin = 0; 2648 dma->dp_current_cookie = 0; 2649 dma->dp_copybuf_size = 0; 2650 dma->dp_window = NULL; 2651 dma->dp_cbaddr = NULL; 2652 dma->dp_inuse = B_FALSE; 2653 dma->dp_dvma_used = B_FALSE; 2654 dma->dp_need_to_free_cookie = B_FALSE; 2655 dma->dp_need_to_switch_cookies = B_FALSE; 2656 dma->dp_saved_cookies = NULL; 2657 dma->dp_sleep_flags = KM_PANIC; 2658 dma->dp_need_to_free_window = B_FALSE; 2659 dma->dp_partial_required = B_FALSE; 2660 dma->dp_trim_required = B_FALSE; 2661 dma->dp_sglinfo.si_copybuf_req = 0; 2662 #if !defined(__amd64) 2663 dma->dp_cb_remaping = B_FALSE; 2664 dma->dp_kva = NULL; 2665 #endif 2666 2667 /* FMA related initialization */ 2668 hp->dmai_fault = 0; 2669 hp->dmai_fault_check = NULL; 2670 hp->dmai_fault_notify = NULL; 2671 hp->dmai_error.err_ena = 0; 2672 hp->dmai_error.err_status = DDI_FM_OK; 2673 hp->dmai_error.err_expected = DDI_FM_ERR_UNEXPECTED; 2674 hp->dmai_error.err_ontrap = NULL; 2675 } 2676 2677 2678 /* 2679 * rootnex_valid_alloc_parms() 2680 * Called in ddi_dma_alloc_handle path to validate its parameters. 2681 */ 2682 static int 2683 rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegmentsize) 2684 { 2685 if ((attr->dma_attr_seg < MMU_PAGEOFFSET) || 2686 (attr->dma_attr_count_max < MMU_PAGEOFFSET) || 2687 (attr->dma_attr_granular > MMU_PAGESIZE) || 2688 (attr->dma_attr_maxxfer < MMU_PAGESIZE)) { 2689 return (DDI_DMA_BADATTR); 2690 } 2691 2692 if (attr->dma_attr_addr_hi <= attr->dma_attr_addr_lo) { 2693 return (DDI_DMA_BADATTR); 2694 } 2695 2696 if ((attr->dma_attr_seg & MMU_PAGEOFFSET) != MMU_PAGEOFFSET || 2697 MMU_PAGESIZE & (attr->dma_attr_granular - 1) || 2698 attr->dma_attr_sgllen <= 0) { 2699 return (DDI_DMA_BADATTR); 2700 } 2701 2702 /* We should be able to DMA into every byte offset in a page */ 2703 if (maxsegmentsize < MMU_PAGESIZE) { 2704 return (DDI_DMA_BADATTR); 2705 } 2706 2707 /* if we're bouncing on seg, seg must be <= addr_hi */ 2708 if ((attr->dma_attr_flags & _DDI_DMA_BOUNCE_ON_SEG) && 2709 (attr->dma_attr_seg > attr->dma_attr_addr_hi)) { 2710 return (DDI_DMA_BADATTR); 2711 } 2712 return (DDI_SUCCESS); 2713 } 2714 2715 /* 2716 * rootnex_valid_bind_parms() 2717 * Called in ddi_dma_*_bind_handle path to validate its parameters. 2718 */ 2719 /* ARGSUSED */ 2720 static int 2721 rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, ddi_dma_attr_t *attr) 2722 { 2723 #if !defined(__amd64) 2724 /* 2725 * we only support up to a 2G-1 transfer size on 32-bit kernels so 2726 * we can track the offset for the obsoleted interfaces. 2727 */ 2728 if (dmareq->dmar_object.dmao_size > 0x7FFFFFFF) { 2729 return (DDI_DMA_TOOBIG); 2730 } 2731 #endif 2732 2733 return (DDI_SUCCESS); 2734 } 2735 2736 2737 /* 2738 * rootnex_need_bounce_seg() 2739 * check to see if the buffer lives on both side of the seg. 2740 */ 2741 static boolean_t 2742 rootnex_need_bounce_seg(ddi_dma_obj_t *dmar_object, rootnex_sglinfo_t *sglinfo) 2743 { 2744 ddi_dma_atyp_t buftype; 2745 rootnex_addr_t raddr; 2746 boolean_t lower_addr; 2747 boolean_t upper_addr; 2748 uint64_t offset; 2749 page_t **pplist; 2750 uint64_t paddr; 2751 uint32_t psize; 2752 uint32_t size; 2753 caddr_t vaddr; 2754 uint_t pcnt; 2755 page_t *pp; 2756 2757 2758 /* shortcuts */ 2759 pplist = dmar_object->dmao_obj.virt_obj.v_priv; 2760 vaddr = dmar_object->dmao_obj.virt_obj.v_addr; 2761 buftype = dmar_object->dmao_type; 2762 size = dmar_object->dmao_size; 2763 2764 lower_addr = B_FALSE; 2765 upper_addr = B_FALSE; 2766 pcnt = 0; 2767 2768 /* 2769 * Process the first page to handle the initial offset of the buffer. 2770 * We'll use the base address we get later when we loop through all 2771 * the pages. 2772 */ 2773 if (buftype == DMA_OTYP_PAGES) { 2774 pp = dmar_object->dmao_obj.pp_obj.pp_pp; 2775 offset = dmar_object->dmao_obj.pp_obj.pp_offset & 2776 MMU_PAGEOFFSET; 2777 paddr = pfn_to_pa(pp->p_pagenum) + offset; 2778 psize = MIN(size, (MMU_PAGESIZE - offset)); 2779 pp = pp->p_next; 2780 sglinfo->si_asp = NULL; 2781 } else if (pplist != NULL) { 2782 offset = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2783 sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as; 2784 if (sglinfo->si_asp == NULL) { 2785 sglinfo->si_asp = &kas; 2786 } 2787 paddr = pfn_to_pa(pplist[pcnt]->p_pagenum); 2788 paddr += offset; 2789 psize = MIN(size, (MMU_PAGESIZE - offset)); 2790 pcnt++; 2791 } else { 2792 offset = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2793 sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as; 2794 if (sglinfo->si_asp == NULL) { 2795 sglinfo->si_asp = &kas; 2796 } 2797 paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat, vaddr)); 2798 paddr += offset; 2799 psize = MIN(size, (MMU_PAGESIZE - offset)); 2800 vaddr += psize; 2801 } 2802 2803 raddr = ROOTNEX_PADDR_TO_RBASE(paddr); 2804 2805 if ((raddr + psize) > sglinfo->si_segmask) { 2806 upper_addr = B_TRUE; 2807 } else { 2808 lower_addr = B_TRUE; 2809 } 2810 size -= psize; 2811 2812 /* 2813 * Walk through the rest of the pages in the buffer. Track to see 2814 * if we have pages on both sides of the segment boundary. 2815 */ 2816 while (size > 0) { 2817 /* partial or full page */ 2818 psize = MIN(size, MMU_PAGESIZE); 2819 2820 if (buftype == DMA_OTYP_PAGES) { 2821 /* get the paddr from the page_t */ 2822 ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp)); 2823 paddr = pfn_to_pa(pp->p_pagenum); 2824 pp = pp->p_next; 2825 } else if (pplist != NULL) { 2826 /* index into the array of page_t's to get the paddr */ 2827 ASSERT(!PP_ISFREE(pplist[pcnt])); 2828 paddr = pfn_to_pa(pplist[pcnt]->p_pagenum); 2829 pcnt++; 2830 } else { 2831 /* call into the VM to get the paddr */ 2832 paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat, 2833 vaddr)); 2834 vaddr += psize; 2835 } 2836 2837 raddr = ROOTNEX_PADDR_TO_RBASE(paddr); 2838 2839 if ((raddr + psize) > sglinfo->si_segmask) { 2840 upper_addr = B_TRUE; 2841 } else { 2842 lower_addr = B_TRUE; 2843 } 2844 /* 2845 * if the buffer lives both above and below the segment 2846 * boundary, or the current page is the page immediately 2847 * after the segment, we will use a copy/bounce buffer for 2848 * all pages > seg. 2849 */ 2850 if ((lower_addr && upper_addr) || 2851 (raddr == (sglinfo->si_segmask + 1))) { 2852 return (B_TRUE); 2853 } 2854 2855 size -= psize; 2856 } 2857 2858 return (B_FALSE); 2859 } 2860 2861 /* 2862 * rootnex_get_sgl() 2863 * Called in bind fastpath to get the sgl. Most of this will be replaced 2864 * with a call to the vm layer when vm2.0 comes around... 2865 */ 2866 static void 2867 rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl, 2868 rootnex_sglinfo_t *sglinfo) 2869 { 2870 ddi_dma_atyp_t buftype; 2871 rootnex_addr_t raddr; 2872 uint64_t last_page; 2873 uint64_t offset; 2874 uint64_t addrhi; 2875 uint64_t addrlo; 2876 uint64_t maxseg; 2877 page_t **pplist; 2878 uint64_t paddr; 2879 uint32_t psize; 2880 uint32_t size; 2881 caddr_t vaddr; 2882 uint_t pcnt; 2883 page_t *pp; 2884 uint_t cnt; 2885 2886 2887 /* shortcuts */ 2888 pplist = dmar_object->dmao_obj.virt_obj.v_priv; 2889 vaddr = dmar_object->dmao_obj.virt_obj.v_addr; 2890 maxseg = sglinfo->si_max_cookie_size; 2891 buftype = dmar_object->dmao_type; 2892 addrhi = sglinfo->si_max_addr; 2893 addrlo = sglinfo->si_min_addr; 2894 size = dmar_object->dmao_size; 2895 2896 pcnt = 0; 2897 cnt = 0; 2898 2899 2900 /* 2901 * check to see if we need to use the copy buffer for pages over 2902 * the segment attr. 2903 */ 2904 sglinfo->si_bounce_on_seg = B_FALSE; 2905 if (sglinfo->si_flags & _DDI_DMA_BOUNCE_ON_SEG) { 2906 sglinfo->si_bounce_on_seg = rootnex_need_bounce_seg( 2907 dmar_object, sglinfo); 2908 } 2909 2910 /* 2911 * if we were passed down a linked list of pages, i.e. pointer to 2912 * page_t, use this to get our physical address and buf offset. 2913 */ 2914 if (buftype == DMA_OTYP_PAGES) { 2915 pp = dmar_object->dmao_obj.pp_obj.pp_pp; 2916 ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp)); 2917 offset = dmar_object->dmao_obj.pp_obj.pp_offset & 2918 MMU_PAGEOFFSET; 2919 paddr = pfn_to_pa(pp->p_pagenum) + offset; 2920 psize = MIN(size, (MMU_PAGESIZE - offset)); 2921 pp = pp->p_next; 2922 sglinfo->si_asp = NULL; 2923 2924 /* 2925 * We weren't passed down a linked list of pages, but if we were passed 2926 * down an array of pages, use this to get our physical address and buf 2927 * offset. 2928 */ 2929 } else if (pplist != NULL) { 2930 ASSERT((buftype == DMA_OTYP_VADDR) || 2931 (buftype == DMA_OTYP_BUFVADDR)); 2932 2933 offset = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2934 sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as; 2935 if (sglinfo->si_asp == NULL) { 2936 sglinfo->si_asp = &kas; 2937 } 2938 2939 ASSERT(!PP_ISFREE(pplist[pcnt])); 2940 paddr = pfn_to_pa(pplist[pcnt]->p_pagenum); 2941 paddr += offset; 2942 psize = MIN(size, (MMU_PAGESIZE - offset)); 2943 pcnt++; 2944 2945 /* 2946 * All we have is a virtual address, we'll need to call into the VM 2947 * to get the physical address. 2948 */ 2949 } else { 2950 ASSERT((buftype == DMA_OTYP_VADDR) || 2951 (buftype == DMA_OTYP_BUFVADDR)); 2952 2953 offset = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2954 sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as; 2955 if (sglinfo->si_asp == NULL) { 2956 sglinfo->si_asp = &kas; 2957 } 2958 2959 paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat, vaddr)); 2960 paddr += offset; 2961 psize = MIN(size, (MMU_PAGESIZE - offset)); 2962 vaddr += psize; 2963 } 2964 2965 raddr = ROOTNEX_PADDR_TO_RBASE(paddr); 2966 2967 /* 2968 * Setup the first cookie with the physical address of the page and the 2969 * size of the page (which takes into account the initial offset into 2970 * the page. 2971 */ 2972 sgl[cnt].dmac_laddress = raddr; 2973 sgl[cnt].dmac_size = psize; 2974 sgl[cnt].dmac_type = 0; 2975 2976 /* 2977 * Save away the buffer offset into the page. We'll need this later in 2978 * the copy buffer code to help figure out the page index within the 2979 * buffer and the offset into the current page. 2980 */ 2981 sglinfo->si_buf_offset = offset; 2982 2983 /* 2984 * If we are using the copy buffer for anything over the segment 2985 * boundary, and this page is over the segment boundary. 2986 * OR 2987 * if the DMA engine can't reach the physical address. 2988 */ 2989 if (((sglinfo->si_bounce_on_seg) && 2990 ((raddr + psize) > sglinfo->si_segmask)) || 2991 ((raddr < addrlo) || ((raddr + psize) > addrhi))) { 2992 /* 2993 * Increase how much copy buffer we use. We always increase by 2994 * pagesize so we don't have to worry about converting offsets. 2995 * Set a flag in the cookies dmac_type to indicate that it uses 2996 * the copy buffer. If this isn't the last cookie, go to the 2997 * next cookie (since we separate each page which uses the copy 2998 * buffer in case the copy buffer is not physically contiguous. 2999 */ 3000 sglinfo->si_copybuf_req += MMU_PAGESIZE; 3001 sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF; 3002 if ((cnt + 1) < sglinfo->si_max_pages) { 3003 cnt++; 3004 sgl[cnt].dmac_laddress = 0; 3005 sgl[cnt].dmac_size = 0; 3006 sgl[cnt].dmac_type = 0; 3007 } 3008 } 3009 3010 /* 3011 * save this page's physical address so we can figure out if the next 3012 * page is physically contiguous. Keep decrementing size until we are 3013 * done with the buffer. 3014 */ 3015 last_page = raddr & MMU_PAGEMASK; 3016 size -= psize; 3017 3018 while (size > 0) { 3019 /* Get the size for this page (i.e. partial or full page) */ 3020 psize = MIN(size, MMU_PAGESIZE); 3021 3022 if (buftype == DMA_OTYP_PAGES) { 3023 /* get the paddr from the page_t */ 3024 ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp)); 3025 paddr = pfn_to_pa(pp->p_pagenum); 3026 pp = pp->p_next; 3027 } else if (pplist != NULL) { 3028 /* index into the array of page_t's to get the paddr */ 3029 ASSERT(!PP_ISFREE(pplist[pcnt])); 3030 paddr = pfn_to_pa(pplist[pcnt]->p_pagenum); 3031 pcnt++; 3032 } else { 3033 /* call into the VM to get the paddr */ 3034 paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat, 3035 vaddr)); 3036 vaddr += psize; 3037 } 3038 3039 raddr = ROOTNEX_PADDR_TO_RBASE(paddr); 3040 3041 /* 3042 * If we are using the copy buffer for anything over the 3043 * segment boundary, and this page is over the segment 3044 * boundary. 3045 * OR 3046 * if the DMA engine can't reach the physical address. 3047 */ 3048 if (((sglinfo->si_bounce_on_seg) && 3049 ((raddr + psize) > sglinfo->si_segmask)) || 3050 ((raddr < addrlo) || ((raddr + psize) > addrhi))) { 3051 3052 sglinfo->si_copybuf_req += MMU_PAGESIZE; 3053 3054 /* 3055 * if there is something in the current cookie, go to 3056 * the next one. We only want one page in a cookie which 3057 * uses the copybuf since the copybuf doesn't have to 3058 * be physically contiguous. 3059 */ 3060 if (sgl[cnt].dmac_size != 0) { 3061 cnt++; 3062 } 3063 sgl[cnt].dmac_laddress = raddr; 3064 sgl[cnt].dmac_size = psize; 3065 #if defined(__amd64) 3066 sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF; 3067 #else 3068 /* 3069 * save the buf offset for 32-bit kernel. used in the 3070 * obsoleted interfaces. 3071 */ 3072 sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF | 3073 (dmar_object->dmao_size - size); 3074 #endif 3075 /* if this isn't the last cookie, go to the next one */ 3076 if ((cnt + 1) < sglinfo->si_max_pages) { 3077 cnt++; 3078 sgl[cnt].dmac_laddress = 0; 3079 sgl[cnt].dmac_size = 0; 3080 sgl[cnt].dmac_type = 0; 3081 } 3082 3083 /* 3084 * this page didn't need the copy buffer, if it's not physically 3085 * contiguous, or it would put us over a segment boundary, or it 3086 * puts us over the max cookie size, or the current sgl doesn't 3087 * have anything in it. 3088 */ 3089 } else if (((last_page + MMU_PAGESIZE) != raddr) || 3090 !(raddr & sglinfo->si_segmask) || 3091 ((sgl[cnt].dmac_size + psize) > maxseg) || 3092 (sgl[cnt].dmac_size == 0)) { 3093 /* 3094 * if we're not already in a new cookie, go to the next 3095 * cookie. 3096 */ 3097 if (sgl[cnt].dmac_size != 0) { 3098 cnt++; 3099 } 3100 3101 /* save the cookie information */ 3102 sgl[cnt].dmac_laddress = raddr; 3103 sgl[cnt].dmac_size = psize; 3104 #if defined(__amd64) 3105 sgl[cnt].dmac_type = 0; 3106 #else 3107 /* 3108 * save the buf offset for 32-bit kernel. used in the 3109 * obsoleted interfaces. 3110 */ 3111 sgl[cnt].dmac_type = dmar_object->dmao_size - size; 3112 #endif 3113 3114 /* 3115 * this page didn't need the copy buffer, it is physically 3116 * contiguous with the last page, and it's <= the max cookie 3117 * size. 3118 */ 3119 } else { 3120 sgl[cnt].dmac_size += psize; 3121 3122 /* 3123 * if this exactly == the maximum cookie size, and 3124 * it isn't the last cookie, go to the next cookie. 3125 */ 3126 if (((sgl[cnt].dmac_size + psize) == maxseg) && 3127 ((cnt + 1) < sglinfo->si_max_pages)) { 3128 cnt++; 3129 sgl[cnt].dmac_laddress = 0; 3130 sgl[cnt].dmac_size = 0; 3131 sgl[cnt].dmac_type = 0; 3132 } 3133 } 3134 3135 /* 3136 * save this page's physical address so we can figure out if the 3137 * next page is physically contiguous. Keep decrementing size 3138 * until we are done with the buffer. 3139 */ 3140 last_page = raddr; 3141 size -= psize; 3142 } 3143 3144 /* we're done, save away how many cookies the sgl has */ 3145 if (sgl[cnt].dmac_size == 0) { 3146 ASSERT(cnt < sglinfo->si_max_pages); 3147 sglinfo->si_sgl_size = cnt; 3148 } else { 3149 sglinfo->si_sgl_size = cnt + 1; 3150 } 3151 } 3152 3153 static void 3154 rootnex_dvma_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl, 3155 rootnex_sglinfo_t *sglinfo) 3156 { 3157 uint64_t offset; 3158 uint64_t maxseg; 3159 uint64_t dvaddr; 3160 struct dvmaseg *dvs; 3161 uint64_t paddr; 3162 uint32_t psize, ssize; 3163 uint32_t size; 3164 uint_t cnt; 3165 int physcontig; 3166 3167 ASSERT(dmar_object->dmao_type == DMA_OTYP_DVADDR); 3168 3169 /* shortcuts */ 3170 maxseg = sglinfo->si_max_cookie_size; 3171 size = dmar_object->dmao_size; 3172 3173 cnt = 0; 3174 sglinfo->si_bounce_on_seg = B_FALSE; 3175 3176 dvs = dmar_object->dmao_obj.dvma_obj.dv_seg; 3177 offset = dmar_object->dmao_obj.dvma_obj.dv_off; 3178 ssize = dvs->dvs_len; 3179 paddr = dvs->dvs_start; 3180 paddr += offset; 3181 psize = MIN(ssize, (maxseg - offset)); 3182 dvaddr = paddr + psize; 3183 ssize -= psize; 3184 3185 sgl[cnt].dmac_laddress = paddr; 3186 sgl[cnt].dmac_size = psize; 3187 sgl[cnt].dmac_type = 0; 3188 3189 size -= psize; 3190 while (size > 0) { 3191 if (ssize == 0) { 3192 dvs++; 3193 ssize = dvs->dvs_len; 3194 dvaddr = dvs->dvs_start; 3195 physcontig = 0; 3196 } else 3197 physcontig = 1; 3198 3199 paddr = dvaddr; 3200 psize = MIN(ssize, maxseg); 3201 dvaddr += psize; 3202 ssize -= psize; 3203 3204 if (!physcontig || !(paddr & sglinfo->si_segmask) || 3205 ((sgl[cnt].dmac_size + psize) > maxseg) || 3206 (sgl[cnt].dmac_size == 0)) { 3207 /* 3208 * if we're not already in a new cookie, go to the next 3209 * cookie. 3210 */ 3211 if (sgl[cnt].dmac_size != 0) { 3212 cnt++; 3213 } 3214 3215 /* save the cookie information */ 3216 sgl[cnt].dmac_laddress = paddr; 3217 sgl[cnt].dmac_size = psize; 3218 sgl[cnt].dmac_type = 0; 3219 } else { 3220 sgl[cnt].dmac_size += psize; 3221 3222 /* 3223 * if this exactly == the maximum cookie size, and 3224 * it isn't the last cookie, go to the next cookie. 3225 */ 3226 if (((sgl[cnt].dmac_size + psize) == maxseg) && 3227 ((cnt + 1) < sglinfo->si_max_pages)) { 3228 cnt++; 3229 sgl[cnt].dmac_laddress = 0; 3230 sgl[cnt].dmac_size = 0; 3231 sgl[cnt].dmac_type = 0; 3232 } 3233 } 3234 size -= psize; 3235 } 3236 3237 /* we're done, save away how many cookies the sgl has */ 3238 if (sgl[cnt].dmac_size == 0) { 3239 sglinfo->si_sgl_size = cnt; 3240 } else { 3241 sglinfo->si_sgl_size = cnt + 1; 3242 } 3243 } 3244 3245 /* 3246 * rootnex_bind_slowpath() 3247 * Call in the bind path if the calling driver can't use the sgl without 3248 * modifying it. We either need to use the copy buffer and/or we will end up 3249 * with a partial bind. 3250 */ 3251 static int 3252 rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 3253 rootnex_dma_t *dma, ddi_dma_attr_t *attr, ddi_dma_obj_t *dmao, int kmflag) 3254 { 3255 rootnex_sglinfo_t *sinfo; 3256 rootnex_window_t *window; 3257 ddi_dma_cookie_t *cookie; 3258 size_t copybuf_used; 3259 size_t dmac_size; 3260 boolean_t partial; 3261 off_t cur_offset; 3262 page_t *cur_pp; 3263 major_t mnum; 3264 int e; 3265 int i; 3266 3267 3268 sinfo = &dma->dp_sglinfo; 3269 copybuf_used = 0; 3270 partial = B_FALSE; 3271 3272 /* 3273 * If we're using the copybuf, set the copybuf state in dma struct. 3274 * Needs to be first since it sets the copy buffer size. 3275 */ 3276 if (sinfo->si_copybuf_req != 0) { 3277 e = rootnex_setup_copybuf(hp, dmareq, dma, attr); 3278 if (e != DDI_SUCCESS) { 3279 return (e); 3280 } 3281 } else { 3282 dma->dp_copybuf_size = 0; 3283 } 3284 3285 /* 3286 * Figure out if we need to do a partial mapping. If so, figure out 3287 * if we need to trim the buffers when we munge the sgl. 3288 */ 3289 if ((dma->dp_copybuf_size < sinfo->si_copybuf_req) || 3290 (dmao->dmao_size > dma->dp_maxxfer) || 3291 (attr->dma_attr_sgllen < sinfo->si_sgl_size)) { 3292 dma->dp_partial_required = B_TRUE; 3293 if (attr->dma_attr_granular != 1) { 3294 dma->dp_trim_required = B_TRUE; 3295 } 3296 } else { 3297 dma->dp_partial_required = B_FALSE; 3298 dma->dp_trim_required = B_FALSE; 3299 } 3300 3301 /* If we need to do a partial bind, make sure the driver supports it */ 3302 if (dma->dp_partial_required && 3303 !(dmareq->dmar_flags & DDI_DMA_PARTIAL)) { 3304 3305 mnum = ddi_driver_major(dma->dp_dip); 3306 /* 3307 * patchable which allows us to print one warning per major 3308 * number. 3309 */ 3310 if ((rootnex_bind_warn) && 3311 ((rootnex_warn_list[mnum] & ROOTNEX_BIND_WARNING) == 0)) { 3312 rootnex_warn_list[mnum] |= ROOTNEX_BIND_WARNING; 3313 cmn_err(CE_WARN, "!%s: coding error detected, the " 3314 "driver is using ddi_dma_attr(9S) incorrectly. " 3315 "There is a small risk of data corruption in " 3316 "particular with large I/Os. The driver should be " 3317 "replaced with a corrected version for proper " 3318 "system operation. To disable this warning, add " 3319 "'set rootnex:rootnex_bind_warn=0' to " 3320 "/etc/system(4).", ddi_driver_name(dma->dp_dip)); 3321 } 3322 return (DDI_DMA_TOOBIG); 3323 } 3324 3325 /* 3326 * we might need multiple windows, setup state to handle them. In this 3327 * code path, we will have at least one window. 3328 */ 3329 e = rootnex_setup_windows(hp, dma, attr, dmao, kmflag); 3330 if (e != DDI_SUCCESS) { 3331 rootnex_teardown_copybuf(dma); 3332 return (e); 3333 } 3334 3335 window = &dma->dp_window[0]; 3336 cookie = &dma->dp_cookies[0]; 3337 cur_offset = 0; 3338 rootnex_init_win(hp, dma, window, cookie, cur_offset); 3339 if (dmao->dmao_type == DMA_OTYP_PAGES) { 3340 cur_pp = dmareq->dmar_object.dmao_obj.pp_obj.pp_pp; 3341 } 3342 3343 /* loop though all the cookies we got back from get_sgl() */ 3344 for (i = 0; i < sinfo->si_sgl_size; i++) { 3345 /* 3346 * If we're using the copy buffer, check this cookie and setup 3347 * its associated copy buffer state. If this cookie uses the 3348 * copy buffer, make sure we sync this window during dma_sync. 3349 */ 3350 if (dma->dp_copybuf_size > 0) { 3351 rootnex_setup_cookie(dmao, dma, cookie, 3352 cur_offset, ©buf_used, &cur_pp); 3353 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3354 window->wd_dosync = B_TRUE; 3355 } 3356 } 3357 3358 /* 3359 * save away the cookie size, since it could be modified in 3360 * the windowing code. 3361 */ 3362 dmac_size = cookie->dmac_size; 3363 3364 /* if we went over max copybuf size */ 3365 if (dma->dp_copybuf_size && 3366 (copybuf_used > dma->dp_copybuf_size)) { 3367 partial = B_TRUE; 3368 e = rootnex_copybuf_window_boundary(hp, dma, &window, 3369 cookie, cur_offset, ©buf_used); 3370 if (e != DDI_SUCCESS) { 3371 rootnex_teardown_copybuf(dma); 3372 rootnex_teardown_windows(dma); 3373 return (e); 3374 } 3375 3376 /* 3377 * if the coookie uses the copy buffer, make sure the 3378 * new window we just moved to is set to sync. 3379 */ 3380 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3381 window->wd_dosync = B_TRUE; 3382 } 3383 ROOTNEX_DPROBE1(rootnex__copybuf__window, dev_info_t *, 3384 dma->dp_dip); 3385 3386 /* if the cookie cnt == max sgllen, move to the next window */ 3387 } else if (window->wd_cookie_cnt >= attr->dma_attr_sgllen) { 3388 partial = B_TRUE; 3389 ASSERT(window->wd_cookie_cnt == attr->dma_attr_sgllen); 3390 e = rootnex_sgllen_window_boundary(hp, dma, &window, 3391 cookie, attr, cur_offset); 3392 if (e != DDI_SUCCESS) { 3393 rootnex_teardown_copybuf(dma); 3394 rootnex_teardown_windows(dma); 3395 return (e); 3396 } 3397 3398 /* 3399 * if the coookie uses the copy buffer, make sure the 3400 * new window we just moved to is set to sync. 3401 */ 3402 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3403 window->wd_dosync = B_TRUE; 3404 } 3405 ROOTNEX_DPROBE1(rootnex__sgllen__window, dev_info_t *, 3406 dma->dp_dip); 3407 3408 /* else if we will be over maxxfer */ 3409 } else if ((window->wd_size + dmac_size) > 3410 dma->dp_maxxfer) { 3411 partial = B_TRUE; 3412 e = rootnex_maxxfer_window_boundary(hp, dma, &window, 3413 cookie); 3414 if (e != DDI_SUCCESS) { 3415 rootnex_teardown_copybuf(dma); 3416 rootnex_teardown_windows(dma); 3417 return (e); 3418 } 3419 3420 /* 3421 * if the coookie uses the copy buffer, make sure the 3422 * new window we just moved to is set to sync. 3423 */ 3424 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3425 window->wd_dosync = B_TRUE; 3426 } 3427 ROOTNEX_DPROBE1(rootnex__maxxfer__window, dev_info_t *, 3428 dma->dp_dip); 3429 3430 /* else this cookie fits in the current window */ 3431 } else { 3432 window->wd_cookie_cnt++; 3433 window->wd_size += dmac_size; 3434 } 3435 3436 /* track our offset into the buffer, go to the next cookie */ 3437 ASSERT(dmac_size <= dmao->dmao_size); 3438 ASSERT(cookie->dmac_size <= dmac_size); 3439 cur_offset += dmac_size; 3440 cookie++; 3441 } 3442 3443 /* if we ended up with a zero sized window in the end, clean it up */ 3444 if (window->wd_size == 0) { 3445 hp->dmai_nwin--; 3446 window--; 3447 } 3448 3449 ASSERT(window->wd_trim.tr_trim_last == B_FALSE); 3450 3451 if (!partial) { 3452 return (DDI_DMA_MAPPED); 3453 } 3454 3455 ASSERT(dma->dp_partial_required); 3456 return (DDI_DMA_PARTIAL_MAP); 3457 } 3458 3459 /* 3460 * rootnex_setup_copybuf() 3461 * Called in bind slowpath. Figures out if we're going to use the copy 3462 * buffer, and if we do, sets up the basic state to handle it. 3463 */ 3464 static int 3465 rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 3466 rootnex_dma_t *dma, ddi_dma_attr_t *attr) 3467 { 3468 rootnex_sglinfo_t *sinfo; 3469 ddi_dma_attr_t lattr; 3470 size_t max_copybuf; 3471 int cansleep; 3472 int e; 3473 #if !defined(__amd64) 3474 int vmflag; 3475 #endif 3476 3477 ASSERT(!dma->dp_dvma_used); 3478 3479 sinfo = &dma->dp_sglinfo; 3480 3481 /* read this first so it's consistent through the routine */ 3482 max_copybuf = i_ddi_copybuf_size() & MMU_PAGEMASK; 3483 3484 /* We need to call into the rootnex on ddi_dma_sync() */ 3485 hp->dmai_rflags &= ~DMP_NOSYNC; 3486 3487 /* make sure the copybuf size <= the max size */ 3488 dma->dp_copybuf_size = MIN(sinfo->si_copybuf_req, max_copybuf); 3489 ASSERT((dma->dp_copybuf_size & MMU_PAGEOFFSET) == 0); 3490 3491 #if !defined(__amd64) 3492 /* 3493 * if we don't have kva space to copy to/from, allocate the KVA space 3494 * now. We only do this for the 32-bit kernel. We use seg kpm space for 3495 * the 64-bit kernel. 3496 */ 3497 if ((dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) || 3498 (dmareq->dmar_object.dmao_obj.virt_obj.v_as != NULL)) { 3499 3500 /* convert the sleep flags */ 3501 if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 3502 vmflag = VM_SLEEP; 3503 } else { 3504 vmflag = VM_NOSLEEP; 3505 } 3506 3507 /* allocate Kernel VA space that we can bcopy to/from */ 3508 dma->dp_kva = vmem_alloc(heap_arena, dma->dp_copybuf_size, 3509 vmflag); 3510 if (dma->dp_kva == NULL) { 3511 return (DDI_DMA_NORESOURCES); 3512 } 3513 } 3514 #endif 3515 3516 /* convert the sleep flags */ 3517 if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 3518 cansleep = 1; 3519 } else { 3520 cansleep = 0; 3521 } 3522 3523 /* 3524 * Allocate the actual copy buffer. This needs to fit within the DMA 3525 * engine limits, so we can't use kmem_alloc... We don't need 3526 * contiguous memory (sgllen) since we will be forcing windows on 3527 * sgllen anyway. 3528 */ 3529 lattr = *attr; 3530 lattr.dma_attr_align = MMU_PAGESIZE; 3531 /* 3532 * this should be < 0 to indicate no limit, but due to a bug in 3533 * the rootnex, we'll set it to the maximum positive int. 3534 */ 3535 lattr.dma_attr_sgllen = 0x7fffffff; 3536 /* 3537 * if we're using the copy buffer because of seg, use that for our 3538 * upper address limit. 3539 */ 3540 if (sinfo->si_bounce_on_seg) { 3541 lattr.dma_attr_addr_hi = lattr.dma_attr_seg; 3542 } 3543 e = i_ddi_mem_alloc(dma->dp_dip, &lattr, dma->dp_copybuf_size, cansleep, 3544 0, NULL, &dma->dp_cbaddr, &dma->dp_cbsize, NULL); 3545 if (e != DDI_SUCCESS) { 3546 #if !defined(__amd64) 3547 if (dma->dp_kva != NULL) { 3548 vmem_free(heap_arena, dma->dp_kva, 3549 dma->dp_copybuf_size); 3550 } 3551 #endif 3552 return (DDI_DMA_NORESOURCES); 3553 } 3554 3555 ROOTNEX_DPROBE2(rootnex__alloc__copybuf, dev_info_t *, dma->dp_dip, 3556 size_t, dma->dp_copybuf_size); 3557 3558 return (DDI_SUCCESS); 3559 } 3560 3561 3562 /* 3563 * rootnex_setup_windows() 3564 * Called in bind slowpath to setup the window state. We always have windows 3565 * in the slowpath. Even if the window count = 1. 3566 */ 3567 static int 3568 rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3569 ddi_dma_attr_t *attr, ddi_dma_obj_t *dmao, int kmflag) 3570 { 3571 rootnex_window_t *windowp; 3572 rootnex_sglinfo_t *sinfo; 3573 size_t copy_state_size; 3574 size_t win_state_size; 3575 size_t state_available; 3576 size_t space_needed; 3577 uint_t copybuf_win; 3578 uint_t maxxfer_win; 3579 size_t space_used; 3580 uint_t sglwin; 3581 3582 3583 sinfo = &dma->dp_sglinfo; 3584 3585 dma->dp_current_win = 0; 3586 hp->dmai_nwin = 0; 3587 3588 /* If we don't need to do a partial, we only have one window */ 3589 if (!dma->dp_partial_required) { 3590 dma->dp_max_win = 1; 3591 3592 /* 3593 * we need multiple windows, need to figure out the worse case number 3594 * of windows. 3595 */ 3596 } else { 3597 /* 3598 * if we need windows because we need more copy buffer that 3599 * we allow, the worse case number of windows we could need 3600 * here would be (copybuf space required / copybuf space that 3601 * we have) plus one for remainder, and plus 2 to handle the 3602 * extra pages on the trim for the first and last pages of the 3603 * buffer (a page is the minimum window size so under the right 3604 * attr settings, you could have a window for each page). 3605 * The last page will only be hit here if the size is not a 3606 * multiple of the granularity (which theoretically shouldn't 3607 * be the case but never has been enforced, so we could have 3608 * broken things without it). 3609 */ 3610 if (sinfo->si_copybuf_req > dma->dp_copybuf_size) { 3611 ASSERT(dma->dp_copybuf_size > 0); 3612 copybuf_win = (sinfo->si_copybuf_req / 3613 dma->dp_copybuf_size) + 1 + 2; 3614 } else { 3615 copybuf_win = 0; 3616 } 3617 3618 /* 3619 * if we need windows because we have more cookies than the H/W 3620 * can handle, the number of windows we would need here would 3621 * be (cookie count / cookies count H/W supports minus 1[for 3622 * trim]) plus one for remainder. 3623 */ 3624 if (attr->dma_attr_sgllen < sinfo->si_sgl_size) { 3625 sglwin = (sinfo->si_sgl_size / 3626 (attr->dma_attr_sgllen - 1)) + 1; 3627 } else { 3628 sglwin = 0; 3629 } 3630 3631 /* 3632 * if we need windows because we're binding more memory than the 3633 * H/W can transfer at once, the number of windows we would need 3634 * here would be (xfer count / max xfer H/W supports) plus one 3635 * for remainder, and plus 2 to handle the extra pages on the 3636 * trim (see above comment about trim) 3637 */ 3638 if (dmao->dmao_size > dma->dp_maxxfer) { 3639 maxxfer_win = (dmao->dmao_size / 3640 dma->dp_maxxfer) + 1 + 2; 3641 } else { 3642 maxxfer_win = 0; 3643 } 3644 dma->dp_max_win = copybuf_win + sglwin + maxxfer_win; 3645 ASSERT(dma->dp_max_win > 0); 3646 } 3647 win_state_size = dma->dp_max_win * sizeof (rootnex_window_t); 3648 3649 /* 3650 * Get space for window and potential copy buffer state. Before we 3651 * go and allocate memory, see if we can get away with using what's 3652 * left in the pre-allocted state or the dynamically allocated sgl. 3653 */ 3654 space_used = (uintptr_t)(sinfo->si_sgl_size * 3655 sizeof (ddi_dma_cookie_t)); 3656 3657 /* if we dynamically allocated space for the cookies */ 3658 if (dma->dp_need_to_free_cookie) { 3659 /* if we have more space in the pre-allocted buffer, use it */ 3660 ASSERT(space_used <= dma->dp_cookie_size); 3661 if ((dma->dp_cookie_size - space_used) <= 3662 rootnex_state->r_prealloc_size) { 3663 state_available = rootnex_state->r_prealloc_size; 3664 windowp = (rootnex_window_t *)dma->dp_prealloc_buffer; 3665 3666 /* 3667 * else, we have more free space in the dynamically allocated 3668 * buffer, i.e. the buffer wasn't worse case fragmented so we 3669 * didn't need a lot of cookies. 3670 */ 3671 } else { 3672 state_available = dma->dp_cookie_size - space_used; 3673 windowp = (rootnex_window_t *) 3674 &dma->dp_cookies[sinfo->si_sgl_size]; 3675 } 3676 3677 /* we used the pre-alloced buffer */ 3678 } else { 3679 ASSERT(space_used <= rootnex_state->r_prealloc_size); 3680 state_available = rootnex_state->r_prealloc_size - space_used; 3681 windowp = (rootnex_window_t *) 3682 &dma->dp_cookies[sinfo->si_sgl_size]; 3683 } 3684 3685 /* 3686 * figure out how much state we need to track the copy buffer. Add an 3687 * addition 8 bytes for pointer alignemnt later. 3688 */ 3689 if (dma->dp_copybuf_size > 0) { 3690 copy_state_size = sinfo->si_max_pages * 3691 sizeof (rootnex_pgmap_t); 3692 } else { 3693 copy_state_size = 0; 3694 } 3695 /* add an additional 8 bytes for pointer alignment */ 3696 space_needed = win_state_size + copy_state_size + 0x8; 3697 3698 /* if we have enough space already, use it */ 3699 if (state_available >= space_needed) { 3700 dma->dp_window = windowp; 3701 dma->dp_need_to_free_window = B_FALSE; 3702 3703 /* not enough space, need to allocate more. */ 3704 } else { 3705 dma->dp_window = kmem_alloc(space_needed, kmflag); 3706 if (dma->dp_window == NULL) { 3707 return (DDI_DMA_NORESOURCES); 3708 } 3709 dma->dp_need_to_free_window = B_TRUE; 3710 dma->dp_window_size = space_needed; 3711 ROOTNEX_DPROBE2(rootnex__bind__sp__alloc, dev_info_t *, 3712 dma->dp_dip, size_t, space_needed); 3713 } 3714 3715 /* 3716 * we allocate copy buffer state and window state at the same time. 3717 * setup our copy buffer state pointers. Make sure it's aligned. 3718 */ 3719 if (dma->dp_copybuf_size > 0) { 3720 dma->dp_pgmap = (rootnex_pgmap_t *)(((uintptr_t) 3721 &dma->dp_window[dma->dp_max_win] + 0x7) & ~0x7); 3722 3723 #if !defined(__amd64) 3724 /* 3725 * make sure all pm_mapped, pm_vaddr, and pm_pp are set to 3726 * false/NULL. Should be quicker to bzero vs loop and set. 3727 */ 3728 bzero(dma->dp_pgmap, copy_state_size); 3729 #endif 3730 } else { 3731 dma->dp_pgmap = NULL; 3732 } 3733 3734 return (DDI_SUCCESS); 3735 } 3736 3737 3738 /* 3739 * rootnex_teardown_copybuf() 3740 * cleans up after rootnex_setup_copybuf() 3741 */ 3742 static void 3743 rootnex_teardown_copybuf(rootnex_dma_t *dma) 3744 { 3745 #if !defined(__amd64) 3746 int i; 3747 3748 /* 3749 * if we allocated kernel heap VMEM space, go through all the pages and 3750 * map out any of the ones that we're mapped into the kernel heap VMEM 3751 * arena. Then free the VMEM space. 3752 */ 3753 if (dma->dp_kva != NULL) { 3754 for (i = 0; i < dma->dp_sglinfo.si_max_pages; i++) { 3755 if (dma->dp_pgmap[i].pm_mapped) { 3756 hat_unload(kas.a_hat, dma->dp_pgmap[i].pm_kaddr, 3757 MMU_PAGESIZE, HAT_UNLOAD); 3758 dma->dp_pgmap[i].pm_mapped = B_FALSE; 3759 } 3760 } 3761 3762 vmem_free(heap_arena, dma->dp_kva, dma->dp_copybuf_size); 3763 } 3764 3765 #endif 3766 3767 /* if we allocated a copy buffer, free it */ 3768 if (dma->dp_cbaddr != NULL) { 3769 i_ddi_mem_free(dma->dp_cbaddr, NULL); 3770 } 3771 } 3772 3773 3774 /* 3775 * rootnex_teardown_windows() 3776 * cleans up after rootnex_setup_windows() 3777 */ 3778 static void 3779 rootnex_teardown_windows(rootnex_dma_t *dma) 3780 { 3781 /* 3782 * if we had to allocate window state on the last bind (because we 3783 * didn't have enough pre-allocated space in the handle), free it. 3784 */ 3785 if (dma->dp_need_to_free_window) { 3786 kmem_free(dma->dp_window, dma->dp_window_size); 3787 } 3788 } 3789 3790 3791 /* 3792 * rootnex_init_win() 3793 * Called in bind slow path during creation of a new window. Initializes 3794 * window state to default values. 3795 */ 3796 /*ARGSUSED*/ 3797 static void 3798 rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3799 rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset) 3800 { 3801 hp->dmai_nwin++; 3802 window->wd_dosync = B_FALSE; 3803 window->wd_offset = cur_offset; 3804 window->wd_size = 0; 3805 window->wd_first_cookie = cookie; 3806 window->wd_cookie_cnt = 0; 3807 window->wd_trim.tr_trim_first = B_FALSE; 3808 window->wd_trim.tr_trim_last = B_FALSE; 3809 window->wd_trim.tr_first_copybuf_win = B_FALSE; 3810 window->wd_trim.tr_last_copybuf_win = B_FALSE; 3811 #if !defined(__amd64) 3812 window->wd_remap_copybuf = dma->dp_cb_remaping; 3813 #endif 3814 } 3815 3816 3817 /* 3818 * rootnex_setup_cookie() 3819 * Called in the bind slow path when the sgl uses the copy buffer. If any of 3820 * the sgl uses the copy buffer, we need to go through each cookie, figure 3821 * out if it uses the copy buffer, and if it does, save away everything we'll 3822 * need during sync. 3823 */ 3824 static void 3825 rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, rootnex_dma_t *dma, 3826 ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used, 3827 page_t **cur_pp) 3828 { 3829 boolean_t copybuf_sz_power_2; 3830 rootnex_sglinfo_t *sinfo; 3831 paddr_t paddr; 3832 uint_t pidx; 3833 uint_t pcnt; 3834 off_t poff; 3835 #if defined(__amd64) 3836 pfn_t pfn; 3837 #else 3838 page_t **pplist; 3839 #endif 3840 3841 ASSERT(dmar_object->dmao_type != DMA_OTYP_DVADDR); 3842 3843 sinfo = &dma->dp_sglinfo; 3844 3845 /* 3846 * Calculate the page index relative to the start of the buffer. The 3847 * index to the current page for our buffer is the offset into the 3848 * first page of the buffer plus our current offset into the buffer 3849 * itself, shifted of course... 3850 */ 3851 pidx = (sinfo->si_buf_offset + cur_offset) >> MMU_PAGESHIFT; 3852 ASSERT(pidx < sinfo->si_max_pages); 3853 3854 /* if this cookie uses the copy buffer */ 3855 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3856 /* 3857 * NOTE: we know that since this cookie uses the copy buffer, it 3858 * is <= MMU_PAGESIZE. 3859 */ 3860 3861 /* 3862 * get the offset into the page. For the 64-bit kernel, get the 3863 * pfn which we'll use with seg kpm. 3864 */ 3865 poff = cookie->dmac_laddress & MMU_PAGEOFFSET; 3866 #if defined(__amd64) 3867 /* mfn_to_pfn() is a NOP on i86pc */ 3868 pfn = mfn_to_pfn(cookie->dmac_laddress >> MMU_PAGESHIFT); 3869 #endif /* __amd64 */ 3870 3871 /* figure out if the copybuf size is a power of 2 */ 3872 if (dma->dp_copybuf_size & (dma->dp_copybuf_size - 1)) { 3873 copybuf_sz_power_2 = B_FALSE; 3874 } else { 3875 copybuf_sz_power_2 = B_TRUE; 3876 } 3877 3878 /* This page uses the copy buffer */ 3879 dma->dp_pgmap[pidx].pm_uses_copybuf = B_TRUE; 3880 3881 /* 3882 * save the copy buffer KVA that we'll use with this page. 3883 * if we still fit within the copybuf, it's a simple add. 3884 * otherwise, we need to wrap over using & or % accordingly. 3885 */ 3886 if ((*copybuf_used + MMU_PAGESIZE) <= dma->dp_copybuf_size) { 3887 dma->dp_pgmap[pidx].pm_cbaddr = dma->dp_cbaddr + 3888 *copybuf_used; 3889 } else { 3890 if (copybuf_sz_power_2) { 3891 dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)( 3892 (uintptr_t)dma->dp_cbaddr + 3893 (*copybuf_used & 3894 (dma->dp_copybuf_size - 1))); 3895 } else { 3896 dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)( 3897 (uintptr_t)dma->dp_cbaddr + 3898 (*copybuf_used % dma->dp_copybuf_size)); 3899 } 3900 } 3901 3902 /* 3903 * over write the cookie physical address with the address of 3904 * the physical address of the copy buffer page that we will 3905 * use. 3906 */ 3907 paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, 3908 dma->dp_pgmap[pidx].pm_cbaddr)) + poff; 3909 3910 cookie->dmac_laddress = ROOTNEX_PADDR_TO_RBASE(paddr); 3911 3912 /* if we have a kernel VA, it's easy, just save that address */ 3913 if ((dmar_object->dmao_type != DMA_OTYP_PAGES) && 3914 (sinfo->si_asp == &kas)) { 3915 /* 3916 * save away the page aligned virtual address of the 3917 * driver buffer. Offsets are handled in the sync code. 3918 */ 3919 dma->dp_pgmap[pidx].pm_kaddr = (caddr_t)(((uintptr_t) 3920 dmar_object->dmao_obj.virt_obj.v_addr + cur_offset) 3921 & MMU_PAGEMASK); 3922 #if !defined(__amd64) 3923 /* 3924 * we didn't need to, and will never need to map this 3925 * page. 3926 */ 3927 dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 3928 #endif 3929 3930 /* we don't have a kernel VA. We need one for the bcopy. */ 3931 } else { 3932 #if defined(__amd64) 3933 /* 3934 * for the 64-bit kernel, it's easy. We use seg kpm to 3935 * get a Kernel VA for the corresponding pfn. 3936 */ 3937 dma->dp_pgmap[pidx].pm_kaddr = hat_kpm_pfn2va(pfn); 3938 #else 3939 /* 3940 * for the 32-bit kernel, this is a pain. First we'll 3941 * save away the page_t or user VA for this page. This 3942 * is needed in rootnex_dma_win() when we switch to a 3943 * new window which requires us to re-map the copy 3944 * buffer. 3945 */ 3946 pplist = dmar_object->dmao_obj.virt_obj.v_priv; 3947 if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 3948 dma->dp_pgmap[pidx].pm_pp = *cur_pp; 3949 dma->dp_pgmap[pidx].pm_vaddr = NULL; 3950 } else if (pplist != NULL) { 3951 dma->dp_pgmap[pidx].pm_pp = pplist[pidx]; 3952 dma->dp_pgmap[pidx].pm_vaddr = NULL; 3953 } else { 3954 dma->dp_pgmap[pidx].pm_pp = NULL; 3955 dma->dp_pgmap[pidx].pm_vaddr = (caddr_t) 3956 (((uintptr_t) 3957 dmar_object->dmao_obj.virt_obj.v_addr + 3958 cur_offset) & MMU_PAGEMASK); 3959 } 3960 3961 /* 3962 * save away the page aligned virtual address which was 3963 * allocated from the kernel heap arena (taking into 3964 * account if we need more copy buffer than we alloced 3965 * and use multiple windows to handle this, i.e. &,%). 3966 * NOTE: there isn't and physical memory backing up this 3967 * virtual address space currently. 3968 */ 3969 if ((*copybuf_used + MMU_PAGESIZE) <= 3970 dma->dp_copybuf_size) { 3971 dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3972 (((uintptr_t)dma->dp_kva + *copybuf_used) & 3973 MMU_PAGEMASK); 3974 } else { 3975 if (copybuf_sz_power_2) { 3976 dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3977 (((uintptr_t)dma->dp_kva + 3978 (*copybuf_used & 3979 (dma->dp_copybuf_size - 1))) & 3980 MMU_PAGEMASK); 3981 } else { 3982 dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3983 (((uintptr_t)dma->dp_kva + 3984 (*copybuf_used % 3985 dma->dp_copybuf_size)) & 3986 MMU_PAGEMASK); 3987 } 3988 } 3989 3990 /* 3991 * if we haven't used up the available copy buffer yet, 3992 * map the kva to the physical page. 3993 */ 3994 if (!dma->dp_cb_remaping && ((*copybuf_used + 3995 MMU_PAGESIZE) <= dma->dp_copybuf_size)) { 3996 dma->dp_pgmap[pidx].pm_mapped = B_TRUE; 3997 if (dma->dp_pgmap[pidx].pm_pp != NULL) { 3998 i86_pp_map(dma->dp_pgmap[pidx].pm_pp, 3999 dma->dp_pgmap[pidx].pm_kaddr); 4000 } else { 4001 i86_va_map(dma->dp_pgmap[pidx].pm_vaddr, 4002 sinfo->si_asp, 4003 dma->dp_pgmap[pidx].pm_kaddr); 4004 } 4005 4006 /* 4007 * we've used up the available copy buffer, this page 4008 * will have to be mapped during rootnex_dma_win() when 4009 * we switch to a new window which requires a re-map 4010 * the copy buffer. (32-bit kernel only) 4011 */ 4012 } else { 4013 dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 4014 } 4015 #endif 4016 /* go to the next page_t */ 4017 if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 4018 *cur_pp = (*cur_pp)->p_next; 4019 } 4020 } 4021 4022 /* add to the copy buffer count */ 4023 *copybuf_used += MMU_PAGESIZE; 4024 4025 /* 4026 * This cookie doesn't use the copy buffer. Walk through the pages this 4027 * cookie occupies to reflect this. 4028 */ 4029 } else { 4030 /* 4031 * figure out how many pages the cookie occupies. We need to 4032 * use the original page offset of the buffer and the cookies 4033 * offset in the buffer to do this. 4034 */ 4035 poff = (sinfo->si_buf_offset + cur_offset) & MMU_PAGEOFFSET; 4036 pcnt = mmu_btopr(cookie->dmac_size + poff); 4037 4038 while (pcnt > 0) { 4039 #if !defined(__amd64) 4040 /* 4041 * the 32-bit kernel doesn't have seg kpm, so we need 4042 * to map in the driver buffer (if it didn't come down 4043 * with a kernel VA) on the fly. Since this page doesn't 4044 * use the copy buffer, it's not, or will it ever, have 4045 * to be mapped in. 4046 */ 4047 dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 4048 #endif 4049 dma->dp_pgmap[pidx].pm_uses_copybuf = B_FALSE; 4050 4051 /* 4052 * we need to update pidx and cur_pp or we'll loose 4053 * track of where we are. 4054 */ 4055 if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 4056 *cur_pp = (*cur_pp)->p_next; 4057 } 4058 pidx++; 4059 pcnt--; 4060 } 4061 } 4062 } 4063 4064 4065 /* 4066 * rootnex_sgllen_window_boundary() 4067 * Called in the bind slow path when the next cookie causes us to exceed (in 4068 * this case == since we start at 0 and sgllen starts at 1) the maximum sgl 4069 * length supported by the DMA H/W. 4070 */ 4071 static int 4072 rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 4073 rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, ddi_dma_attr_t *attr, 4074 off_t cur_offset) 4075 { 4076 off_t new_offset; 4077 size_t trim_sz; 4078 off_t coffset; 4079 4080 4081 /* 4082 * if we know we'll never have to trim, it's pretty easy. Just move to 4083 * the next window and init it. We're done. 4084 */ 4085 if (!dma->dp_trim_required) { 4086 (*windowp)++; 4087 rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 4088 (*windowp)->wd_cookie_cnt++; 4089 (*windowp)->wd_size = cookie->dmac_size; 4090 return (DDI_SUCCESS); 4091 } 4092 4093 /* figure out how much we need to trim from the window */ 4094 ASSERT(attr->dma_attr_granular != 0); 4095 if (dma->dp_granularity_power_2) { 4096 trim_sz = (*windowp)->wd_size & (attr->dma_attr_granular - 1); 4097 } else { 4098 trim_sz = (*windowp)->wd_size % attr->dma_attr_granular; 4099 } 4100 4101 /* The window's a whole multiple of granularity. We're done */ 4102 if (trim_sz == 0) { 4103 (*windowp)++; 4104 rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 4105 (*windowp)->wd_cookie_cnt++; 4106 (*windowp)->wd_size = cookie->dmac_size; 4107 return (DDI_SUCCESS); 4108 } 4109 4110 /* 4111 * The window's not a whole multiple of granularity, since we know this 4112 * is due to the sgllen, we need to go back to the last cookie and trim 4113 * that one, add the left over part of the old cookie into the new 4114 * window, and then add in the new cookie into the new window. 4115 */ 4116 4117 /* 4118 * make sure the driver isn't making us do something bad... Trimming and 4119 * sgllen == 1 don't go together. 4120 */ 4121 if (attr->dma_attr_sgllen == 1) { 4122 return (DDI_DMA_NOMAPPING); 4123 } 4124 4125 /* 4126 * first, setup the current window to account for the trim. Need to go 4127 * back to the last cookie for this. 4128 */ 4129 cookie--; 4130 (*windowp)->wd_trim.tr_trim_last = B_TRUE; 4131 (*windowp)->wd_trim.tr_last_cookie = cookie; 4132 (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 4133 ASSERT(cookie->dmac_size > trim_sz); 4134 (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 4135 (*windowp)->wd_size -= trim_sz; 4136 4137 /* save the buffer offsets for the next window */ 4138 coffset = cookie->dmac_size - trim_sz; 4139 new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 4140 4141 /* 4142 * set this now in case this is the first window. all other cases are 4143 * set in dma_win() 4144 */ 4145 cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 4146 4147 /* 4148 * initialize the next window using what's left over in the previous 4149 * cookie. 4150 */ 4151 (*windowp)++; 4152 rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 4153 (*windowp)->wd_cookie_cnt++; 4154 (*windowp)->wd_trim.tr_trim_first = B_TRUE; 4155 (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + coffset; 4156 (*windowp)->wd_trim.tr_first_size = trim_sz; 4157 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 4158 (*windowp)->wd_dosync = B_TRUE; 4159 } 4160 4161 /* 4162 * now go back to the current cookie and add it to the new window. set 4163 * the new window size to the what was left over from the previous 4164 * cookie and what's in the current cookie. 4165 */ 4166 cookie++; 4167 (*windowp)->wd_cookie_cnt++; 4168 (*windowp)->wd_size = trim_sz + cookie->dmac_size; 4169 4170 /* 4171 * trim plus the next cookie could put us over maxxfer (a cookie can be 4172 * a max size of maxxfer). Handle that case. 4173 */ 4174 if ((*windowp)->wd_size > dma->dp_maxxfer) { 4175 /* 4176 * maxxfer is already a whole multiple of granularity, and this 4177 * trim will be <= the previous trim (since a cookie can't be 4178 * larger than maxxfer). Make things simple here. 4179 */ 4180 trim_sz = (*windowp)->wd_size - dma->dp_maxxfer; 4181 (*windowp)->wd_trim.tr_trim_last = B_TRUE; 4182 (*windowp)->wd_trim.tr_last_cookie = cookie; 4183 (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 4184 (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 4185 (*windowp)->wd_size -= trim_sz; 4186 ASSERT((*windowp)->wd_size == dma->dp_maxxfer); 4187 4188 /* save the buffer offsets for the next window */ 4189 coffset = cookie->dmac_size - trim_sz; 4190 new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 4191 4192 /* setup the next window */ 4193 (*windowp)++; 4194 rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 4195 (*windowp)->wd_cookie_cnt++; 4196 (*windowp)->wd_trim.tr_trim_first = B_TRUE; 4197 (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + 4198 coffset; 4199 (*windowp)->wd_trim.tr_first_size = trim_sz; 4200 } 4201 4202 return (DDI_SUCCESS); 4203 } 4204 4205 4206 /* 4207 * rootnex_copybuf_window_boundary() 4208 * Called in bind slowpath when we get to a window boundary because we used 4209 * up all the copy buffer that we have. 4210 */ 4211 static int 4212 rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 4213 rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, off_t cur_offset, 4214 size_t *copybuf_used) 4215 { 4216 rootnex_sglinfo_t *sinfo; 4217 off_t new_offset; 4218 size_t trim_sz; 4219 paddr_t paddr; 4220 off_t coffset; 4221 uint_t pidx; 4222 off_t poff; 4223 4224 4225 sinfo = &dma->dp_sglinfo; 4226 4227 /* 4228 * the copy buffer should be a whole multiple of page size. We know that 4229 * this cookie is <= MMU_PAGESIZE. 4230 */ 4231 ASSERT(cookie->dmac_size <= MMU_PAGESIZE); 4232 4233 /* 4234 * from now on, all new windows in this bind need to be re-mapped during 4235 * ddi_dma_getwin() (32-bit kernel only). i.e. we ran out out copybuf 4236 * space... 4237 */ 4238 #if !defined(__amd64) 4239 dma->dp_cb_remaping = B_TRUE; 4240 #endif 4241 4242 /* reset copybuf used */ 4243 *copybuf_used = 0; 4244 4245 /* 4246 * if we don't have to trim (since granularity is set to 1), go to the 4247 * next window and add the current cookie to it. We know the current 4248 * cookie uses the copy buffer since we're in this code path. 4249 */ 4250 if (!dma->dp_trim_required) { 4251 (*windowp)++; 4252 rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 4253 4254 /* Add this cookie to the new window */ 4255 (*windowp)->wd_cookie_cnt++; 4256 (*windowp)->wd_size += cookie->dmac_size; 4257 *copybuf_used += MMU_PAGESIZE; 4258 return (DDI_SUCCESS); 4259 } 4260 4261 /* 4262 * *** may need to trim, figure it out. 4263 */ 4264 4265 /* figure out how much we need to trim from the window */ 4266 if (dma->dp_granularity_power_2) { 4267 trim_sz = (*windowp)->wd_size & 4268 (hp->dmai_attr.dma_attr_granular - 1); 4269 } else { 4270 trim_sz = (*windowp)->wd_size % hp->dmai_attr.dma_attr_granular; 4271 } 4272 4273 /* 4274 * if the window's a whole multiple of granularity, go to the next 4275 * window, init it, then add in the current cookie. We know the current 4276 * cookie uses the copy buffer since we're in this code path. 4277 */ 4278 if (trim_sz == 0) { 4279 (*windowp)++; 4280 rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 4281 4282 /* Add this cookie to the new window */ 4283 (*windowp)->wd_cookie_cnt++; 4284 (*windowp)->wd_size += cookie->dmac_size; 4285 *copybuf_used += MMU_PAGESIZE; 4286 return (DDI_SUCCESS); 4287 } 4288 4289 /* 4290 * *** We figured it out, we definitly need to trim 4291 */ 4292 4293 /* 4294 * make sure the driver isn't making us do something bad... 4295 * Trimming and sgllen == 1 don't go together. 4296 */ 4297 if (hp->dmai_attr.dma_attr_sgllen == 1) { 4298 return (DDI_DMA_NOMAPPING); 4299 } 4300 4301 /* 4302 * first, setup the current window to account for the trim. Need to go 4303 * back to the last cookie for this. Some of the last cookie will be in 4304 * the current window, and some of the last cookie will be in the new 4305 * window. All of the current cookie will be in the new window. 4306 */ 4307 cookie--; 4308 (*windowp)->wd_trim.tr_trim_last = B_TRUE; 4309 (*windowp)->wd_trim.tr_last_cookie = cookie; 4310 (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 4311 ASSERT(cookie->dmac_size > trim_sz); 4312 (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 4313 (*windowp)->wd_size -= trim_sz; 4314 4315 /* 4316 * we're trimming the last cookie (not the current cookie). So that 4317 * last cookie may have or may not have been using the copy buffer ( 4318 * we know the cookie passed in uses the copy buffer since we're in 4319 * this code path). 4320 * 4321 * If the last cookie doesn't use the copy buffer, nothing special to 4322 * do. However, if it does uses the copy buffer, it will be both the 4323 * last page in the current window and the first page in the next 4324 * window. Since we are reusing the copy buffer (and KVA space on the 4325 * 32-bit kernel), this page will use the end of the copy buffer in the 4326 * current window, and the start of the copy buffer in the next window. 4327 * Track that info... The cookie physical address was already set to 4328 * the copy buffer physical address in setup_cookie.. 4329 */ 4330 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 4331 pidx = (sinfo->si_buf_offset + (*windowp)->wd_offset + 4332 (*windowp)->wd_size) >> MMU_PAGESHIFT; 4333 (*windowp)->wd_trim.tr_last_copybuf_win = B_TRUE; 4334 (*windowp)->wd_trim.tr_last_pidx = pidx; 4335 (*windowp)->wd_trim.tr_last_cbaddr = 4336 dma->dp_pgmap[pidx].pm_cbaddr; 4337 #if !defined(__amd64) 4338 (*windowp)->wd_trim.tr_last_kaddr = 4339 dma->dp_pgmap[pidx].pm_kaddr; 4340 #endif 4341 } 4342 4343 /* save the buffer offsets for the next window */ 4344 coffset = cookie->dmac_size - trim_sz; 4345 new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 4346 4347 /* 4348 * set this now in case this is the first window. all other cases are 4349 * set in dma_win() 4350 */ 4351 cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 4352 4353 /* 4354 * initialize the next window using what's left over in the previous 4355 * cookie. 4356 */ 4357 (*windowp)++; 4358 rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 4359 (*windowp)->wd_cookie_cnt++; 4360 (*windowp)->wd_trim.tr_trim_first = B_TRUE; 4361 (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + coffset; 4362 (*windowp)->wd_trim.tr_first_size = trim_sz; 4363 4364 /* 4365 * again, we're tracking if the last cookie uses the copy buffer. 4366 * read the comment above for more info on why we need to track 4367 * additional state. 4368 * 4369 * For the first cookie in the new window, we need reset the physical 4370 * address to DMA into to the start of the copy buffer plus any 4371 * initial page offset which may be present. 4372 */ 4373 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 4374 (*windowp)->wd_dosync = B_TRUE; 4375 (*windowp)->wd_trim.tr_first_copybuf_win = B_TRUE; 4376 (*windowp)->wd_trim.tr_first_pidx = pidx; 4377 (*windowp)->wd_trim.tr_first_cbaddr = dma->dp_cbaddr; 4378 poff = (*windowp)->wd_trim.tr_first_paddr & MMU_PAGEOFFSET; 4379 4380 paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, dma->dp_cbaddr)) + 4381 poff; 4382 (*windowp)->wd_trim.tr_first_paddr = 4383 ROOTNEX_PADDR_TO_RBASE(paddr); 4384 4385 #if !defined(__amd64) 4386 (*windowp)->wd_trim.tr_first_kaddr = dma->dp_kva; 4387 #endif 4388 /* account for the cookie copybuf usage in the new window */ 4389 *copybuf_used += MMU_PAGESIZE; 4390 4391 /* 4392 * every piece of code has to have a hack, and here is this 4393 * ones :-) 4394 * 4395 * There is a complex interaction between setup_cookie and the 4396 * copybuf window boundary. The complexity had to be in either 4397 * the maxxfer window, or the copybuf window, and I chose the 4398 * copybuf code. 4399 * 4400 * So in this code path, we have taken the last cookie, 4401 * virtually broken it in half due to the trim, and it happens 4402 * to use the copybuf which further complicates life. At the 4403 * same time, we have already setup the current cookie, which 4404 * is now wrong. More background info: the current cookie uses 4405 * the copybuf, so it is only a page long max. So we need to 4406 * fix the current cookies copy buffer address, physical 4407 * address, and kva for the 32-bit kernel. We due this by 4408 * bumping them by page size (of course, we can't due this on 4409 * the physical address since the copy buffer may not be 4410 * physically contiguous). 4411 */ 4412 cookie++; 4413 dma->dp_pgmap[pidx + 1].pm_cbaddr += MMU_PAGESIZE; 4414 poff = cookie->dmac_laddress & MMU_PAGEOFFSET; 4415 4416 paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, 4417 dma->dp_pgmap[pidx + 1].pm_cbaddr)) + poff; 4418 cookie->dmac_laddress = ROOTNEX_PADDR_TO_RBASE(paddr); 4419 4420 #if !defined(__amd64) 4421 ASSERT(dma->dp_pgmap[pidx + 1].pm_mapped == B_FALSE); 4422 dma->dp_pgmap[pidx + 1].pm_kaddr += MMU_PAGESIZE; 4423 #endif 4424 } else { 4425 /* go back to the current cookie */ 4426 cookie++; 4427 } 4428 4429 /* 4430 * add the current cookie to the new window. set the new window size to 4431 * the what was left over from the previous cookie and what's in the 4432 * current cookie. 4433 */ 4434 (*windowp)->wd_cookie_cnt++; 4435 (*windowp)->wd_size = trim_sz + cookie->dmac_size; 4436 ASSERT((*windowp)->wd_size < dma->dp_maxxfer); 4437 4438 /* 4439 * we know that the cookie passed in always uses the copy buffer. We 4440 * wouldn't be here if it didn't. 4441 */ 4442 *copybuf_used += MMU_PAGESIZE; 4443 4444 return (DDI_SUCCESS); 4445 } 4446 4447 4448 /* 4449 * rootnex_maxxfer_window_boundary() 4450 * Called in bind slowpath when we get to a window boundary because we will 4451 * go over maxxfer. 4452 */ 4453 static int 4454 rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 4455 rootnex_window_t **windowp, ddi_dma_cookie_t *cookie) 4456 { 4457 size_t dmac_size; 4458 off_t new_offset; 4459 size_t trim_sz; 4460 off_t coffset; 4461 4462 4463 /* 4464 * calculate how much we have to trim off of the current cookie to equal 4465 * maxxfer. We don't have to account for granularity here since our 4466 * maxxfer already takes that into account. 4467 */ 4468 trim_sz = ((*windowp)->wd_size + cookie->dmac_size) - dma->dp_maxxfer; 4469 ASSERT(trim_sz <= cookie->dmac_size); 4470 ASSERT(trim_sz <= dma->dp_maxxfer); 4471 4472 /* save cookie size since we need it later and we might change it */ 4473 dmac_size = cookie->dmac_size; 4474 4475 /* 4476 * if we're not trimming the entire cookie, setup the current window to 4477 * account for the trim. 4478 */ 4479 if (trim_sz < cookie->dmac_size) { 4480 (*windowp)->wd_cookie_cnt++; 4481 (*windowp)->wd_trim.tr_trim_last = B_TRUE; 4482 (*windowp)->wd_trim.tr_last_cookie = cookie; 4483 (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 4484 (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 4485 (*windowp)->wd_size = dma->dp_maxxfer; 4486 4487 /* 4488 * set the adjusted cookie size now in case this is the first 4489 * window. All other windows are taken care of in get win 4490 */ 4491 cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 4492 } 4493 4494 /* 4495 * coffset is the current offset within the cookie, new_offset is the 4496 * current offset with the entire buffer. 4497 */ 4498 coffset = dmac_size - trim_sz; 4499 new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 4500 4501 /* initialize the next window */ 4502 (*windowp)++; 4503 rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 4504 (*windowp)->wd_cookie_cnt++; 4505 (*windowp)->wd_size = trim_sz; 4506 if (trim_sz < dmac_size) { 4507 (*windowp)->wd_trim.tr_trim_first = B_TRUE; 4508 (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + 4509 coffset; 4510 (*windowp)->wd_trim.tr_first_size = trim_sz; 4511 } 4512 4513 return (DDI_SUCCESS); 4514 } 4515 4516 4517 /*ARGSUSED*/ 4518 static int 4519 rootnex_coredma_sync(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 4520 off_t off, size_t len, uint_t cache_flags) 4521 { 4522 rootnex_sglinfo_t *sinfo; 4523 rootnex_pgmap_t *cbpage; 4524 rootnex_window_t *win; 4525 ddi_dma_impl_t *hp; 4526 rootnex_dma_t *dma; 4527 caddr_t fromaddr; 4528 caddr_t toaddr; 4529 uint_t psize; 4530 off_t offset; 4531 uint_t pidx; 4532 size_t size; 4533 off_t poff; 4534 int e; 4535 4536 4537 hp = (ddi_dma_impl_t *)handle; 4538 dma = (rootnex_dma_t *)hp->dmai_private; 4539 sinfo = &dma->dp_sglinfo; 4540 4541 /* 4542 * if we don't have any windows, we don't need to sync. A copybuf 4543 * will cause us to have at least one window. 4544 */ 4545 if (dma->dp_window == NULL) { 4546 return (DDI_SUCCESS); 4547 } 4548 4549 /* This window may not need to be sync'd */ 4550 win = &dma->dp_window[dma->dp_current_win]; 4551 if (!win->wd_dosync) { 4552 return (DDI_SUCCESS); 4553 } 4554 4555 /* handle off and len special cases */ 4556 if ((off == 0) || (rootnex_sync_ignore_params)) { 4557 offset = win->wd_offset; 4558 } else { 4559 offset = off; 4560 } 4561 if ((len == 0) || (rootnex_sync_ignore_params)) { 4562 size = win->wd_size; 4563 } else { 4564 size = len; 4565 } 4566 4567 /* check the sync args to make sure they make a little sense */ 4568 if (rootnex_sync_check_parms) { 4569 e = rootnex_valid_sync_parms(hp, win, offset, size, 4570 cache_flags); 4571 if (e != DDI_SUCCESS) { 4572 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_SYNC_FAIL]); 4573 return (DDI_FAILURE); 4574 } 4575 } 4576 4577 /* 4578 * special case the first page to handle the offset into the page. The 4579 * offset to the current page for our buffer is the offset into the 4580 * first page of the buffer plus our current offset into the buffer 4581 * itself, masked of course. 4582 */ 4583 poff = (sinfo->si_buf_offset + offset) & MMU_PAGEOFFSET; 4584 psize = MIN((MMU_PAGESIZE - poff), size); 4585 4586 /* go through all the pages that we want to sync */ 4587 while (size > 0) { 4588 /* 4589 * Calculate the page index relative to the start of the buffer. 4590 * The index to the current page for our buffer is the offset 4591 * into the first page of the buffer plus our current offset 4592 * into the buffer itself, shifted of course... 4593 */ 4594 pidx = (sinfo->si_buf_offset + offset) >> MMU_PAGESHIFT; 4595 ASSERT(pidx < sinfo->si_max_pages); 4596 4597 /* 4598 * if this page uses the copy buffer, we need to sync it, 4599 * otherwise, go on to the next page. 4600 */ 4601 cbpage = &dma->dp_pgmap[pidx]; 4602 ASSERT((cbpage->pm_uses_copybuf == B_TRUE) || 4603 (cbpage->pm_uses_copybuf == B_FALSE)); 4604 if (cbpage->pm_uses_copybuf) { 4605 /* cbaddr and kaddr should be page aligned */ 4606 ASSERT(((uintptr_t)cbpage->pm_cbaddr & 4607 MMU_PAGEOFFSET) == 0); 4608 ASSERT(((uintptr_t)cbpage->pm_kaddr & 4609 MMU_PAGEOFFSET) == 0); 4610 4611 /* 4612 * if we're copying for the device, we are going to 4613 * copy from the drivers buffer and to the rootnex 4614 * allocated copy buffer. 4615 */ 4616 if (cache_flags == DDI_DMA_SYNC_FORDEV) { 4617 fromaddr = cbpage->pm_kaddr + poff; 4618 toaddr = cbpage->pm_cbaddr + poff; 4619 ROOTNEX_DPROBE2(rootnex__sync__dev, 4620 dev_info_t *, dma->dp_dip, size_t, psize); 4621 4622 /* 4623 * if we're copying for the cpu/kernel, we are going to 4624 * copy from the rootnex allocated copy buffer to the 4625 * drivers buffer. 4626 */ 4627 } else { 4628 fromaddr = cbpage->pm_cbaddr + poff; 4629 toaddr = cbpage->pm_kaddr + poff; 4630 ROOTNEX_DPROBE2(rootnex__sync__cpu, 4631 dev_info_t *, dma->dp_dip, size_t, psize); 4632 } 4633 4634 bcopy(fromaddr, toaddr, psize); 4635 } 4636 4637 /* 4638 * decrement size until we're done, update our offset into the 4639 * buffer, and get the next page size. 4640 */ 4641 size -= psize; 4642 offset += psize; 4643 psize = MIN(MMU_PAGESIZE, size); 4644 4645 /* page offset is zero for the rest of this loop */ 4646 poff = 0; 4647 } 4648 4649 return (DDI_SUCCESS); 4650 } 4651 4652 /* 4653 * rootnex_dma_sync() 4654 * called from ddi_dma_sync() if DMP_NOSYNC is not set in hp->dmai_rflags. 4655 * We set DMP_NOSYNC if we're not using the copy buffer. If DMP_NOSYNC 4656 * is set, ddi_dma_sync() returns immediately passing back success. 4657 */ 4658 /*ARGSUSED*/ 4659 static int 4660 rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 4661 off_t off, size_t len, uint_t cache_flags) 4662 { 4663 #if defined(__amd64) && !defined(__xpv) 4664 if (IOMMU_USED(rdip)) { 4665 return (iommulib_nexdma_sync(dip, rdip, handle, off, len, 4666 cache_flags)); 4667 } 4668 #endif 4669 return (rootnex_coredma_sync(dip, rdip, handle, off, len, 4670 cache_flags)); 4671 } 4672 4673 /* 4674 * rootnex_valid_sync_parms() 4675 * checks the parameters passed to sync to verify they are correct. 4676 */ 4677 static int 4678 rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win, 4679 off_t offset, size_t size, uint_t cache_flags) 4680 { 4681 off_t woffset; 4682 4683 4684 /* 4685 * the first part of the test to make sure the offset passed in is 4686 * within the window. 4687 */ 4688 if (offset < win->wd_offset) { 4689 return (DDI_FAILURE); 4690 } 4691 4692 /* 4693 * second and last part of the test to make sure the offset and length 4694 * passed in is within the window. 4695 */ 4696 woffset = offset - win->wd_offset; 4697 if ((woffset + size) > win->wd_size) { 4698 return (DDI_FAILURE); 4699 } 4700 4701 /* 4702 * if we are sync'ing for the device, the DDI_DMA_WRITE flag should 4703 * be set too. 4704 */ 4705 if ((cache_flags == DDI_DMA_SYNC_FORDEV) && 4706 (hp->dmai_rflags & DDI_DMA_WRITE)) { 4707 return (DDI_SUCCESS); 4708 } 4709 4710 /* 4711 * at this point, either DDI_DMA_SYNC_FORCPU or DDI_DMA_SYNC_FORKERNEL 4712 * should be set. Also DDI_DMA_READ should be set in the flags. 4713 */ 4714 if (((cache_flags == DDI_DMA_SYNC_FORCPU) || 4715 (cache_flags == DDI_DMA_SYNC_FORKERNEL)) && 4716 (hp->dmai_rflags & DDI_DMA_READ)) { 4717 return (DDI_SUCCESS); 4718 } 4719 4720 return (DDI_FAILURE); 4721 } 4722 4723 4724 /*ARGSUSED*/ 4725 static int 4726 rootnex_coredma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 4727 uint_t win, off_t *offp, size_t *lenp, ddi_dma_cookie_t *cookiep, 4728 uint_t *ccountp) 4729 { 4730 rootnex_window_t *window; 4731 rootnex_trim_t *trim; 4732 ddi_dma_impl_t *hp; 4733 rootnex_dma_t *dma; 4734 ddi_dma_obj_t *dmao; 4735 #if !defined(__amd64) 4736 rootnex_sglinfo_t *sinfo; 4737 rootnex_pgmap_t *pmap; 4738 uint_t pidx; 4739 uint_t pcnt; 4740 off_t poff; 4741 int i; 4742 #endif 4743 4744 4745 hp = (ddi_dma_impl_t *)handle; 4746 dma = (rootnex_dma_t *)hp->dmai_private; 4747 #if !defined(__amd64) 4748 sinfo = &dma->dp_sglinfo; 4749 #endif 4750 4751 /* If we try and get a window which doesn't exist, return failure */ 4752 if (win >= hp->dmai_nwin) { 4753 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]); 4754 return (DDI_FAILURE); 4755 } 4756 4757 dmao = dma->dp_dvma_used ? &dma->dp_dma : &dma->dp_dvma; 4758 4759 /* 4760 * if we don't have any windows, and they're asking for the first 4761 * window, setup the cookie pointer to the first cookie in the bind. 4762 * setup our return values, then increment the cookie since we return 4763 * the first cookie on the stack. 4764 */ 4765 if (dma->dp_window == NULL) { 4766 if (win != 0) { 4767 ROOTNEX_DPROF_INC( 4768 &rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]); 4769 return (DDI_FAILURE); 4770 } 4771 hp->dmai_cookie = dma->dp_cookies; 4772 *offp = 0; 4773 *lenp = dmao->dmao_size; 4774 *ccountp = dma->dp_sglinfo.si_sgl_size; 4775 *cookiep = hp->dmai_cookie[0]; 4776 hp->dmai_cookie++; 4777 return (DDI_SUCCESS); 4778 } 4779 4780 /* sync the old window before moving on to the new one */ 4781 window = &dma->dp_window[dma->dp_current_win]; 4782 if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_READ)) { 4783 (void) rootnex_coredma_sync(dip, rdip, handle, 0, 0, 4784 DDI_DMA_SYNC_FORCPU); 4785 } 4786 4787 #if !defined(__amd64) 4788 /* 4789 * before we move to the next window, if we need to re-map, unmap all 4790 * the pages in this window. 4791 */ 4792 if (dma->dp_cb_remaping) { 4793 /* 4794 * If we switch to this window again, we'll need to map in 4795 * on the fly next time. 4796 */ 4797 window->wd_remap_copybuf = B_TRUE; 4798 4799 /* 4800 * calculate the page index into the buffer where this window 4801 * starts, and the number of pages this window takes up. 4802 */ 4803 pidx = (sinfo->si_buf_offset + window->wd_offset) >> 4804 MMU_PAGESHIFT; 4805 poff = (sinfo->si_buf_offset + window->wd_offset) & 4806 MMU_PAGEOFFSET; 4807 pcnt = mmu_btopr(window->wd_size + poff); 4808 ASSERT((pidx + pcnt) <= sinfo->si_max_pages); 4809 4810 /* unmap pages which are currently mapped in this window */ 4811 for (i = 0; i < pcnt; i++) { 4812 if (dma->dp_pgmap[pidx].pm_mapped) { 4813 hat_unload(kas.a_hat, 4814 dma->dp_pgmap[pidx].pm_kaddr, MMU_PAGESIZE, 4815 HAT_UNLOAD); 4816 dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 4817 } 4818 pidx++; 4819 } 4820 } 4821 #endif 4822 4823 /* 4824 * Move to the new window. 4825 * NOTE: current_win must be set for sync to work right 4826 */ 4827 dma->dp_current_win = win; 4828 window = &dma->dp_window[win]; 4829 4830 /* if needed, adjust the first and/or last cookies for trim */ 4831 trim = &window->wd_trim; 4832 if (trim->tr_trim_first) { 4833 window->wd_first_cookie->dmac_laddress = trim->tr_first_paddr; 4834 window->wd_first_cookie->dmac_size = trim->tr_first_size; 4835 #if !defined(__amd64) 4836 window->wd_first_cookie->dmac_type = 4837 (window->wd_first_cookie->dmac_type & 4838 ROOTNEX_USES_COPYBUF) + window->wd_offset; 4839 #endif 4840 if (trim->tr_first_copybuf_win) { 4841 dma->dp_pgmap[trim->tr_first_pidx].pm_cbaddr = 4842 trim->tr_first_cbaddr; 4843 #if !defined(__amd64) 4844 dma->dp_pgmap[trim->tr_first_pidx].pm_kaddr = 4845 trim->tr_first_kaddr; 4846 #endif 4847 } 4848 } 4849 if (trim->tr_trim_last) { 4850 trim->tr_last_cookie->dmac_laddress = trim->tr_last_paddr; 4851 trim->tr_last_cookie->dmac_size = trim->tr_last_size; 4852 if (trim->tr_last_copybuf_win) { 4853 dma->dp_pgmap[trim->tr_last_pidx].pm_cbaddr = 4854 trim->tr_last_cbaddr; 4855 #if !defined(__amd64) 4856 dma->dp_pgmap[trim->tr_last_pidx].pm_kaddr = 4857 trim->tr_last_kaddr; 4858 #endif 4859 } 4860 } 4861 4862 /* 4863 * setup the cookie pointer to the first cookie in the window. setup 4864 * our return values, then increment the cookie since we return the 4865 * first cookie on the stack. 4866 */ 4867 hp->dmai_cookie = window->wd_first_cookie; 4868 *offp = window->wd_offset; 4869 *lenp = window->wd_size; 4870 *ccountp = window->wd_cookie_cnt; 4871 *cookiep = hp->dmai_cookie[0]; 4872 hp->dmai_cookie++; 4873 4874 #if !defined(__amd64) 4875 /* re-map copybuf if required for this window */ 4876 if (dma->dp_cb_remaping) { 4877 /* 4878 * calculate the page index into the buffer where this 4879 * window starts. 4880 */ 4881 pidx = (sinfo->si_buf_offset + window->wd_offset) >> 4882 MMU_PAGESHIFT; 4883 ASSERT(pidx < sinfo->si_max_pages); 4884 4885 /* 4886 * the first page can get unmapped if it's shared with the 4887 * previous window. Even if the rest of this window is already 4888 * mapped in, we need to still check this one. 4889 */ 4890 pmap = &dma->dp_pgmap[pidx]; 4891 if ((pmap->pm_uses_copybuf) && (pmap->pm_mapped == B_FALSE)) { 4892 if (pmap->pm_pp != NULL) { 4893 pmap->pm_mapped = B_TRUE; 4894 i86_pp_map(pmap->pm_pp, pmap->pm_kaddr); 4895 } else if (pmap->pm_vaddr != NULL) { 4896 pmap->pm_mapped = B_TRUE; 4897 i86_va_map(pmap->pm_vaddr, sinfo->si_asp, 4898 pmap->pm_kaddr); 4899 } 4900 } 4901 pidx++; 4902 4903 /* map in the rest of the pages if required */ 4904 if (window->wd_remap_copybuf) { 4905 window->wd_remap_copybuf = B_FALSE; 4906 4907 /* figure out many pages this window takes up */ 4908 poff = (sinfo->si_buf_offset + window->wd_offset) & 4909 MMU_PAGEOFFSET; 4910 pcnt = mmu_btopr(window->wd_size + poff); 4911 ASSERT(((pidx - 1) + pcnt) <= sinfo->si_max_pages); 4912 4913 /* map pages which require it */ 4914 for (i = 1; i < pcnt; i++) { 4915 pmap = &dma->dp_pgmap[pidx]; 4916 if (pmap->pm_uses_copybuf) { 4917 ASSERT(pmap->pm_mapped == B_FALSE); 4918 if (pmap->pm_pp != NULL) { 4919 pmap->pm_mapped = B_TRUE; 4920 i86_pp_map(pmap->pm_pp, 4921 pmap->pm_kaddr); 4922 } else if (pmap->pm_vaddr != NULL) { 4923 pmap->pm_mapped = B_TRUE; 4924 i86_va_map(pmap->pm_vaddr, 4925 sinfo->si_asp, 4926 pmap->pm_kaddr); 4927 } 4928 } 4929 pidx++; 4930 } 4931 } 4932 } 4933 #endif 4934 4935 /* if the new window uses the copy buffer, sync it for the device */ 4936 if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_WRITE)) { 4937 (void) rootnex_coredma_sync(dip, rdip, handle, 0, 0, 4938 DDI_DMA_SYNC_FORDEV); 4939 } 4940 4941 return (DDI_SUCCESS); 4942 } 4943 4944 /* 4945 * rootnex_dma_win() 4946 * called from ddi_dma_getwin() 4947 */ 4948 /*ARGSUSED*/ 4949 static int 4950 rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 4951 uint_t win, off_t *offp, size_t *lenp, ddi_dma_cookie_t *cookiep, 4952 uint_t *ccountp) 4953 { 4954 #if defined(__amd64) && !defined(__xpv) 4955 if (IOMMU_USED(rdip)) { 4956 return (iommulib_nexdma_win(dip, rdip, handle, win, offp, lenp, 4957 cookiep, ccountp)); 4958 } 4959 #endif 4960 4961 return (rootnex_coredma_win(dip, rdip, handle, win, offp, lenp, 4962 cookiep, ccountp)); 4963 } 4964 4965 #if defined(__amd64) && !defined(__xpv) 4966 /*ARGSUSED*/ 4967 static int 4968 rootnex_coredma_hdl_setprivate(dev_info_t *dip, dev_info_t *rdip, 4969 ddi_dma_handle_t handle, void *v) 4970 { 4971 ddi_dma_impl_t *hp; 4972 rootnex_dma_t *dma; 4973 4974 hp = (ddi_dma_impl_t *)handle; 4975 dma = (rootnex_dma_t *)hp->dmai_private; 4976 dma->dp_iommu_private = v; 4977 4978 return (DDI_SUCCESS); 4979 } 4980 4981 /*ARGSUSED*/ 4982 static void * 4983 rootnex_coredma_hdl_getprivate(dev_info_t *dip, dev_info_t *rdip, 4984 ddi_dma_handle_t handle) 4985 { 4986 ddi_dma_impl_t *hp; 4987 rootnex_dma_t *dma; 4988 4989 hp = (ddi_dma_impl_t *)handle; 4990 dma = (rootnex_dma_t *)hp->dmai_private; 4991 4992 return (dma->dp_iommu_private); 4993 } 4994 #endif 4995 4996 /* 4997 * ************************ 4998 * obsoleted dma routines 4999 * ************************ 5000 */ 5001 5002 /* 5003 * rootnex_dma_map() 5004 * called from ddi_dma_setup() 5005 * NO IOMMU in 32 bit mode. The below routines doesn't work in 64 bit mode. 5006 */ 5007 /* ARGSUSED */ 5008 static int 5009 rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip, 5010 struct ddi_dma_req *dmareq, ddi_dma_handle_t *handlep) 5011 { 5012 #if defined(__amd64) 5013 /* 5014 * this interface is not supported in 64-bit x86 kernel. See comment in 5015 * rootnex_dma_mctl() 5016 */ 5017 return (DDI_DMA_NORESOURCES); 5018 5019 #else /* 32-bit x86 kernel */ 5020 ddi_dma_handle_t *lhandlep; 5021 ddi_dma_handle_t lhandle; 5022 ddi_dma_cookie_t cookie; 5023 ddi_dma_attr_t dma_attr; 5024 ddi_dma_lim_t *dma_lim; 5025 uint_t ccnt; 5026 int e; 5027 5028 5029 /* 5030 * if the driver is just testing to see if it's possible to do the bind, 5031 * we'll use local state. Otherwise, use the handle pointer passed in. 5032 */ 5033 if (handlep == NULL) { 5034 lhandlep = &lhandle; 5035 } else { 5036 lhandlep = handlep; 5037 } 5038 5039 /* convert the limit structure to a dma_attr one */ 5040 dma_lim = dmareq->dmar_limits; 5041 dma_attr.dma_attr_version = DMA_ATTR_V0; 5042 dma_attr.dma_attr_addr_lo = dma_lim->dlim_addr_lo; 5043 dma_attr.dma_attr_addr_hi = dma_lim->dlim_addr_hi; 5044 dma_attr.dma_attr_minxfer = dma_lim->dlim_minxfer; 5045 dma_attr.dma_attr_seg = dma_lim->dlim_adreg_max; 5046 dma_attr.dma_attr_count_max = dma_lim->dlim_ctreg_max; 5047 dma_attr.dma_attr_granular = dma_lim->dlim_granular; 5048 dma_attr.dma_attr_sgllen = dma_lim->dlim_sgllen; 5049 dma_attr.dma_attr_maxxfer = dma_lim->dlim_reqsize; 5050 dma_attr.dma_attr_burstsizes = dma_lim->dlim_burstsizes; 5051 dma_attr.dma_attr_align = MMU_PAGESIZE; 5052 dma_attr.dma_attr_flags = 0; 5053 5054 e = rootnex_dma_allochdl(dip, rdip, &dma_attr, dmareq->dmar_fp, 5055 dmareq->dmar_arg, lhandlep); 5056 if (e != DDI_SUCCESS) { 5057 return (e); 5058 } 5059 5060 e = rootnex_dma_bindhdl(dip, rdip, *lhandlep, dmareq, &cookie, &ccnt); 5061 if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) { 5062 (void) rootnex_dma_freehdl(dip, rdip, *lhandlep); 5063 return (e); 5064 } 5065 5066 /* 5067 * if the driver is just testing to see if it's possible to do the bind, 5068 * free up the local state and return the result. 5069 */ 5070 if (handlep == NULL) { 5071 (void) rootnex_dma_unbindhdl(dip, rdip, *lhandlep); 5072 (void) rootnex_dma_freehdl(dip, rdip, *lhandlep); 5073 if (e == DDI_DMA_MAPPED) { 5074 return (DDI_DMA_MAPOK); 5075 } else { 5076 return (DDI_DMA_NOMAPPING); 5077 } 5078 } 5079 5080 return (e); 5081 #endif /* defined(__amd64) */ 5082 } 5083 5084 /* 5085 * rootnex_dma_mctl() 5086 * 5087 * No IOMMU in 32 bit mode. The below routine doesn't work in 64 bit mode. 5088 */ 5089 /* ARGSUSED */ 5090 static int 5091 rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 5092 enum ddi_dma_ctlops request, off_t *offp, size_t *lenp, caddr_t *objpp, 5093 uint_t cache_flags) 5094 { 5095 #if defined(__amd64) 5096 /* 5097 * DDI_DMA_SMEM_ALLOC & DDI_DMA_IOPB_ALLOC we're changed to have a 5098 * common implementation in genunix, so they no longer have x86 5099 * specific functionality which called into dma_ctl. 5100 * 5101 * The rest of the obsoleted interfaces were never supported in the 5102 * 64-bit x86 kernel. For s10, the obsoleted DDI_DMA_SEGTOC interface 5103 * was not ported to the x86 64-bit kernel do to serious x86 rootnex 5104 * implementation issues. 5105 * 5106 * If you can't use DDI_DMA_SEGTOC; DDI_DMA_NEXTSEG, DDI_DMA_FREE, and 5107 * DDI_DMA_NEXTWIN are useless since you can get to the cookie, so we 5108 * reflect that now too... 5109 * 5110 * Even though we fixed the pointer problem in DDI_DMA_SEGTOC, we are 5111 * not going to put this functionality into the 64-bit x86 kernel now. 5112 * It wasn't ported to the 64-bit kernel for s10, no reason to change 5113 * that in a future release. 5114 */ 5115 return (DDI_FAILURE); 5116 5117 #else /* 32-bit x86 kernel */ 5118 ddi_dma_cookie_t lcookie; 5119 ddi_dma_cookie_t *cookie; 5120 rootnex_window_t *window; 5121 ddi_dma_impl_t *hp; 5122 rootnex_dma_t *dma; 5123 uint_t nwin; 5124 uint_t ccnt; 5125 size_t len; 5126 off_t off; 5127 int e; 5128 5129 5130 /* 5131 * DDI_DMA_SEGTOC, DDI_DMA_NEXTSEG, and DDI_DMA_NEXTWIN are a little 5132 * hacky since were optimizing for the current interfaces and so we can 5133 * cleanup the mess in genunix. Hopefully we will remove the this 5134 * obsoleted routines someday soon. 5135 */ 5136 5137 switch (request) { 5138 5139 case DDI_DMA_SEGTOC: /* ddi_dma_segtocookie() */ 5140 hp = (ddi_dma_impl_t *)handle; 5141 cookie = (ddi_dma_cookie_t *)objpp; 5142 5143 /* 5144 * convert segment to cookie. We don't distinguish between the 5145 * two :-) 5146 */ 5147 *cookie = *hp->dmai_cookie; 5148 *lenp = cookie->dmac_size; 5149 *offp = cookie->dmac_type & ~ROOTNEX_USES_COPYBUF; 5150 return (DDI_SUCCESS); 5151 5152 case DDI_DMA_NEXTSEG: /* ddi_dma_nextseg() */ 5153 hp = (ddi_dma_impl_t *)handle; 5154 dma = (rootnex_dma_t *)hp->dmai_private; 5155 5156 if ((*lenp != NULL) && ((uintptr_t)*lenp != (uintptr_t)hp)) { 5157 return (DDI_DMA_STALE); 5158 } 5159 5160 /* handle the case where we don't have any windows */ 5161 if (dma->dp_window == NULL) { 5162 /* 5163 * if seg == NULL, and we don't have any windows, 5164 * return the first cookie in the sgl. 5165 */ 5166 if (*lenp == NULL) { 5167 dma->dp_current_cookie = 0; 5168 hp->dmai_cookie = dma->dp_cookies; 5169 *objpp = (caddr_t)handle; 5170 return (DDI_SUCCESS); 5171 5172 /* if we have more cookies, go to the next cookie */ 5173 } else { 5174 if ((dma->dp_current_cookie + 1) >= 5175 dma->dp_sglinfo.si_sgl_size) { 5176 return (DDI_DMA_DONE); 5177 } 5178 dma->dp_current_cookie++; 5179 hp->dmai_cookie++; 5180 return (DDI_SUCCESS); 5181 } 5182 } 5183 5184 /* We have one or more windows */ 5185 window = &dma->dp_window[dma->dp_current_win]; 5186 5187 /* 5188 * if seg == NULL, return the first cookie in the current 5189 * window 5190 */ 5191 if (*lenp == NULL) { 5192 dma->dp_current_cookie = 0; 5193 hp->dmai_cookie = window->wd_first_cookie; 5194 5195 /* 5196 * go to the next cookie in the window then see if we done with 5197 * this window. 5198 */ 5199 } else { 5200 if ((dma->dp_current_cookie + 1) >= 5201 window->wd_cookie_cnt) { 5202 return (DDI_DMA_DONE); 5203 } 5204 dma->dp_current_cookie++; 5205 hp->dmai_cookie++; 5206 } 5207 *objpp = (caddr_t)handle; 5208 return (DDI_SUCCESS); 5209 5210 case DDI_DMA_NEXTWIN: /* ddi_dma_nextwin() */ 5211 hp = (ddi_dma_impl_t *)handle; 5212 dma = (rootnex_dma_t *)hp->dmai_private; 5213 5214 if ((*offp != NULL) && ((uintptr_t)*offp != (uintptr_t)hp)) { 5215 return (DDI_DMA_STALE); 5216 } 5217 5218 /* if win == NULL, return the first window in the bind */ 5219 if (*offp == NULL) { 5220 nwin = 0; 5221 5222 /* 5223 * else, go to the next window then see if we're done with all 5224 * the windows. 5225 */ 5226 } else { 5227 nwin = dma->dp_current_win + 1; 5228 if (nwin >= hp->dmai_nwin) { 5229 return (DDI_DMA_DONE); 5230 } 5231 } 5232 5233 /* switch to the next window */ 5234 e = rootnex_dma_win(dip, rdip, handle, nwin, &off, &len, 5235 &lcookie, &ccnt); 5236 ASSERT(e == DDI_SUCCESS); 5237 if (e != DDI_SUCCESS) { 5238 return (DDI_DMA_STALE); 5239 } 5240 5241 /* reset the cookie back to the first cookie in the window */ 5242 if (dma->dp_window != NULL) { 5243 window = &dma->dp_window[dma->dp_current_win]; 5244 hp->dmai_cookie = window->wd_first_cookie; 5245 } else { 5246 hp->dmai_cookie = dma->dp_cookies; 5247 } 5248 5249 *objpp = (caddr_t)handle; 5250 return (DDI_SUCCESS); 5251 5252 case DDI_DMA_FREE: /* ddi_dma_free() */ 5253 (void) rootnex_dma_unbindhdl(dip, rdip, handle); 5254 (void) rootnex_dma_freehdl(dip, rdip, handle); 5255 if (rootnex_state->r_dvma_call_list_id) { 5256 ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 5257 } 5258 return (DDI_SUCCESS); 5259 5260 case DDI_DMA_IOPB_ALLOC: /* get contiguous DMA-able memory */ 5261 case DDI_DMA_SMEM_ALLOC: /* get contiguous DMA-able memory */ 5262 /* should never get here, handled in genunix */ 5263 ASSERT(0); 5264 return (DDI_FAILURE); 5265 5266 case DDI_DMA_KVADDR: 5267 case DDI_DMA_GETERR: 5268 case DDI_DMA_COFF: 5269 return (DDI_FAILURE); 5270 } 5271 5272 return (DDI_FAILURE); 5273 #endif /* defined(__amd64) */ 5274 } 5275 5276 /* 5277 * ********* 5278 * FMA Code 5279 * ********* 5280 */ 5281 5282 /* 5283 * rootnex_fm_init() 5284 * FMA init busop 5285 */ 5286 /* ARGSUSED */ 5287 static int 5288 rootnex_fm_init(dev_info_t *dip, dev_info_t *tdip, int tcap, 5289 ddi_iblock_cookie_t *ibc) 5290 { 5291 *ibc = rootnex_state->r_err_ibc; 5292 5293 return (ddi_system_fmcap); 5294 } 5295 5296 /* 5297 * rootnex_dma_check() 5298 * Function called after a dma fault occurred to find out whether the 5299 * fault address is associated with a driver that is able to handle faults 5300 * and recover from faults. 5301 */ 5302 /* ARGSUSED */ 5303 static int 5304 rootnex_dma_check(dev_info_t *dip, const void *handle, const void *addr, 5305 const void *not_used) 5306 { 5307 rootnex_window_t *window; 5308 uint64_t start_addr; 5309 uint64_t fault_addr; 5310 ddi_dma_impl_t *hp; 5311 rootnex_dma_t *dma; 5312 uint64_t end_addr; 5313 size_t csize; 5314 int i; 5315 int j; 5316 5317 5318 /* The driver has to set DDI_DMA_FLAGERR to recover from dma faults */ 5319 hp = (ddi_dma_impl_t *)handle; 5320 ASSERT(hp); 5321 5322 dma = (rootnex_dma_t *)hp->dmai_private; 5323 5324 /* Get the address that we need to search for */ 5325 fault_addr = *(uint64_t *)addr; 5326 5327 /* 5328 * if we don't have any windows, we can just walk through all the 5329 * cookies. 5330 */ 5331 if (dma->dp_window == NULL) { 5332 /* for each cookie */ 5333 for (i = 0; i < dma->dp_sglinfo.si_sgl_size; i++) { 5334 /* 5335 * if the faulted address is within the physical address 5336 * range of the cookie, return DDI_FM_NONFATAL. 5337 */ 5338 if ((fault_addr >= dma->dp_cookies[i].dmac_laddress) && 5339 (fault_addr <= (dma->dp_cookies[i].dmac_laddress + 5340 dma->dp_cookies[i].dmac_size))) { 5341 return (DDI_FM_NONFATAL); 5342 } 5343 } 5344 5345 /* fault_addr not within this DMA handle */ 5346 return (DDI_FM_UNKNOWN); 5347 } 5348 5349 /* we have mutiple windows, walk through each window */ 5350 for (i = 0; i < hp->dmai_nwin; i++) { 5351 window = &dma->dp_window[i]; 5352 5353 /* Go through all the cookies in the window */ 5354 for (j = 0; j < window->wd_cookie_cnt; j++) { 5355 5356 start_addr = window->wd_first_cookie[j].dmac_laddress; 5357 csize = window->wd_first_cookie[j].dmac_size; 5358 5359 /* 5360 * if we are trimming the first cookie in the window, 5361 * and this is the first cookie, adjust the start 5362 * address and size of the cookie to account for the 5363 * trim. 5364 */ 5365 if (window->wd_trim.tr_trim_first && (j == 0)) { 5366 start_addr = window->wd_trim.tr_first_paddr; 5367 csize = window->wd_trim.tr_first_size; 5368 } 5369 5370 /* 5371 * if we are trimming the last cookie in the window, 5372 * and this is the last cookie, adjust the start 5373 * address and size of the cookie to account for the 5374 * trim. 5375 */ 5376 if (window->wd_trim.tr_trim_last && 5377 (j == (window->wd_cookie_cnt - 1))) { 5378 start_addr = window->wd_trim.tr_last_paddr; 5379 csize = window->wd_trim.tr_last_size; 5380 } 5381 5382 end_addr = start_addr + csize; 5383 5384 /* 5385 * if the faulted address is within the physical 5386 * address of the cookie, return DDI_FM_NONFATAL. 5387 */ 5388 if ((fault_addr >= start_addr) && 5389 (fault_addr <= end_addr)) { 5390 return (DDI_FM_NONFATAL); 5391 } 5392 } 5393 } 5394 5395 /* fault_addr not within this DMA handle */ 5396 return (DDI_FM_UNKNOWN); 5397 } 5398 5399 /*ARGSUSED*/ 5400 static int 5401 rootnex_quiesce(dev_info_t *dip) 5402 { 5403 #if defined(__amd64) && !defined(__xpv) 5404 return (immu_quiesce()); 5405 #else 5406 return (DDI_SUCCESS); 5407 #endif 5408 } 5409 5410 #if defined(__xpv) 5411 void 5412 immu_init(void) 5413 { 5414 ; 5415 } 5416 5417 void 5418 immu_startup(void) 5419 { 5420 ; 5421 } 5422 /*ARGSUSED*/ 5423 void 5424 immu_physmem_update(uint64_t addr, uint64_t size) 5425 { 5426 ; 5427 } 5428 #endif 5429