xref: /illumos-gate/usr/src/uts/i86pc/io/rootnex.c (revision 6148443adeb5d3f493cee0d19110b32a0189bd41)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright (c) 1992, 2010, Oracle and/or its affiliates. All rights reserved.
23  */
24 
25 /*
26  * x86 root nexus driver
27  */
28 
29 #include <sys/sysmacros.h>
30 #include <sys/conf.h>
31 #include <sys/autoconf.h>
32 #include <sys/sysmacros.h>
33 #include <sys/debug.h>
34 #include <sys/psw.h>
35 #include <sys/ddidmareq.h>
36 #include <sys/promif.h>
37 #include <sys/devops.h>
38 #include <sys/kmem.h>
39 #include <sys/cmn_err.h>
40 #include <vm/seg.h>
41 #include <vm/seg_kmem.h>
42 #include <vm/seg_dev.h>
43 #include <sys/vmem.h>
44 #include <sys/mman.h>
45 #include <vm/hat.h>
46 #include <vm/as.h>
47 #include <vm/page.h>
48 #include <sys/avintr.h>
49 #include <sys/errno.h>
50 #include <sys/modctl.h>
51 #include <sys/ddi_impldefs.h>
52 #include <sys/sunddi.h>
53 #include <sys/sunndi.h>
54 #include <sys/mach_intr.h>
55 #include <sys/psm.h>
56 #include <sys/ontrap.h>
57 #include <sys/atomic.h>
58 #include <sys/sdt.h>
59 #include <sys/rootnex.h>
60 #include <vm/hat_i86.h>
61 #include <sys/ddifm.h>
62 #include <sys/ddi_isa.h>
63 #include <sys/apic.h>
64 
65 #ifdef __xpv
66 #include <sys/bootinfo.h>
67 #include <sys/hypervisor.h>
68 #include <sys/bootconf.h>
69 #include <vm/kboot_mmu.h>
70 #endif
71 
72 #if defined(__amd64) && !defined(__xpv)
73 #include <sys/immu.h>
74 #endif
75 
76 
77 /*
78  * enable/disable extra checking of function parameters. Useful for debugging
79  * drivers.
80  */
81 #ifdef	DEBUG
82 int rootnex_alloc_check_parms = 1;
83 int rootnex_bind_check_parms = 1;
84 int rootnex_bind_check_inuse = 1;
85 int rootnex_unbind_verify_buffer = 0;
86 int rootnex_sync_check_parms = 1;
87 #else
88 int rootnex_alloc_check_parms = 0;
89 int rootnex_bind_check_parms = 0;
90 int rootnex_bind_check_inuse = 0;
91 int rootnex_unbind_verify_buffer = 0;
92 int rootnex_sync_check_parms = 0;
93 #endif
94 
95 boolean_t rootnex_dmar_not_setup;
96 
97 /* Master Abort and Target Abort panic flag */
98 int rootnex_fm_ma_ta_panic_flag = 0;
99 
100 /* Semi-temporary patchables to phase in bug fixes, test drivers, etc. */
101 int rootnex_bind_fail = 1;
102 int rootnex_bind_warn = 1;
103 uint8_t *rootnex_warn_list;
104 /* bitmasks for rootnex_warn_list. Up to 8 different warnings with uint8_t */
105 #define	ROOTNEX_BIND_WARNING	(0x1 << 0)
106 
107 /*
108  * revert back to old broken behavior of always sync'ing entire copy buffer.
109  * This is useful if be have a buggy driver which doesn't correctly pass in
110  * the offset and size into ddi_dma_sync().
111  */
112 int rootnex_sync_ignore_params = 0;
113 
114 /*
115  * For the 64-bit kernel, pre-alloc enough cookies for a 256K buffer plus 1
116  * page for alignment. For the 32-bit kernel, pre-alloc enough cookies for a
117  * 64K buffer plus 1 page for alignment (we have less kernel space in a 32-bit
118  * kernel). Allocate enough windows to handle a 256K buffer w/ at least 65
119  * sgllen DMA engine, and enough copybuf buffer state pages to handle 2 pages
120  * (< 8K). We will still need to allocate the copy buffer during bind though
121  * (if we need one). These can only be modified in /etc/system before rootnex
122  * attach.
123  */
124 #if defined(__amd64)
125 int rootnex_prealloc_cookies = 65;
126 int rootnex_prealloc_windows = 4;
127 int rootnex_prealloc_copybuf = 2;
128 #else
129 int rootnex_prealloc_cookies = 33;
130 int rootnex_prealloc_windows = 4;
131 int rootnex_prealloc_copybuf = 2;
132 #endif
133 
134 /* driver global state */
135 static rootnex_state_t *rootnex_state;
136 
137 #ifdef DEBUG
138 /* shortcut to rootnex counters */
139 static uint64_t *rootnex_cnt;
140 #endif
141 
142 /*
143  * XXX - does x86 even need these or are they left over from the SPARC days?
144  */
145 /* statically defined integer/boolean properties for the root node */
146 static rootnex_intprop_t rootnex_intprp[] = {
147 	{ "PAGESIZE",			PAGESIZE },
148 	{ "MMU_PAGESIZE",		MMU_PAGESIZE },
149 	{ "MMU_PAGEOFFSET",		MMU_PAGEOFFSET },
150 	{ DDI_RELATIVE_ADDRESSING,	1 },
151 };
152 #define	NROOT_INTPROPS	(sizeof (rootnex_intprp) / sizeof (rootnex_intprop_t))
153 
154 #ifdef __xpv
155 typedef maddr_t rootnex_addr_t;
156 #define	ROOTNEX_PADDR_TO_RBASE(xinfo, pa)	\
157 	(DOMAIN_IS_INITDOMAIN(xinfo) ? pa_to_ma(pa) : (pa))
158 #else
159 typedef paddr_t rootnex_addr_t;
160 #endif
161 
162 #if !defined(__xpv)
163 char _depends_on[] = "misc/iommulib misc/acpica";
164 #endif
165 
166 static struct cb_ops rootnex_cb_ops = {
167 	nodev,		/* open */
168 	nodev,		/* close */
169 	nodev,		/* strategy */
170 	nodev,		/* print */
171 	nodev,		/* dump */
172 	nodev,		/* read */
173 	nodev,		/* write */
174 	nodev,		/* ioctl */
175 	nodev,		/* devmap */
176 	nodev,		/* mmap */
177 	nodev,		/* segmap */
178 	nochpoll,	/* chpoll */
179 	ddi_prop_op,	/* cb_prop_op */
180 	NULL,		/* struct streamtab */
181 	D_NEW | D_MP | D_HOTPLUG, /* compatibility flags */
182 	CB_REV,		/* Rev */
183 	nodev,		/* cb_aread */
184 	nodev		/* cb_awrite */
185 };
186 
187 static int rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp,
188     off_t offset, off_t len, caddr_t *vaddrp);
189 static int rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip,
190     struct hat *hat, struct seg *seg, caddr_t addr,
191     struct devpage *dp, pfn_t pfn, uint_t prot, uint_t lock);
192 static int rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip,
193     struct ddi_dma_req *dmareq, ddi_dma_handle_t *handlep);
194 static int rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip,
195     ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg,
196     ddi_dma_handle_t *handlep);
197 static int rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip,
198     ddi_dma_handle_t handle);
199 static int rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip,
200     ddi_dma_handle_t handle, struct ddi_dma_req *dmareq,
201     ddi_dma_cookie_t *cookiep, uint_t *ccountp);
202 static int rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip,
203     ddi_dma_handle_t handle);
204 static int rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip,
205     ddi_dma_handle_t handle, off_t off, size_t len, uint_t cache_flags);
206 static int rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip,
207     ddi_dma_handle_t handle, uint_t win, off_t *offp, size_t *lenp,
208     ddi_dma_cookie_t *cookiep, uint_t *ccountp);
209 static int rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip,
210     ddi_dma_handle_t handle, enum ddi_dma_ctlops request,
211     off_t *offp, size_t *lenp, caddr_t *objp, uint_t cache_flags);
212 static int rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip,
213     ddi_ctl_enum_t ctlop, void *arg, void *result);
214 static int rootnex_fm_init(dev_info_t *dip, dev_info_t *tdip, int tcap,
215     ddi_iblock_cookie_t *ibc);
216 static int rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip,
217     ddi_intr_op_t intr_op, ddi_intr_handle_impl_t *hdlp, void *result);
218 static int rootnex_alloc_intr_fixed(dev_info_t *, ddi_intr_handle_impl_t *,
219     void *);
220 static int rootnex_free_intr_fixed(dev_info_t *, ddi_intr_handle_impl_t *);
221 
222 static int rootnex_coredma_allochdl(dev_info_t *dip, dev_info_t *rdip,
223     ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg,
224     ddi_dma_handle_t *handlep);
225 static int rootnex_coredma_freehdl(dev_info_t *dip, dev_info_t *rdip,
226     ddi_dma_handle_t handle);
227 static int rootnex_coredma_bindhdl(dev_info_t *dip, dev_info_t *rdip,
228     ddi_dma_handle_t handle, struct ddi_dma_req *dmareq,
229     ddi_dma_cookie_t *cookiep, uint_t *ccountp);
230 static int rootnex_coredma_unbindhdl(dev_info_t *dip, dev_info_t *rdip,
231     ddi_dma_handle_t handle);
232 #if defined(__amd64) && !defined(__xpv)
233 static void rootnex_coredma_reset_cookies(dev_info_t *dip,
234     ddi_dma_handle_t handle);
235 static int rootnex_coredma_get_cookies(dev_info_t *dip, ddi_dma_handle_t handle,
236     ddi_dma_cookie_t **cookiepp, uint_t *ccountp);
237 static int rootnex_coredma_set_cookies(dev_info_t *dip, ddi_dma_handle_t handle,
238     ddi_dma_cookie_t *cookiep, uint_t ccount);
239 static int rootnex_coredma_clear_cookies(dev_info_t *dip,
240     ddi_dma_handle_t handle);
241 static int rootnex_coredma_get_sleep_flags(ddi_dma_handle_t handle);
242 #endif
243 static int rootnex_coredma_sync(dev_info_t *dip, dev_info_t *rdip,
244     ddi_dma_handle_t handle, off_t off, size_t len, uint_t cache_flags);
245 static int rootnex_coredma_win(dev_info_t *dip, dev_info_t *rdip,
246     ddi_dma_handle_t handle, uint_t win, off_t *offp, size_t *lenp,
247     ddi_dma_cookie_t *cookiep, uint_t *ccountp);
248 
249 static struct bus_ops rootnex_bus_ops = {
250 	BUSO_REV,
251 	rootnex_map,
252 	NULL,
253 	NULL,
254 	NULL,
255 	rootnex_map_fault,
256 	rootnex_dma_map,
257 	rootnex_dma_allochdl,
258 	rootnex_dma_freehdl,
259 	rootnex_dma_bindhdl,
260 	rootnex_dma_unbindhdl,
261 	rootnex_dma_sync,
262 	rootnex_dma_win,
263 	rootnex_dma_mctl,
264 	rootnex_ctlops,
265 	ddi_bus_prop_op,
266 	i_ddi_rootnex_get_eventcookie,
267 	i_ddi_rootnex_add_eventcall,
268 	i_ddi_rootnex_remove_eventcall,
269 	i_ddi_rootnex_post_event,
270 	0,			/* bus_intr_ctl */
271 	0,			/* bus_config */
272 	0,			/* bus_unconfig */
273 	rootnex_fm_init,	/* bus_fm_init */
274 	NULL,			/* bus_fm_fini */
275 	NULL,			/* bus_fm_access_enter */
276 	NULL,			/* bus_fm_access_exit */
277 	NULL,			/* bus_powr */
278 	rootnex_intr_ops	/* bus_intr_op */
279 };
280 
281 static int rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd);
282 static int rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd);
283 static int rootnex_quiesce(dev_info_t *dip);
284 
285 static struct dev_ops rootnex_ops = {
286 	DEVO_REV,
287 	0,
288 	ddi_no_info,
289 	nulldev,
290 	nulldev,
291 	rootnex_attach,
292 	rootnex_detach,
293 	nulldev,
294 	&rootnex_cb_ops,
295 	&rootnex_bus_ops,
296 	NULL,
297 	rootnex_quiesce,		/* quiesce */
298 };
299 
300 static struct modldrv rootnex_modldrv = {
301 	&mod_driverops,
302 	"i86pc root nexus",
303 	&rootnex_ops
304 };
305 
306 static struct modlinkage rootnex_modlinkage = {
307 	MODREV_1,
308 	(void *)&rootnex_modldrv,
309 	NULL
310 };
311 
312 #if defined(__amd64) && !defined(__xpv)
313 static iommulib_nexops_t iommulib_nexops = {
314 	IOMMU_NEXOPS_VERSION,
315 	"Rootnex IOMMU ops Vers 1.1",
316 	NULL,
317 	rootnex_coredma_allochdl,
318 	rootnex_coredma_freehdl,
319 	rootnex_coredma_bindhdl,
320 	rootnex_coredma_unbindhdl,
321 	rootnex_coredma_reset_cookies,
322 	rootnex_coredma_get_cookies,
323 	rootnex_coredma_set_cookies,
324 	rootnex_coredma_clear_cookies,
325 	rootnex_coredma_get_sleep_flags,
326 	rootnex_coredma_sync,
327 	rootnex_coredma_win,
328 	rootnex_dma_map,
329 	rootnex_dma_mctl
330 };
331 #endif
332 
333 /*
334  *  extern hacks
335  */
336 extern struct seg_ops segdev_ops;
337 extern int ignore_hardware_nodes;	/* force flag from ddi_impl.c */
338 #ifdef	DDI_MAP_DEBUG
339 extern int ddi_map_debug_flag;
340 #define	ddi_map_debug	if (ddi_map_debug_flag) prom_printf
341 #endif
342 extern void i86_pp_map(page_t *pp, caddr_t kaddr);
343 extern void i86_va_map(caddr_t vaddr, struct as *asp, caddr_t kaddr);
344 extern int (*psm_intr_ops)(dev_info_t *, ddi_intr_handle_impl_t *,
345     psm_intr_op_t, int *);
346 extern int impl_ddi_sunbus_initchild(dev_info_t *dip);
347 extern void impl_ddi_sunbus_removechild(dev_info_t *dip);
348 
349 /*
350  * Use device arena to use for device control register mappings.
351  * Various kernel memory walkers (debugger, dtrace) need to know
352  * to avoid this address range to prevent undesired device activity.
353  */
354 extern void *device_arena_alloc(size_t size, int vm_flag);
355 extern void device_arena_free(void * vaddr, size_t size);
356 
357 
358 /*
359  *  Internal functions
360  */
361 static int rootnex_dma_init();
362 static void rootnex_add_props(dev_info_t *);
363 static int rootnex_ctl_reportdev(dev_info_t *dip);
364 static struct intrspec *rootnex_get_ispec(dev_info_t *rdip, int inum);
365 static int rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp);
366 static int rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp);
367 static int rootnex_map_handle(ddi_map_req_t *mp);
368 static void rootnex_clean_dmahdl(ddi_dma_impl_t *hp);
369 static int rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegsize);
370 static int rootnex_valid_bind_parms(ddi_dma_req_t *dmareq,
371     ddi_dma_attr_t *attr);
372 static void rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl,
373     rootnex_sglinfo_t *sglinfo);
374 static int rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq,
375     rootnex_dma_t *dma, ddi_dma_attr_t *attr, int kmflag);
376 static int rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq,
377     rootnex_dma_t *dma, ddi_dma_attr_t *attr);
378 static void rootnex_teardown_copybuf(rootnex_dma_t *dma);
379 static int rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma,
380     ddi_dma_attr_t *attr, int kmflag);
381 static void rootnex_teardown_windows(rootnex_dma_t *dma);
382 static void rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma,
383     rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset);
384 static void rootnex_setup_cookie(ddi_dma_obj_t *dmar_object,
385     rootnex_dma_t *dma, ddi_dma_cookie_t *cookie, off_t cur_offset,
386     size_t *copybuf_used, page_t **cur_pp);
387 static int rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp,
388     rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie,
389     ddi_dma_attr_t *attr, off_t cur_offset);
390 static int rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp,
391     rootnex_dma_t *dma, rootnex_window_t **windowp,
392     ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used);
393 static int rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp,
394     rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie);
395 static int rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win,
396     off_t offset, size_t size, uint_t cache_flags);
397 static int rootnex_verify_buffer(rootnex_dma_t *dma);
398 static int rootnex_dma_check(dev_info_t *dip, const void *handle,
399     const void *comp_addr, const void *not_used);
400 static boolean_t rootnex_need_bounce_seg(ddi_dma_obj_t *dmar_object,
401     rootnex_sglinfo_t *sglinfo);
402 
403 /*
404  * _init()
405  *
406  */
407 int
408 _init(void)
409 {
410 
411 	rootnex_state = NULL;
412 	return (mod_install(&rootnex_modlinkage));
413 }
414 
415 
416 /*
417  * _info()
418  *
419  */
420 int
421 _info(struct modinfo *modinfop)
422 {
423 	return (mod_info(&rootnex_modlinkage, modinfop));
424 }
425 
426 
427 /*
428  * _fini()
429  *
430  */
431 int
432 _fini(void)
433 {
434 	return (EBUSY);
435 }
436 
437 
438 /*
439  * rootnex_attach()
440  *
441  */
442 static int
443 rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
444 {
445 	int fmcap;
446 	int e;
447 
448 	switch (cmd) {
449 	case DDI_ATTACH:
450 		break;
451 	case DDI_RESUME:
452 #if defined(__amd64) && !defined(__xpv)
453 		return (immu_unquiesce());
454 #else
455 		return (DDI_SUCCESS);
456 #endif
457 	default:
458 		return (DDI_FAILURE);
459 	}
460 
461 	/*
462 	 * We should only have one instance of rootnex. Save it away since we
463 	 * don't have an easy way to get it back later.
464 	 */
465 	ASSERT(rootnex_state == NULL);
466 	rootnex_state = kmem_zalloc(sizeof (rootnex_state_t), KM_SLEEP);
467 
468 	rootnex_state->r_dip = dip;
469 	rootnex_state->r_err_ibc = (ddi_iblock_cookie_t)ipltospl(15);
470 	rootnex_state->r_reserved_msg_printed = B_FALSE;
471 #ifdef DEBUG
472 	rootnex_cnt = &rootnex_state->r_counters[0];
473 #endif
474 
475 	/*
476 	 * Set minimum fm capability level for i86pc platforms and then
477 	 * initialize error handling. Since we're the rootnex, we don't
478 	 * care what's returned in the fmcap field.
479 	 */
480 	ddi_system_fmcap = DDI_FM_EREPORT_CAPABLE | DDI_FM_ERRCB_CAPABLE |
481 	    DDI_FM_ACCCHK_CAPABLE | DDI_FM_DMACHK_CAPABLE;
482 	fmcap = ddi_system_fmcap;
483 	ddi_fm_init(dip, &fmcap, &rootnex_state->r_err_ibc);
484 
485 	/* initialize DMA related state */
486 	e = rootnex_dma_init();
487 	if (e != DDI_SUCCESS) {
488 		kmem_free(rootnex_state, sizeof (rootnex_state_t));
489 		return (DDI_FAILURE);
490 	}
491 
492 	/* Add static root node properties */
493 	rootnex_add_props(dip);
494 
495 	/* since we can't call ddi_report_dev() */
496 	cmn_err(CE_CONT, "?root nexus = %s\n", ddi_get_name(dip));
497 
498 	/* Initialize rootnex event handle */
499 	i_ddi_rootnex_init_events(dip);
500 
501 #if defined(__amd64) && !defined(__xpv)
502 	e = iommulib_nexus_register(dip, &iommulib_nexops,
503 	    &rootnex_state->r_iommulib_handle);
504 
505 	ASSERT(e == DDI_SUCCESS);
506 #endif
507 
508 	return (DDI_SUCCESS);
509 }
510 
511 
512 /*
513  * rootnex_detach()
514  *
515  */
516 /*ARGSUSED*/
517 static int
518 rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd)
519 {
520 	switch (cmd) {
521 	case DDI_SUSPEND:
522 #if defined(__amd64) && !defined(__xpv)
523 		return (immu_quiesce());
524 #else
525 		return (DDI_SUCCESS);
526 #endif
527 	default:
528 		return (DDI_FAILURE);
529 	}
530 	/*NOTREACHED*/
531 
532 }
533 
534 
535 /*
536  * rootnex_dma_init()
537  *
538  */
539 /*ARGSUSED*/
540 static int
541 rootnex_dma_init()
542 {
543 	size_t bufsize;
544 
545 
546 	/*
547 	 * size of our cookie/window/copybuf state needed in dma bind that we
548 	 * pre-alloc in dma_alloc_handle
549 	 */
550 	rootnex_state->r_prealloc_cookies = rootnex_prealloc_cookies;
551 	rootnex_state->r_prealloc_size =
552 	    (rootnex_state->r_prealloc_cookies * sizeof (ddi_dma_cookie_t)) +
553 	    (rootnex_prealloc_windows * sizeof (rootnex_window_t)) +
554 	    (rootnex_prealloc_copybuf * sizeof (rootnex_pgmap_t));
555 
556 	/*
557 	 * setup DDI DMA handle kmem cache, align each handle on 64 bytes,
558 	 * allocate 16 extra bytes for struct pointer alignment
559 	 * (p->dmai_private & dma->dp_prealloc_buffer)
560 	 */
561 	bufsize = sizeof (ddi_dma_impl_t) + sizeof (rootnex_dma_t) +
562 	    rootnex_state->r_prealloc_size + 0x10;
563 	rootnex_state->r_dmahdl_cache = kmem_cache_create("rootnex_dmahdl",
564 	    bufsize, 64, NULL, NULL, NULL, NULL, NULL, 0);
565 	if (rootnex_state->r_dmahdl_cache == NULL) {
566 		return (DDI_FAILURE);
567 	}
568 
569 	/*
570 	 * allocate array to track which major numbers we have printed warnings
571 	 * for.
572 	 */
573 	rootnex_warn_list = kmem_zalloc(devcnt * sizeof (*rootnex_warn_list),
574 	    KM_SLEEP);
575 
576 	return (DDI_SUCCESS);
577 }
578 
579 
580 /*
581  * rootnex_add_props()
582  *
583  */
584 static void
585 rootnex_add_props(dev_info_t *dip)
586 {
587 	rootnex_intprop_t *rpp;
588 	int i;
589 
590 	/* Add static integer/boolean properties to the root node */
591 	rpp = rootnex_intprp;
592 	for (i = 0; i < NROOT_INTPROPS; i++) {
593 		(void) e_ddi_prop_update_int(DDI_DEV_T_NONE, dip,
594 		    rpp[i].prop_name, rpp[i].prop_value);
595 	}
596 }
597 
598 
599 
600 /*
601  * *************************
602  *  ctlops related routines
603  * *************************
604  */
605 
606 /*
607  * rootnex_ctlops()
608  *
609  */
610 /*ARGSUSED*/
611 static int
612 rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip, ddi_ctl_enum_t ctlop,
613     void *arg, void *result)
614 {
615 	int n, *ptr;
616 	struct ddi_parent_private_data *pdp;
617 
618 	switch (ctlop) {
619 	case DDI_CTLOPS_DMAPMAPC:
620 		/*
621 		 * Return 'partial' to indicate that dma mapping
622 		 * has to be done in the main MMU.
623 		 */
624 		return (DDI_DMA_PARTIAL);
625 
626 	case DDI_CTLOPS_BTOP:
627 		/*
628 		 * Convert byte count input to physical page units.
629 		 * (byte counts that are not a page-size multiple
630 		 * are rounded down)
631 		 */
632 		*(ulong_t *)result = btop(*(ulong_t *)arg);
633 		return (DDI_SUCCESS);
634 
635 	case DDI_CTLOPS_PTOB:
636 		/*
637 		 * Convert size in physical pages to bytes
638 		 */
639 		*(ulong_t *)result = ptob(*(ulong_t *)arg);
640 		return (DDI_SUCCESS);
641 
642 	case DDI_CTLOPS_BTOPR:
643 		/*
644 		 * Convert byte count input to physical page units
645 		 * (byte counts that are not a page-size multiple
646 		 * are rounded up)
647 		 */
648 		*(ulong_t *)result = btopr(*(ulong_t *)arg);
649 		return (DDI_SUCCESS);
650 
651 	case DDI_CTLOPS_INITCHILD:
652 		return (impl_ddi_sunbus_initchild(arg));
653 
654 	case DDI_CTLOPS_UNINITCHILD:
655 		impl_ddi_sunbus_removechild(arg);
656 		return (DDI_SUCCESS);
657 
658 	case DDI_CTLOPS_REPORTDEV:
659 		return (rootnex_ctl_reportdev(rdip));
660 
661 	case DDI_CTLOPS_IOMIN:
662 		/*
663 		 * Nothing to do here but reflect back..
664 		 */
665 		return (DDI_SUCCESS);
666 
667 	case DDI_CTLOPS_REGSIZE:
668 	case DDI_CTLOPS_NREGS:
669 		break;
670 
671 	case DDI_CTLOPS_SIDDEV:
672 		if (ndi_dev_is_prom_node(rdip))
673 			return (DDI_SUCCESS);
674 		if (ndi_dev_is_persistent_node(rdip))
675 			return (DDI_SUCCESS);
676 		return (DDI_FAILURE);
677 
678 	case DDI_CTLOPS_POWER:
679 		return ((*pm_platform_power)((power_req_t *)arg));
680 
681 	case DDI_CTLOPS_RESERVED0: /* Was DDI_CTLOPS_NINTRS, obsolete */
682 	case DDI_CTLOPS_RESERVED1: /* Was DDI_CTLOPS_POKE_INIT, obsolete */
683 	case DDI_CTLOPS_RESERVED2: /* Was DDI_CTLOPS_POKE_FLUSH, obsolete */
684 	case DDI_CTLOPS_RESERVED3: /* Was DDI_CTLOPS_POKE_FINI, obsolete */
685 	case DDI_CTLOPS_RESERVED4: /* Was DDI_CTLOPS_INTR_HILEVEL, obsolete */
686 	case DDI_CTLOPS_RESERVED5: /* Was DDI_CTLOPS_XLATE_INTRS, obsolete */
687 		if (!rootnex_state->r_reserved_msg_printed) {
688 			rootnex_state->r_reserved_msg_printed = B_TRUE;
689 			cmn_err(CE_WARN, "Failing ddi_ctlops call(s) for "
690 			    "1 or more reserved/obsolete operations.");
691 		}
692 		return (DDI_FAILURE);
693 
694 	default:
695 		return (DDI_FAILURE);
696 	}
697 	/*
698 	 * The rest are for "hardware" properties
699 	 */
700 	if ((pdp = ddi_get_parent_data(rdip)) == NULL)
701 		return (DDI_FAILURE);
702 
703 	if (ctlop == DDI_CTLOPS_NREGS) {
704 		ptr = (int *)result;
705 		*ptr = pdp->par_nreg;
706 	} else {
707 		off_t *size = (off_t *)result;
708 
709 		ptr = (int *)arg;
710 		n = *ptr;
711 		if (n >= pdp->par_nreg) {
712 			return (DDI_FAILURE);
713 		}
714 		*size = (off_t)pdp->par_reg[n].regspec_size;
715 	}
716 	return (DDI_SUCCESS);
717 }
718 
719 
720 /*
721  * rootnex_ctl_reportdev()
722  *
723  */
724 static int
725 rootnex_ctl_reportdev(dev_info_t *dev)
726 {
727 	int i, n, len, f_len = 0;
728 	char *buf;
729 
730 	buf = kmem_alloc(REPORTDEV_BUFSIZE, KM_SLEEP);
731 	f_len += snprintf(buf, REPORTDEV_BUFSIZE,
732 	    "%s%d at root", ddi_driver_name(dev), ddi_get_instance(dev));
733 	len = strlen(buf);
734 
735 	for (i = 0; i < sparc_pd_getnreg(dev); i++) {
736 
737 		struct regspec *rp = sparc_pd_getreg(dev, i);
738 
739 		if (i == 0)
740 			f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len,
741 			    ": ");
742 		else
743 			f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len,
744 			    " and ");
745 		len = strlen(buf);
746 
747 		switch (rp->regspec_bustype) {
748 
749 		case BTEISA:
750 			f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len,
751 			    "%s 0x%x", DEVI_EISA_NEXNAME, rp->regspec_addr);
752 			break;
753 
754 		case BTISA:
755 			f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len,
756 			    "%s 0x%x", DEVI_ISA_NEXNAME, rp->regspec_addr);
757 			break;
758 
759 		default:
760 			f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len,
761 			    "space %x offset %x",
762 			    rp->regspec_bustype, rp->regspec_addr);
763 			break;
764 		}
765 		len = strlen(buf);
766 	}
767 	for (i = 0, n = sparc_pd_getnintr(dev); i < n; i++) {
768 		int pri;
769 
770 		if (i != 0) {
771 			f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len,
772 			    ",");
773 			len = strlen(buf);
774 		}
775 		pri = INT_IPL(sparc_pd_getintr(dev, i)->intrspec_pri);
776 		f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len,
777 		    " sparc ipl %d", pri);
778 		len = strlen(buf);
779 	}
780 #ifdef DEBUG
781 	if (f_len + 1 >= REPORTDEV_BUFSIZE) {
782 		cmn_err(CE_NOTE, "next message is truncated: "
783 		    "printed length 1024, real length %d", f_len);
784 	}
785 #endif /* DEBUG */
786 	cmn_err(CE_CONT, "?%s\n", buf);
787 	kmem_free(buf, REPORTDEV_BUFSIZE);
788 	return (DDI_SUCCESS);
789 }
790 
791 
792 /*
793  * ******************
794  *  map related code
795  * ******************
796  */
797 
798 /*
799  * rootnex_map()
800  *
801  */
802 static int
803 rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, off_t offset,
804     off_t len, caddr_t *vaddrp)
805 {
806 	struct regspec *rp, tmp_reg;
807 	ddi_map_req_t mr = *mp;		/* Get private copy of request */
808 	int error;
809 
810 	mp = &mr;
811 
812 	switch (mp->map_op)  {
813 	case DDI_MO_MAP_LOCKED:
814 	case DDI_MO_UNMAP:
815 	case DDI_MO_MAP_HANDLE:
816 		break;
817 	default:
818 #ifdef	DDI_MAP_DEBUG
819 		cmn_err(CE_WARN, "rootnex_map: unimplemented map op %d.",
820 		    mp->map_op);
821 #endif	/* DDI_MAP_DEBUG */
822 		return (DDI_ME_UNIMPLEMENTED);
823 	}
824 
825 	if (mp->map_flags & DDI_MF_USER_MAPPING)  {
826 #ifdef	DDI_MAP_DEBUG
827 		cmn_err(CE_WARN, "rootnex_map: unimplemented map type: user.");
828 #endif	/* DDI_MAP_DEBUG */
829 		return (DDI_ME_UNIMPLEMENTED);
830 	}
831 
832 	/*
833 	 * First, if given an rnumber, convert it to a regspec...
834 	 * (Presumably, this is on behalf of a child of the root node?)
835 	 */
836 
837 	if (mp->map_type == DDI_MT_RNUMBER)  {
838 
839 		int rnumber = mp->map_obj.rnumber;
840 #ifdef	DDI_MAP_DEBUG
841 		static char *out_of_range =
842 		    "rootnex_map: Out of range rnumber <%d>, device <%s>";
843 #endif	/* DDI_MAP_DEBUG */
844 
845 		rp = i_ddi_rnumber_to_regspec(rdip, rnumber);
846 		if (rp == NULL)  {
847 #ifdef	DDI_MAP_DEBUG
848 			cmn_err(CE_WARN, out_of_range, rnumber,
849 			    ddi_get_name(rdip));
850 #endif	/* DDI_MAP_DEBUG */
851 			return (DDI_ME_RNUMBER_RANGE);
852 		}
853 
854 		/*
855 		 * Convert the given ddi_map_req_t from rnumber to regspec...
856 		 */
857 
858 		mp->map_type = DDI_MT_REGSPEC;
859 		mp->map_obj.rp = rp;
860 	}
861 
862 	/*
863 	 * Adjust offset and length correspnding to called values...
864 	 * XXX: A non-zero length means override the one in the regspec
865 	 * XXX: (regardless of what's in the parent's range?)
866 	 */
867 
868 	tmp_reg = *(mp->map_obj.rp);		/* Preserve underlying data */
869 	rp = mp->map_obj.rp = &tmp_reg;		/* Use tmp_reg in request */
870 
871 #ifdef	DDI_MAP_DEBUG
872 	cmn_err(CE_CONT, "rootnex: <%s,%s> <0x%x, 0x%x, 0x%d> offset %d len %d "
873 	    "handle 0x%x\n", ddi_get_name(dip), ddi_get_name(rdip),
874 	    rp->regspec_bustype, rp->regspec_addr, rp->regspec_size, offset,
875 	    len, mp->map_handlep);
876 #endif	/* DDI_MAP_DEBUG */
877 
878 	/*
879 	 * I/O or memory mapping:
880 	 *
881 	 *	<bustype=0, addr=x, len=x>: memory
882 	 *	<bustype=1, addr=x, len=x>: i/o
883 	 *	<bustype>1, addr=0, len=x>: x86-compatibility i/o
884 	 */
885 
886 	if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) {
887 		cmn_err(CE_WARN, "<%s,%s> invalid register spec"
888 		    " <0x%x, 0x%x, 0x%x>", ddi_get_name(dip),
889 		    ddi_get_name(rdip), rp->regspec_bustype,
890 		    rp->regspec_addr, rp->regspec_size);
891 		return (DDI_ME_INVAL);
892 	}
893 
894 	if (rp->regspec_bustype > 1 && rp->regspec_addr == 0) {
895 		/*
896 		 * compatibility i/o mapping
897 		 */
898 		rp->regspec_bustype += (uint_t)offset;
899 	} else {
900 		/*
901 		 * Normal memory or i/o mapping
902 		 */
903 		rp->regspec_addr += (uint_t)offset;
904 	}
905 
906 	if (len != 0)
907 		rp->regspec_size = (uint_t)len;
908 
909 #ifdef	DDI_MAP_DEBUG
910 	cmn_err(CE_CONT, "             <%s,%s> <0x%x, 0x%x, 0x%d> offset %d "
911 	    "len %d handle 0x%x\n", ddi_get_name(dip), ddi_get_name(rdip),
912 	    rp->regspec_bustype, rp->regspec_addr, rp->regspec_size,
913 	    offset, len, mp->map_handlep);
914 #endif	/* DDI_MAP_DEBUG */
915 
916 	/*
917 	 * Apply any parent ranges at this level, if applicable.
918 	 * (This is where nexus specific regspec translation takes place.
919 	 * Use of this function is implicit agreement that translation is
920 	 * provided via ddi_apply_range.)
921 	 */
922 
923 #ifdef	DDI_MAP_DEBUG
924 	ddi_map_debug("applying range of parent <%s> to child <%s>...\n",
925 	    ddi_get_name(dip), ddi_get_name(rdip));
926 #endif	/* DDI_MAP_DEBUG */
927 
928 	if ((error = i_ddi_apply_range(dip, rdip, mp->map_obj.rp)) != 0)
929 		return (error);
930 
931 	switch (mp->map_op)  {
932 	case DDI_MO_MAP_LOCKED:
933 
934 		/*
935 		 * Set up the locked down kernel mapping to the regspec...
936 		 */
937 
938 		return (rootnex_map_regspec(mp, vaddrp));
939 
940 	case DDI_MO_UNMAP:
941 
942 		/*
943 		 * Release mapping...
944 		 */
945 
946 		return (rootnex_unmap_regspec(mp, vaddrp));
947 
948 	case DDI_MO_MAP_HANDLE:
949 
950 		return (rootnex_map_handle(mp));
951 
952 	default:
953 		return (DDI_ME_UNIMPLEMENTED);
954 	}
955 }
956 
957 
958 /*
959  * rootnex_map_fault()
960  *
961  *	fault in mappings for requestors
962  */
963 /*ARGSUSED*/
964 static int
965 rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip, struct hat *hat,
966     struct seg *seg, caddr_t addr, struct devpage *dp, pfn_t pfn, uint_t prot,
967     uint_t lock)
968 {
969 
970 #ifdef	DDI_MAP_DEBUG
971 	ddi_map_debug("rootnex_map_fault: address <%x> pfn <%x>", addr, pfn);
972 	ddi_map_debug(" Seg <%s>\n",
973 	    seg->s_ops == &segdev_ops ? "segdev" :
974 	    seg == &kvseg ? "segkmem" : "NONE!");
975 #endif	/* DDI_MAP_DEBUG */
976 
977 	/*
978 	 * This is all terribly broken, but it is a start
979 	 *
980 	 * XXX	Note that this test means that segdev_ops
981 	 *	must be exported from seg_dev.c.
982 	 * XXX	What about devices with their own segment drivers?
983 	 */
984 	if (seg->s_ops == &segdev_ops) {
985 		struct segdev_data *sdp = (struct segdev_data *)seg->s_data;
986 
987 		if (hat == NULL) {
988 			/*
989 			 * This is one plausible interpretation of
990 			 * a null hat i.e. use the first hat on the
991 			 * address space hat list which by convention is
992 			 * the hat of the system MMU.  At alternative
993 			 * would be to panic .. this might well be better ..
994 			 */
995 			ASSERT(AS_READ_HELD(seg->s_as, &seg->s_as->a_lock));
996 			hat = seg->s_as->a_hat;
997 			cmn_err(CE_NOTE, "rootnex_map_fault: nil hat");
998 		}
999 		hat_devload(hat, addr, MMU_PAGESIZE, pfn, prot | sdp->hat_attr,
1000 		    (lock ? HAT_LOAD_LOCK : HAT_LOAD));
1001 	} else if (seg == &kvseg && dp == NULL) {
1002 		hat_devload(kas.a_hat, addr, MMU_PAGESIZE, pfn, prot,
1003 		    HAT_LOAD_LOCK);
1004 	} else
1005 		return (DDI_FAILURE);
1006 	return (DDI_SUCCESS);
1007 }
1008 
1009 
1010 /*
1011  * rootnex_map_regspec()
1012  *     we don't support mapping of I/O cards above 4Gb
1013  */
1014 static int
1015 rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp)
1016 {
1017 	rootnex_addr_t rbase;
1018 	void *cvaddr;
1019 	uint_t npages, pgoffset;
1020 	struct regspec *rp;
1021 	ddi_acc_hdl_t *hp;
1022 	ddi_acc_impl_t *ap;
1023 	uint_t	hat_acc_flags;
1024 	paddr_t pbase;
1025 
1026 	rp = mp->map_obj.rp;
1027 	hp = mp->map_handlep;
1028 
1029 #ifdef	DDI_MAP_DEBUG
1030 	ddi_map_debug(
1031 	    "rootnex_map_regspec: <0x%x 0x%x 0x%x> handle 0x%x\n",
1032 	    rp->regspec_bustype, rp->regspec_addr,
1033 	    rp->regspec_size, mp->map_handlep);
1034 #endif	/* DDI_MAP_DEBUG */
1035 
1036 	/*
1037 	 * I/O or memory mapping
1038 	 *
1039 	 *	<bustype=0, addr=x, len=x>: memory
1040 	 *	<bustype=1, addr=x, len=x>: i/o
1041 	 *	<bustype>1, addr=0, len=x>: x86-compatibility i/o
1042 	 */
1043 
1044 	if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) {
1045 		cmn_err(CE_WARN, "rootnex: invalid register spec"
1046 		    " <0x%x, 0x%x, 0x%x>", rp->regspec_bustype,
1047 		    rp->regspec_addr, rp->regspec_size);
1048 		return (DDI_FAILURE);
1049 	}
1050 
1051 	if (rp->regspec_bustype != 0) {
1052 		/*
1053 		 * I/O space - needs a handle.
1054 		 */
1055 		if (hp == NULL) {
1056 			return (DDI_FAILURE);
1057 		}
1058 		ap = (ddi_acc_impl_t *)hp->ah_platform_private;
1059 		ap->ahi_acc_attr |= DDI_ACCATTR_IO_SPACE;
1060 		impl_acc_hdl_init(hp);
1061 
1062 		if (mp->map_flags & DDI_MF_DEVICE_MAPPING) {
1063 #ifdef  DDI_MAP_DEBUG
1064 			ddi_map_debug("rootnex_map_regspec: mmap() "
1065 			    "to I/O space is not supported.\n");
1066 #endif  /* DDI_MAP_DEBUG */
1067 			return (DDI_ME_INVAL);
1068 		} else {
1069 			/*
1070 			 * 1275-compliant vs. compatibility i/o mapping
1071 			 */
1072 			*vaddrp =
1073 			    (rp->regspec_bustype > 1 && rp->regspec_addr == 0) ?
1074 			    ((caddr_t)(uintptr_t)rp->regspec_bustype) :
1075 			    ((caddr_t)(uintptr_t)rp->regspec_addr);
1076 #ifdef __xpv
1077 			if (DOMAIN_IS_INITDOMAIN(xen_info)) {
1078 				hp->ah_pfn = xen_assign_pfn(
1079 				    mmu_btop((ulong_t)rp->regspec_addr &
1080 				    MMU_PAGEMASK));
1081 			} else {
1082 				hp->ah_pfn = mmu_btop(
1083 				    (ulong_t)rp->regspec_addr & MMU_PAGEMASK);
1084 			}
1085 #else
1086 			hp->ah_pfn = mmu_btop((ulong_t)rp->regspec_addr &
1087 			    MMU_PAGEMASK);
1088 #endif
1089 			hp->ah_pnum = mmu_btopr(rp->regspec_size +
1090 			    (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET);
1091 		}
1092 
1093 #ifdef	DDI_MAP_DEBUG
1094 		ddi_map_debug(
1095 	    "rootnex_map_regspec: \"Mapping\" %d bytes I/O space at 0x%x\n",
1096 		    rp->regspec_size, *vaddrp);
1097 #endif	/* DDI_MAP_DEBUG */
1098 		return (DDI_SUCCESS);
1099 	}
1100 
1101 	/*
1102 	 * Memory space
1103 	 */
1104 
1105 	if (hp != NULL) {
1106 		/*
1107 		 * hat layer ignores
1108 		 * hp->ah_acc.devacc_attr_endian_flags.
1109 		 */
1110 		switch (hp->ah_acc.devacc_attr_dataorder) {
1111 		case DDI_STRICTORDER_ACC:
1112 			hat_acc_flags = HAT_STRICTORDER;
1113 			break;
1114 		case DDI_UNORDERED_OK_ACC:
1115 			hat_acc_flags = HAT_UNORDERED_OK;
1116 			break;
1117 		case DDI_MERGING_OK_ACC:
1118 			hat_acc_flags = HAT_MERGING_OK;
1119 			break;
1120 		case DDI_LOADCACHING_OK_ACC:
1121 			hat_acc_flags = HAT_LOADCACHING_OK;
1122 			break;
1123 		case DDI_STORECACHING_OK_ACC:
1124 			hat_acc_flags = HAT_STORECACHING_OK;
1125 			break;
1126 		}
1127 		ap = (ddi_acc_impl_t *)hp->ah_platform_private;
1128 		ap->ahi_acc_attr |= DDI_ACCATTR_CPU_VADDR;
1129 		impl_acc_hdl_init(hp);
1130 		hp->ah_hat_flags = hat_acc_flags;
1131 	} else {
1132 		hat_acc_flags = HAT_STRICTORDER;
1133 	}
1134 
1135 	rbase = (rootnex_addr_t)(rp->regspec_addr & MMU_PAGEMASK);
1136 #ifdef __xpv
1137 	/*
1138 	 * If we're dom0, we're using a real device so we need to translate
1139 	 * the MA to a PA.
1140 	 */
1141 	if (DOMAIN_IS_INITDOMAIN(xen_info)) {
1142 		pbase = pfn_to_pa(xen_assign_pfn(mmu_btop(rbase)));
1143 	} else {
1144 		pbase = rbase;
1145 	}
1146 #else
1147 	pbase = rbase;
1148 #endif
1149 	pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET;
1150 
1151 	if (rp->regspec_size == 0) {
1152 #ifdef  DDI_MAP_DEBUG
1153 		ddi_map_debug("rootnex_map_regspec: zero regspec_size\n");
1154 #endif  /* DDI_MAP_DEBUG */
1155 		return (DDI_ME_INVAL);
1156 	}
1157 
1158 	if (mp->map_flags & DDI_MF_DEVICE_MAPPING) {
1159 		/* extra cast to make gcc happy */
1160 		*vaddrp = (caddr_t)((uintptr_t)mmu_btop(pbase));
1161 	} else {
1162 		npages = mmu_btopr(rp->regspec_size + pgoffset);
1163 
1164 #ifdef	DDI_MAP_DEBUG
1165 		ddi_map_debug("rootnex_map_regspec: Mapping %d pages "
1166 		    "physical %llx", npages, pbase);
1167 #endif	/* DDI_MAP_DEBUG */
1168 
1169 		cvaddr = device_arena_alloc(ptob(npages), VM_NOSLEEP);
1170 		if (cvaddr == NULL)
1171 			return (DDI_ME_NORESOURCES);
1172 
1173 		/*
1174 		 * Now map in the pages we've allocated...
1175 		 */
1176 		hat_devload(kas.a_hat, cvaddr, mmu_ptob(npages),
1177 		    mmu_btop(pbase), mp->map_prot | hat_acc_flags,
1178 		    HAT_LOAD_LOCK);
1179 		*vaddrp = (caddr_t)cvaddr + pgoffset;
1180 
1181 		/* save away pfn and npages for FMA */
1182 		hp = mp->map_handlep;
1183 		if (hp) {
1184 			hp->ah_pfn = mmu_btop(pbase);
1185 			hp->ah_pnum = npages;
1186 		}
1187 	}
1188 
1189 #ifdef	DDI_MAP_DEBUG
1190 	ddi_map_debug("at virtual 0x%x\n", *vaddrp);
1191 #endif	/* DDI_MAP_DEBUG */
1192 	return (DDI_SUCCESS);
1193 }
1194 
1195 
1196 /*
1197  * rootnex_unmap_regspec()
1198  *
1199  */
1200 static int
1201 rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp)
1202 {
1203 	caddr_t addr = (caddr_t)*vaddrp;
1204 	uint_t npages, pgoffset;
1205 	struct regspec *rp;
1206 
1207 	if (mp->map_flags & DDI_MF_DEVICE_MAPPING)
1208 		return (0);
1209 
1210 	rp = mp->map_obj.rp;
1211 
1212 	if (rp->regspec_size == 0) {
1213 #ifdef  DDI_MAP_DEBUG
1214 		ddi_map_debug("rootnex_unmap_regspec: zero regspec_size\n");
1215 #endif  /* DDI_MAP_DEBUG */
1216 		return (DDI_ME_INVAL);
1217 	}
1218 
1219 	/*
1220 	 * I/O or memory mapping:
1221 	 *
1222 	 *	<bustype=0, addr=x, len=x>: memory
1223 	 *	<bustype=1, addr=x, len=x>: i/o
1224 	 *	<bustype>1, addr=0, len=x>: x86-compatibility i/o
1225 	 */
1226 	if (rp->regspec_bustype != 0) {
1227 		/*
1228 		 * This is I/O space, which requires no particular
1229 		 * processing on unmap since it isn't mapped in the
1230 		 * first place.
1231 		 */
1232 		return (DDI_SUCCESS);
1233 	}
1234 
1235 	/*
1236 	 * Memory space
1237 	 */
1238 	pgoffset = (uintptr_t)addr & MMU_PAGEOFFSET;
1239 	npages = mmu_btopr(rp->regspec_size + pgoffset);
1240 	hat_unload(kas.a_hat, addr - pgoffset, ptob(npages), HAT_UNLOAD_UNLOCK);
1241 	device_arena_free(addr - pgoffset, ptob(npages));
1242 
1243 	/*
1244 	 * Destroy the pointer - the mapping has logically gone
1245 	 */
1246 	*vaddrp = NULL;
1247 
1248 	return (DDI_SUCCESS);
1249 }
1250 
1251 
1252 /*
1253  * rootnex_map_handle()
1254  *
1255  */
1256 static int
1257 rootnex_map_handle(ddi_map_req_t *mp)
1258 {
1259 	rootnex_addr_t rbase;
1260 	ddi_acc_hdl_t *hp;
1261 	uint_t pgoffset;
1262 	struct regspec *rp;
1263 	paddr_t pbase;
1264 
1265 	rp = mp->map_obj.rp;
1266 
1267 #ifdef	DDI_MAP_DEBUG
1268 	ddi_map_debug(
1269 	    "rootnex_map_handle: <0x%x 0x%x 0x%x> handle 0x%x\n",
1270 	    rp->regspec_bustype, rp->regspec_addr,
1271 	    rp->regspec_size, mp->map_handlep);
1272 #endif	/* DDI_MAP_DEBUG */
1273 
1274 	/*
1275 	 * I/O or memory mapping:
1276 	 *
1277 	 *	<bustype=0, addr=x, len=x>: memory
1278 	 *	<bustype=1, addr=x, len=x>: i/o
1279 	 *	<bustype>1, addr=0, len=x>: x86-compatibility i/o
1280 	 */
1281 	if (rp->regspec_bustype != 0) {
1282 		/*
1283 		 * This refers to I/O space, and we don't support "mapping"
1284 		 * I/O space to a user.
1285 		 */
1286 		return (DDI_FAILURE);
1287 	}
1288 
1289 	/*
1290 	 * Set up the hat_flags for the mapping.
1291 	 */
1292 	hp = mp->map_handlep;
1293 
1294 	switch (hp->ah_acc.devacc_attr_endian_flags) {
1295 	case DDI_NEVERSWAP_ACC:
1296 		hp->ah_hat_flags = HAT_NEVERSWAP | HAT_STRICTORDER;
1297 		break;
1298 	case DDI_STRUCTURE_LE_ACC:
1299 		hp->ah_hat_flags = HAT_STRUCTURE_LE;
1300 		break;
1301 	case DDI_STRUCTURE_BE_ACC:
1302 		return (DDI_FAILURE);
1303 	default:
1304 		return (DDI_REGS_ACC_CONFLICT);
1305 	}
1306 
1307 	switch (hp->ah_acc.devacc_attr_dataorder) {
1308 	case DDI_STRICTORDER_ACC:
1309 		break;
1310 	case DDI_UNORDERED_OK_ACC:
1311 		hp->ah_hat_flags |= HAT_UNORDERED_OK;
1312 		break;
1313 	case DDI_MERGING_OK_ACC:
1314 		hp->ah_hat_flags |= HAT_MERGING_OK;
1315 		break;
1316 	case DDI_LOADCACHING_OK_ACC:
1317 		hp->ah_hat_flags |= HAT_LOADCACHING_OK;
1318 		break;
1319 	case DDI_STORECACHING_OK_ACC:
1320 		hp->ah_hat_flags |= HAT_STORECACHING_OK;
1321 		break;
1322 	default:
1323 		return (DDI_FAILURE);
1324 	}
1325 
1326 	rbase = (rootnex_addr_t)rp->regspec_addr &
1327 	    (~(rootnex_addr_t)MMU_PAGEOFFSET);
1328 	pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET;
1329 
1330 	if (rp->regspec_size == 0)
1331 		return (DDI_ME_INVAL);
1332 
1333 #ifdef __xpv
1334 	/*
1335 	 * If we're dom0, we're using a real device so we need to translate
1336 	 * the MA to a PA.
1337 	 */
1338 	if (DOMAIN_IS_INITDOMAIN(xen_info)) {
1339 		pbase = pfn_to_pa(xen_assign_pfn(mmu_btop(rbase))) |
1340 		    (rbase & MMU_PAGEOFFSET);
1341 	} else {
1342 		pbase = rbase;
1343 	}
1344 #else
1345 	pbase = rbase;
1346 #endif
1347 
1348 	hp->ah_pfn = mmu_btop(pbase);
1349 	hp->ah_pnum = mmu_btopr(rp->regspec_size + pgoffset);
1350 
1351 	return (DDI_SUCCESS);
1352 }
1353 
1354 
1355 
1356 /*
1357  * ************************
1358  *  interrupt related code
1359  * ************************
1360  */
1361 
1362 /*
1363  * rootnex_intr_ops()
1364  *	bus_intr_op() function for interrupt support
1365  */
1366 /* ARGSUSED */
1367 static int
1368 rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip, ddi_intr_op_t intr_op,
1369     ddi_intr_handle_impl_t *hdlp, void *result)
1370 {
1371 	struct intrspec			*ispec;
1372 
1373 	DDI_INTR_NEXDBG((CE_CONT,
1374 	    "rootnex_intr_ops: pdip = %p, rdip = %p, intr_op = %x, hdlp = %p\n",
1375 	    (void *)pdip, (void *)rdip, intr_op, (void *)hdlp));
1376 
1377 	/* Process the interrupt operation */
1378 	switch (intr_op) {
1379 	case DDI_INTROP_GETCAP:
1380 		/* First check with pcplusmp */
1381 		if (psm_intr_ops == NULL)
1382 			return (DDI_FAILURE);
1383 
1384 		if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_CAP, result)) {
1385 			*(int *)result = 0;
1386 			return (DDI_FAILURE);
1387 		}
1388 		break;
1389 	case DDI_INTROP_SETCAP:
1390 		if (psm_intr_ops == NULL)
1391 			return (DDI_FAILURE);
1392 
1393 		if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_CAP, result))
1394 			return (DDI_FAILURE);
1395 		break;
1396 	case DDI_INTROP_ALLOC:
1397 		ASSERT(hdlp->ih_type == DDI_INTR_TYPE_FIXED);
1398 		return (rootnex_alloc_intr_fixed(rdip, hdlp, result));
1399 	case DDI_INTROP_FREE:
1400 		ASSERT(hdlp->ih_type == DDI_INTR_TYPE_FIXED);
1401 		return (rootnex_free_intr_fixed(rdip, hdlp));
1402 	case DDI_INTROP_GETPRI:
1403 		if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)
1404 			return (DDI_FAILURE);
1405 		*(int *)result = ispec->intrspec_pri;
1406 		break;
1407 	case DDI_INTROP_SETPRI:
1408 		/* Validate the interrupt priority passed to us */
1409 		if (*(int *)result > LOCK_LEVEL)
1410 			return (DDI_FAILURE);
1411 
1412 		/* Ensure that PSM is all initialized and ispec is ok */
1413 		if ((psm_intr_ops == NULL) ||
1414 		    ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL))
1415 			return (DDI_FAILURE);
1416 
1417 		/* Change the priority */
1418 		if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_PRI, result) ==
1419 		    PSM_FAILURE)
1420 			return (DDI_FAILURE);
1421 
1422 		/* update the ispec with the new priority */
1423 		ispec->intrspec_pri =  *(int *)result;
1424 		break;
1425 	case DDI_INTROP_ADDISR:
1426 		if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)
1427 			return (DDI_FAILURE);
1428 		ispec->intrspec_func = hdlp->ih_cb_func;
1429 		break;
1430 	case DDI_INTROP_REMISR:
1431 		if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)
1432 			return (DDI_FAILURE);
1433 		ispec->intrspec_func = (uint_t (*)()) 0;
1434 		break;
1435 	case DDI_INTROP_ENABLE:
1436 		if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)
1437 			return (DDI_FAILURE);
1438 
1439 		/* Call psmi to translate irq with the dip */
1440 		if (psm_intr_ops == NULL)
1441 			return (DDI_FAILURE);
1442 
1443 		((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec;
1444 		if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_XLATE_VECTOR,
1445 		    (int *)&hdlp->ih_vector) == PSM_FAILURE)
1446 			return (DDI_FAILURE);
1447 
1448 		/* Add the interrupt handler */
1449 		if (!add_avintr((void *)hdlp, ispec->intrspec_pri,
1450 		    hdlp->ih_cb_func, DEVI(rdip)->devi_name, hdlp->ih_vector,
1451 		    hdlp->ih_cb_arg1, hdlp->ih_cb_arg2, NULL, rdip))
1452 			return (DDI_FAILURE);
1453 		break;
1454 	case DDI_INTROP_DISABLE:
1455 		if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)
1456 			return (DDI_FAILURE);
1457 
1458 		/* Call psm_ops() to translate irq with the dip */
1459 		if (psm_intr_ops == NULL)
1460 			return (DDI_FAILURE);
1461 
1462 		((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec;
1463 		(void) (*psm_intr_ops)(rdip, hdlp,
1464 		    PSM_INTR_OP_XLATE_VECTOR, (int *)&hdlp->ih_vector);
1465 
1466 		/* Remove the interrupt handler */
1467 		rem_avintr((void *)hdlp, ispec->intrspec_pri,
1468 		    hdlp->ih_cb_func, hdlp->ih_vector);
1469 		break;
1470 	case DDI_INTROP_SETMASK:
1471 		if (psm_intr_ops == NULL)
1472 			return (DDI_FAILURE);
1473 
1474 		if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_MASK, NULL))
1475 			return (DDI_FAILURE);
1476 		break;
1477 	case DDI_INTROP_CLRMASK:
1478 		if (psm_intr_ops == NULL)
1479 			return (DDI_FAILURE);
1480 
1481 		if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_CLEAR_MASK, NULL))
1482 			return (DDI_FAILURE);
1483 		break;
1484 	case DDI_INTROP_GETPENDING:
1485 		if (psm_intr_ops == NULL)
1486 			return (DDI_FAILURE);
1487 
1488 		if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_PENDING,
1489 		    result)) {
1490 			*(int *)result = 0;
1491 			return (DDI_FAILURE);
1492 		}
1493 		break;
1494 	case DDI_INTROP_NAVAIL:
1495 	case DDI_INTROP_NINTRS:
1496 		*(int *)result = i_ddi_get_intx_nintrs(rdip);
1497 		if (*(int *)result == 0) {
1498 			/*
1499 			 * Special case for 'pcic' driver' only. This driver
1500 			 * driver is a child of 'isa' and 'rootnex' drivers.
1501 			 *
1502 			 * See detailed comments on this in the function
1503 			 * rootnex_get_ispec().
1504 			 *
1505 			 * Children of 'pcic' send 'NINITR' request all the
1506 			 * way to rootnex driver. But, the 'pdp->par_nintr'
1507 			 * field may not initialized. So, we fake it here
1508 			 * to return 1 (a la what PCMCIA nexus does).
1509 			 */
1510 			if (strcmp(ddi_get_name(rdip), "pcic") == 0)
1511 				*(int *)result = 1;
1512 			else
1513 				return (DDI_FAILURE);
1514 		}
1515 		break;
1516 	case DDI_INTROP_SUPPORTED_TYPES:
1517 		*(int *)result = DDI_INTR_TYPE_FIXED;	/* Always ... */
1518 		break;
1519 	default:
1520 		return (DDI_FAILURE);
1521 	}
1522 
1523 	return (DDI_SUCCESS);
1524 }
1525 
1526 
1527 /*
1528  * rootnex_get_ispec()
1529  *	convert an interrupt number to an interrupt specification.
1530  *	The interrupt number determines which interrupt spec will be
1531  *	returned if more than one exists.
1532  *
1533  *	Look into the parent private data area of the 'rdip' to find out
1534  *	the interrupt specification.  First check to make sure there is
1535  *	one that matchs "inumber" and then return a pointer to it.
1536  *
1537  *	Return NULL if one could not be found.
1538  *
1539  *	NOTE: This is needed for rootnex_intr_ops()
1540  */
1541 static struct intrspec *
1542 rootnex_get_ispec(dev_info_t *rdip, int inum)
1543 {
1544 	struct ddi_parent_private_data *pdp = ddi_get_parent_data(rdip);
1545 
1546 	/*
1547 	 * Special case handling for drivers that provide their own
1548 	 * intrspec structures instead of relying on the DDI framework.
1549 	 *
1550 	 * A broken hardware driver in ON could potentially provide its
1551 	 * own intrspec structure, instead of relying on the hardware.
1552 	 * If these drivers are children of 'rootnex' then we need to
1553 	 * continue to provide backward compatibility to them here.
1554 	 *
1555 	 * Following check is a special case for 'pcic' driver which
1556 	 * was found to have broken hardwre andby provides its own intrspec.
1557 	 *
1558 	 * Verbatim comments from this driver are shown here:
1559 	 * "Don't use the ddi_add_intr since we don't have a
1560 	 * default intrspec in all cases."
1561 	 *
1562 	 * Since an 'ispec' may not be always created for it,
1563 	 * check for that and create one if so.
1564 	 *
1565 	 * NOTE: Currently 'pcic' is the only driver found to do this.
1566 	 */
1567 	if (!pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) {
1568 		pdp->par_nintr = 1;
1569 		pdp->par_intr = kmem_zalloc(sizeof (struct intrspec) *
1570 		    pdp->par_nintr, KM_SLEEP);
1571 	}
1572 
1573 	/* Validate the interrupt number */
1574 	if (inum >= pdp->par_nintr)
1575 		return (NULL);
1576 
1577 	/* Get the interrupt structure pointer and return that */
1578 	return ((struct intrspec *)&pdp->par_intr[inum]);
1579 }
1580 
1581 /*
1582  * Allocate interrupt vector for FIXED (legacy) type.
1583  */
1584 static int
1585 rootnex_alloc_intr_fixed(dev_info_t *rdip, ddi_intr_handle_impl_t *hdlp,
1586     void *result)
1587 {
1588 	struct intrspec		*ispec;
1589 	ddi_intr_handle_impl_t	info_hdl;
1590 	int			ret;
1591 	int			free_phdl = 0;
1592 	apic_get_type_t		type_info;
1593 
1594 	if (psm_intr_ops == NULL)
1595 		return (DDI_FAILURE);
1596 
1597 	if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)
1598 		return (DDI_FAILURE);
1599 
1600 	/*
1601 	 * If the PSM module is "APIX" then pass the request for it
1602 	 * to allocate the vector now.
1603 	 */
1604 	bzero(&info_hdl, sizeof (ddi_intr_handle_impl_t));
1605 	info_hdl.ih_private = &type_info;
1606 	if ((*psm_intr_ops)(NULL, &info_hdl, PSM_INTR_OP_APIC_TYPE, NULL) ==
1607 	    PSM_SUCCESS && strcmp(type_info.avgi_type, APIC_APIX_NAME) == 0) {
1608 		if (hdlp->ih_private == NULL) { /* allocate phdl structure */
1609 			free_phdl = 1;
1610 			i_ddi_alloc_intr_phdl(hdlp);
1611 		}
1612 		((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec;
1613 		ret = (*psm_intr_ops)(rdip, hdlp,
1614 		    PSM_INTR_OP_ALLOC_VECTORS, result);
1615 		if (free_phdl) { /* free up the phdl structure */
1616 			free_phdl = 0;
1617 			i_ddi_free_intr_phdl(hdlp);
1618 			hdlp->ih_private = NULL;
1619 		}
1620 	} else {
1621 		/*
1622 		 * No APIX module; fall back to the old scheme where the
1623 		 * interrupt vector is allocated during ddi_enable_intr() call.
1624 		 */
1625 		hdlp->ih_pri = ispec->intrspec_pri;
1626 		*(int *)result = hdlp->ih_scratch1;
1627 		ret = DDI_SUCCESS;
1628 	}
1629 
1630 	return (ret);
1631 }
1632 
1633 /*
1634  * Free up interrupt vector for FIXED (legacy) type.
1635  */
1636 static int
1637 rootnex_free_intr_fixed(dev_info_t *rdip, ddi_intr_handle_impl_t *hdlp)
1638 {
1639 	struct intrspec			*ispec;
1640 	struct ddi_parent_private_data	*pdp;
1641 	ddi_intr_handle_impl_t		info_hdl;
1642 	int				ret;
1643 	apic_get_type_t			type_info;
1644 
1645 	if (psm_intr_ops == NULL)
1646 		return (DDI_FAILURE);
1647 
1648 	/*
1649 	 * If the PSM module is "APIX" then pass the request for it
1650 	 * to free up the vector now.
1651 	 */
1652 	bzero(&info_hdl, sizeof (ddi_intr_handle_impl_t));
1653 	info_hdl.ih_private = &type_info;
1654 	if ((*psm_intr_ops)(NULL, &info_hdl, PSM_INTR_OP_APIC_TYPE, NULL) ==
1655 	    PSM_SUCCESS && strcmp(type_info.avgi_type, APIC_APIX_NAME) == 0) {
1656 		if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)
1657 			return (DDI_FAILURE);
1658 		((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec;
1659 		ret = (*psm_intr_ops)(rdip, hdlp,
1660 		    PSM_INTR_OP_FREE_VECTORS, NULL);
1661 	} else {
1662 		/*
1663 		 * No APIX module; fall back to the old scheme where
1664 		 * the interrupt vector was already freed during
1665 		 * ddi_disable_intr() call.
1666 		 */
1667 		ret = DDI_SUCCESS;
1668 	}
1669 
1670 	pdp = ddi_get_parent_data(rdip);
1671 
1672 	/*
1673 	 * Special case for 'pcic' driver' only.
1674 	 * If an intrspec was created for it, clean it up here
1675 	 * See detailed comments on this in the function
1676 	 * rootnex_get_ispec().
1677 	 */
1678 	if (pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) {
1679 		kmem_free(pdp->par_intr, sizeof (struct intrspec) *
1680 		    pdp->par_nintr);
1681 		/*
1682 		 * Set it to zero; so that
1683 		 * DDI framework doesn't free it again
1684 		 */
1685 		pdp->par_intr = NULL;
1686 		pdp->par_nintr = 0;
1687 	}
1688 
1689 	return (ret);
1690 }
1691 
1692 
1693 /*
1694  * ******************
1695  *  dma related code
1696  * ******************
1697  */
1698 
1699 /*ARGSUSED*/
1700 static int
1701 rootnex_coredma_allochdl(dev_info_t *dip, dev_info_t *rdip,
1702     ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg,
1703     ddi_dma_handle_t *handlep)
1704 {
1705 	uint64_t maxsegmentsize_ll;
1706 	uint_t maxsegmentsize;
1707 	ddi_dma_impl_t *hp;
1708 	rootnex_dma_t *dma;
1709 	uint64_t count_max;
1710 	uint64_t seg;
1711 	int kmflag;
1712 	int e;
1713 
1714 
1715 	/* convert our sleep flags */
1716 	if (waitfp == DDI_DMA_SLEEP) {
1717 		kmflag = KM_SLEEP;
1718 	} else {
1719 		kmflag = KM_NOSLEEP;
1720 	}
1721 
1722 	/*
1723 	 * We try to do only one memory allocation here. We'll do a little
1724 	 * pointer manipulation later. If the bind ends up taking more than
1725 	 * our prealloc's space, we'll have to allocate more memory in the
1726 	 * bind operation. Not great, but much better than before and the
1727 	 * best we can do with the current bind interfaces.
1728 	 */
1729 	hp = kmem_cache_alloc(rootnex_state->r_dmahdl_cache, kmflag);
1730 	if (hp == NULL) {
1731 		if (waitfp != DDI_DMA_DONTWAIT) {
1732 			ddi_set_callback(waitfp, arg,
1733 			    &rootnex_state->r_dvma_call_list_id);
1734 		}
1735 		return (DDI_DMA_NORESOURCES);
1736 	}
1737 
1738 	/* Do our pointer manipulation now, align the structures */
1739 	hp->dmai_private = (void *)(((uintptr_t)hp +
1740 	    (uintptr_t)sizeof (ddi_dma_impl_t) + 0x7) & ~0x7);
1741 	dma = (rootnex_dma_t *)hp->dmai_private;
1742 	dma->dp_prealloc_buffer = (uchar_t *)(((uintptr_t)dma +
1743 	    sizeof (rootnex_dma_t) + 0x7) & ~0x7);
1744 
1745 	/* setup the handle */
1746 	rootnex_clean_dmahdl(hp);
1747 	hp->dmai_error.err_fep = NULL;
1748 	hp->dmai_error.err_cf = NULL;
1749 	dma->dp_dip = rdip;
1750 	dma->dp_sglinfo.si_min_addr = attr->dma_attr_addr_lo;
1751 	dma->dp_sglinfo.si_max_addr = attr->dma_attr_addr_hi;
1752 	hp->dmai_minxfer = attr->dma_attr_minxfer;
1753 	hp->dmai_burstsizes = attr->dma_attr_burstsizes;
1754 	hp->dmai_rdip = rdip;
1755 	hp->dmai_attr = *attr;
1756 
1757 	/* we don't need to worry about the SPL since we do a tryenter */
1758 	mutex_init(&dma->dp_mutex, NULL, MUTEX_DRIVER, NULL);
1759 
1760 	/*
1761 	 * Figure out our maximum segment size. If the segment size is greater
1762 	 * than 4G, we will limit it to (4G - 1) since the max size of a dma
1763 	 * object (ddi_dma_obj_t.dmao_size) is 32 bits. dma_attr_seg and
1764 	 * dma_attr_count_max are size-1 type values.
1765 	 *
1766 	 * Maximum segment size is the largest physically contiguous chunk of
1767 	 * memory that we can return from a bind (i.e. the maximum size of a
1768 	 * single cookie).
1769 	 */
1770 
1771 	/* handle the rollover cases */
1772 	seg = attr->dma_attr_seg + 1;
1773 	if (seg < attr->dma_attr_seg) {
1774 		seg = attr->dma_attr_seg;
1775 	}
1776 	count_max = attr->dma_attr_count_max + 1;
1777 	if (count_max < attr->dma_attr_count_max) {
1778 		count_max = attr->dma_attr_count_max;
1779 	}
1780 
1781 	/*
1782 	 * granularity may or may not be a power of two. If it isn't, we can't
1783 	 * use a simple mask.
1784 	 */
1785 	if (attr->dma_attr_granular & (attr->dma_attr_granular - 1)) {
1786 		dma->dp_granularity_power_2 = B_FALSE;
1787 	} else {
1788 		dma->dp_granularity_power_2 = B_TRUE;
1789 	}
1790 
1791 	/*
1792 	 * maxxfer should be a whole multiple of granularity. If we're going to
1793 	 * break up a window because we're greater than maxxfer, we might as
1794 	 * well make sure it's maxxfer is a whole multiple so we don't have to
1795 	 * worry about triming the window later on for this case.
1796 	 */
1797 	if (attr->dma_attr_granular > 1) {
1798 		if (dma->dp_granularity_power_2) {
1799 			dma->dp_maxxfer = attr->dma_attr_maxxfer -
1800 			    (attr->dma_attr_maxxfer &
1801 			    (attr->dma_attr_granular - 1));
1802 		} else {
1803 			dma->dp_maxxfer = attr->dma_attr_maxxfer -
1804 			    (attr->dma_attr_maxxfer % attr->dma_attr_granular);
1805 		}
1806 	} else {
1807 		dma->dp_maxxfer = attr->dma_attr_maxxfer;
1808 	}
1809 
1810 	maxsegmentsize_ll = MIN(seg, dma->dp_maxxfer);
1811 	maxsegmentsize_ll = MIN(maxsegmentsize_ll, count_max);
1812 	if (maxsegmentsize_ll == 0 || (maxsegmentsize_ll > 0xFFFFFFFF)) {
1813 		maxsegmentsize = 0xFFFFFFFF;
1814 	} else {
1815 		maxsegmentsize = maxsegmentsize_ll;
1816 	}
1817 	dma->dp_sglinfo.si_max_cookie_size = maxsegmentsize;
1818 	dma->dp_sglinfo.si_segmask = attr->dma_attr_seg;
1819 	dma->dp_sglinfo.si_flags = attr->dma_attr_flags;
1820 
1821 	/* check the ddi_dma_attr arg to make sure it makes a little sense */
1822 	if (rootnex_alloc_check_parms) {
1823 		e = rootnex_valid_alloc_parms(attr, maxsegmentsize);
1824 		if (e != DDI_SUCCESS) {
1825 			ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_ALLOC_FAIL]);
1826 			(void) rootnex_dma_freehdl(dip, rdip,
1827 			    (ddi_dma_handle_t)hp);
1828 			return (e);
1829 		}
1830 	}
1831 
1832 	*handlep = (ddi_dma_handle_t)hp;
1833 
1834 	ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]);
1835 	ROOTNEX_DPROBE1(rootnex__alloc__handle, uint64_t,
1836 	    rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]);
1837 
1838 	return (DDI_SUCCESS);
1839 }
1840 
1841 
1842 /*
1843  * rootnex_dma_allochdl()
1844  *    called from ddi_dma_alloc_handle().
1845  */
1846 static int
1847 rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_attr_t *attr,
1848     int (*waitfp)(caddr_t), caddr_t arg, ddi_dma_handle_t *handlep)
1849 {
1850 	int retval;
1851 #if defined(__amd64) && !defined(__xpv)
1852 	uint_t error = ENOTSUP;
1853 
1854 	retval = iommulib_nex_open(rdip, &error);
1855 
1856 	if (retval != DDI_SUCCESS && error == ENOTSUP) {
1857 		/* No IOMMU */
1858 		return (rootnex_coredma_allochdl(dip, rdip, attr, waitfp, arg,
1859 		    handlep));
1860 	} else if (retval != DDI_SUCCESS) {
1861 		return (DDI_FAILURE);
1862 	}
1863 
1864 	ASSERT(IOMMU_USED(rdip));
1865 
1866 	/* has an IOMMU */
1867 	retval = iommulib_nexdma_allochdl(dip, rdip, attr,
1868 	    waitfp, arg, handlep);
1869 #else
1870 	retval = rootnex_coredma_allochdl(dip, rdip, attr, waitfp, arg,
1871 	    handlep);
1872 #endif
1873 	if (retval == DDI_SUCCESS)
1874 		ndi_fmc_insert(rdip, DMA_HANDLE, *handlep, NULL);
1875 	return (retval);
1876 }
1877 
1878 /*ARGSUSED*/
1879 static int
1880 rootnex_coredma_freehdl(dev_info_t *dip, dev_info_t *rdip,
1881     ddi_dma_handle_t handle)
1882 {
1883 	ddi_dma_impl_t *hp;
1884 	rootnex_dma_t *dma;
1885 
1886 
1887 	hp = (ddi_dma_impl_t *)handle;
1888 	dma = (rootnex_dma_t *)hp->dmai_private;
1889 
1890 	/* unbind should have been called first */
1891 	ASSERT(!dma->dp_inuse);
1892 
1893 	mutex_destroy(&dma->dp_mutex);
1894 	kmem_cache_free(rootnex_state->r_dmahdl_cache, hp);
1895 
1896 	ROOTNEX_DPROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]);
1897 	ROOTNEX_DPROBE1(rootnex__free__handle, uint64_t,
1898 	    rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]);
1899 
1900 	if (rootnex_state->r_dvma_call_list_id)
1901 		ddi_run_callback(&rootnex_state->r_dvma_call_list_id);
1902 
1903 	return (DDI_SUCCESS);
1904 }
1905 
1906 /*
1907  * rootnex_dma_freehdl()
1908  *    called from ddi_dma_free_handle().
1909  */
1910 static int
1911 rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle)
1912 {
1913 	ndi_fmc_remove(rdip, DMA_HANDLE, handle);
1914 #if defined(__amd64) && !defined(__xpv)
1915 	if (IOMMU_USED(rdip)) {
1916 		return (iommulib_nexdma_freehdl(dip, rdip, handle));
1917 	}
1918 #endif
1919 	return (rootnex_coredma_freehdl(dip, rdip, handle));
1920 }
1921 
1922 /*ARGSUSED*/
1923 static int
1924 rootnex_coredma_bindhdl(dev_info_t *dip, dev_info_t *rdip,
1925     ddi_dma_handle_t handle, struct ddi_dma_req *dmareq,
1926     ddi_dma_cookie_t *cookiep, uint_t *ccountp)
1927 {
1928 	rootnex_sglinfo_t *sinfo;
1929 	ddi_dma_attr_t *attr;
1930 	ddi_dma_impl_t *hp;
1931 	rootnex_dma_t *dma;
1932 	int kmflag;
1933 	int e;
1934 
1935 	hp = (ddi_dma_impl_t *)handle;
1936 	dma = (rootnex_dma_t *)hp->dmai_private;
1937 	sinfo = &dma->dp_sglinfo;
1938 	attr = &hp->dmai_attr;
1939 
1940 	if (dmareq->dmar_fp == DDI_DMA_SLEEP) {
1941 		dma->dp_sleep_flags = KM_SLEEP;
1942 	} else {
1943 		dma->dp_sleep_flags = KM_NOSLEEP;
1944 	}
1945 
1946 	hp->dmai_rflags = dmareq->dmar_flags & DMP_DDIFLAGS;
1947 
1948 	/*
1949 	 * This is useful for debugging a driver. Not as useful in a production
1950 	 * system. The only time this will fail is if you have a driver bug.
1951 	 */
1952 	if (rootnex_bind_check_inuse) {
1953 		/*
1954 		 * No one else should ever have this lock unless someone else
1955 		 * is trying to use this handle. So contention on the lock
1956 		 * is the same as inuse being set.
1957 		 */
1958 		e = mutex_tryenter(&dma->dp_mutex);
1959 		if (e == 0) {
1960 			ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]);
1961 			return (DDI_DMA_INUSE);
1962 		}
1963 		if (dma->dp_inuse) {
1964 			mutex_exit(&dma->dp_mutex);
1965 			ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]);
1966 			return (DDI_DMA_INUSE);
1967 		}
1968 		dma->dp_inuse = B_TRUE;
1969 		mutex_exit(&dma->dp_mutex);
1970 	}
1971 
1972 	/* check the ddi_dma_attr arg to make sure it makes a little sense */
1973 	if (rootnex_bind_check_parms) {
1974 		e = rootnex_valid_bind_parms(dmareq, attr);
1975 		if (e != DDI_SUCCESS) {
1976 			ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]);
1977 			rootnex_clean_dmahdl(hp);
1978 			return (e);
1979 		}
1980 	}
1981 
1982 	/* save away the original bind info */
1983 	dma->dp_dma = dmareq->dmar_object;
1984 
1985 #if defined(__amd64) && !defined(__xpv)
1986 	e = immu_map_sgl(hp, dmareq, rootnex_prealloc_cookies, rdip);
1987 	switch (e) {
1988 	case DDI_DMA_MAPPED:
1989 		goto out;
1990 	case DDI_DMA_USE_PHYSICAL:
1991 		break;
1992 	case DDI_DMA_PARTIAL:
1993 		ddi_err(DER_PANIC, rdip, "Partial DVMA map");
1994 		e = DDI_DMA_NORESOURCES;
1995 		/*FALLTHROUGH*/
1996 	default:
1997 		ddi_err(DER_MODE, rdip, "DVMA map failed");
1998 		ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]);
1999 		rootnex_clean_dmahdl(hp);
2000 		return (e);
2001 	}
2002 #endif
2003 
2004 	/*
2005 	 * Figure out a rough estimate of what maximum number of pages this
2006 	 * buffer could use (a high estimate of course).
2007 	 */
2008 	sinfo->si_max_pages = mmu_btopr(dma->dp_dma.dmao_size) + 1;
2009 
2010 	/*
2011 	 * We'll use the pre-allocated cookies for any bind that will *always*
2012 	 * fit (more important to be consistent, we don't want to create
2013 	 * additional degenerate cases).
2014 	 */
2015 	if (sinfo->si_max_pages <= rootnex_state->r_prealloc_cookies) {
2016 		dma->dp_cookies = (ddi_dma_cookie_t *)dma->dp_prealloc_buffer;
2017 		dma->dp_need_to_free_cookie = B_FALSE;
2018 		ROOTNEX_DPROBE2(rootnex__bind__prealloc, dev_info_t *, rdip,
2019 		    uint_t, sinfo->si_max_pages);
2020 
2021 	/*
2022 	 * For anything larger than that, we'll go ahead and allocate the
2023 	 * maximum number of pages we expect to see. Hopefuly, we won't be
2024 	 * seeing this path in the fast path for high performance devices very
2025 	 * frequently.
2026 	 *
2027 	 * a ddi bind interface that allowed the driver to provide storage to
2028 	 * the bind interface would speed this case up.
2029 	 */
2030 	} else {
2031 		/* convert the sleep flags */
2032 		if (dmareq->dmar_fp == DDI_DMA_SLEEP) {
2033 			kmflag =  KM_SLEEP;
2034 		} else {
2035 			kmflag =  KM_NOSLEEP;
2036 		}
2037 
2038 		/*
2039 		 * Save away how much memory we allocated. If we're doing a
2040 		 * nosleep, the alloc could fail...
2041 		 */
2042 		dma->dp_cookie_size = sinfo->si_max_pages *
2043 		    sizeof (ddi_dma_cookie_t);
2044 		dma->dp_cookies = kmem_alloc(dma->dp_cookie_size, kmflag);
2045 		if (dma->dp_cookies == NULL) {
2046 			ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]);
2047 			rootnex_clean_dmahdl(hp);
2048 			return (DDI_DMA_NORESOURCES);
2049 		}
2050 		dma->dp_need_to_free_cookie = B_TRUE;
2051 		ROOTNEX_DPROBE2(rootnex__bind__alloc, dev_info_t *, rdip,
2052 		    uint_t, sinfo->si_max_pages);
2053 	}
2054 	hp->dmai_cookie = dma->dp_cookies;
2055 
2056 	/*
2057 	 * Get the real sgl. rootnex_get_sgl will fill in cookie array while
2058 	 * looking at the constraints in the dma structure. It will then put
2059 	 * some additional state about the sgl in the dma struct (i.e. is
2060 	 * the sgl clean, or do we need to do some munging; how many pages
2061 	 * need to be copied, etc.)
2062 	 */
2063 	rootnex_get_sgl(&dmareq->dmar_object, dma->dp_cookies,
2064 	    &dma->dp_sglinfo);
2065 
2066 out:
2067 	ASSERT(sinfo->si_sgl_size <= sinfo->si_max_pages);
2068 	/* if we don't need a copy buffer, we don't need to sync */
2069 	if (sinfo->si_copybuf_req == 0) {
2070 		hp->dmai_rflags |= DMP_NOSYNC;
2071 	}
2072 
2073 	/*
2074 	 * if we don't need the copybuf and we don't need to do a partial,  we
2075 	 * hit the fast path. All the high performance devices should be trying
2076 	 * to hit this path. To hit this path, a device should be able to reach
2077 	 * all of memory, shouldn't try to bind more than it can transfer, and
2078 	 * the buffer shouldn't require more cookies than the driver/device can
2079 	 * handle [sgllen]).
2080 	 */
2081 	if ((sinfo->si_copybuf_req == 0) &&
2082 	    (sinfo->si_sgl_size <= attr->dma_attr_sgllen) &&
2083 	    (dma->dp_dma.dmao_size < dma->dp_maxxfer)) {
2084 		/*
2085 		 * If the driver supports FMA, insert the handle in the FMA DMA
2086 		 * handle cache.
2087 		 */
2088 		if (attr->dma_attr_flags & DDI_DMA_FLAGERR)
2089 			hp->dmai_error.err_cf = rootnex_dma_check;
2090 
2091 		/*
2092 		 * copy out the first cookie and ccountp, set the cookie
2093 		 * pointer to the second cookie. The first cookie is passed
2094 		 * back on the stack. Additional cookies are accessed via
2095 		 * ddi_dma_nextcookie()
2096 		 */
2097 		*cookiep = dma->dp_cookies[0];
2098 		*ccountp = sinfo->si_sgl_size;
2099 		hp->dmai_cookie++;
2100 		hp->dmai_rflags &= ~DDI_DMA_PARTIAL;
2101 		ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]);
2102 		ROOTNEX_DPROBE3(rootnex__bind__fast, dev_info_t *, rdip,
2103 		    uint64_t, rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS],
2104 		    uint_t, dma->dp_dma.dmao_size);
2105 
2106 
2107 		return (DDI_DMA_MAPPED);
2108 	}
2109 
2110 	/*
2111 	 * go to the slow path, we may need to alloc more memory, create
2112 	 * multiple windows, and munge up a sgl to make the device happy.
2113 	 */
2114 	e = rootnex_bind_slowpath(hp, dmareq, dma, attr, kmflag);
2115 	if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) {
2116 		if (dma->dp_need_to_free_cookie) {
2117 			kmem_free(dma->dp_cookies, dma->dp_cookie_size);
2118 		}
2119 		ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]);
2120 		rootnex_clean_dmahdl(hp); /* must be after free cookie */
2121 		return (e);
2122 	}
2123 
2124 	/*
2125 	 * If the driver supports FMA, insert the handle in the FMA DMA handle
2126 	 * cache.
2127 	 */
2128 	if (attr->dma_attr_flags & DDI_DMA_FLAGERR)
2129 		hp->dmai_error.err_cf = rootnex_dma_check;
2130 
2131 	/* if the first window uses the copy buffer, sync it for the device */
2132 	if ((dma->dp_window[dma->dp_current_win].wd_dosync) &&
2133 	    (hp->dmai_rflags & DDI_DMA_WRITE)) {
2134 		(void) rootnex_coredma_sync(dip, rdip, handle, 0, 0,
2135 		    DDI_DMA_SYNC_FORDEV);
2136 	}
2137 
2138 	/*
2139 	 * copy out the first cookie and ccountp, set the cookie pointer to the
2140 	 * second cookie. Make sure the partial flag is set/cleared correctly.
2141 	 * If we have a partial map (i.e. multiple windows), the number of
2142 	 * cookies we return is the number of cookies in the first window.
2143 	 */
2144 	if (e == DDI_DMA_MAPPED) {
2145 		hp->dmai_rflags &= ~DDI_DMA_PARTIAL;
2146 		*ccountp = sinfo->si_sgl_size;
2147 		hp->dmai_nwin = 1;
2148 	} else {
2149 		hp->dmai_rflags |= DDI_DMA_PARTIAL;
2150 		*ccountp = dma->dp_window[dma->dp_current_win].wd_cookie_cnt;
2151 		ASSERT(hp->dmai_nwin <= dma->dp_max_win);
2152 	}
2153 	*cookiep = dma->dp_cookies[0];
2154 	hp->dmai_cookie++;
2155 
2156 	ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]);
2157 	ROOTNEX_DPROBE3(rootnex__bind__slow, dev_info_t *, rdip, uint64_t,
2158 	    rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS], uint_t,
2159 	    dma->dp_dma.dmao_size);
2160 	return (e);
2161 }
2162 
2163 /*
2164  * rootnex_dma_bindhdl()
2165  *    called from ddi_dma_addr_bind_handle() and ddi_dma_buf_bind_handle().
2166  */
2167 static int
2168 rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip,
2169     ddi_dma_handle_t handle, struct ddi_dma_req *dmareq,
2170     ddi_dma_cookie_t *cookiep, uint_t *ccountp)
2171 {
2172 #if defined(__amd64) && !defined(__xpv)
2173 	if (IOMMU_USED(rdip)) {
2174 		return (iommulib_nexdma_bindhdl(dip, rdip, handle, dmareq,
2175 		    cookiep, ccountp));
2176 	}
2177 #endif
2178 	return (rootnex_coredma_bindhdl(dip, rdip, handle, dmareq,
2179 	    cookiep, ccountp));
2180 }
2181 
2182 
2183 
2184 /*ARGSUSED*/
2185 static int
2186 rootnex_coredma_unbindhdl(dev_info_t *dip, dev_info_t *rdip,
2187     ddi_dma_handle_t handle)
2188 {
2189 	ddi_dma_impl_t *hp;
2190 	rootnex_dma_t *dma;
2191 	int e;
2192 
2193 	hp = (ddi_dma_impl_t *)handle;
2194 	dma = (rootnex_dma_t *)hp->dmai_private;
2195 
2196 	/* make sure the buffer wasn't free'd before calling unbind */
2197 	if (rootnex_unbind_verify_buffer) {
2198 		e = rootnex_verify_buffer(dma);
2199 		if (e != DDI_SUCCESS) {
2200 			ASSERT(0);
2201 			return (DDI_FAILURE);
2202 		}
2203 	}
2204 
2205 	/* sync the current window before unbinding the buffer */
2206 	if (dma->dp_window && dma->dp_window[dma->dp_current_win].wd_dosync &&
2207 	    (hp->dmai_rflags & DDI_DMA_READ)) {
2208 		(void) rootnex_coredma_sync(dip, rdip, handle, 0, 0,
2209 		    DDI_DMA_SYNC_FORCPU);
2210 	}
2211 
2212 	/*
2213 	 * cleanup and copy buffer or window state. if we didn't use the copy
2214 	 * buffer or windows, there won't be much to do :-)
2215 	 */
2216 	rootnex_teardown_copybuf(dma);
2217 	rootnex_teardown_windows(dma);
2218 
2219 #if defined(__amd64) && !defined(__xpv)
2220 	/*
2221 	 * Clean up the page tables and free the dvma
2222 	 */
2223 	e = immu_unmap_sgl(hp, rdip);
2224 	if (e != DDI_DMA_USE_PHYSICAL && e != DDI_SUCCESS) {
2225 		return (e);
2226 	}
2227 #endif
2228 
2229 	/*
2230 	 * If we had to allocate space to for the worse case sgl (it didn't
2231 	 * fit into our pre-allocate buffer), free that up now
2232 	 */
2233 	if (dma->dp_need_to_free_cookie) {
2234 		kmem_free(dma->dp_cookies, dma->dp_cookie_size);
2235 	}
2236 
2237 	/*
2238 	 * clean up the handle so it's ready for the next bind (i.e. if the
2239 	 * handle is reused).
2240 	 */
2241 	rootnex_clean_dmahdl(hp);
2242 	hp->dmai_error.err_cf = NULL;
2243 
2244 	if (rootnex_state->r_dvma_call_list_id)
2245 		ddi_run_callback(&rootnex_state->r_dvma_call_list_id);
2246 
2247 	ROOTNEX_DPROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]);
2248 	ROOTNEX_DPROBE1(rootnex__unbind, uint64_t,
2249 	    rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]);
2250 
2251 	return (DDI_SUCCESS);
2252 }
2253 
2254 /*
2255  * rootnex_dma_unbindhdl()
2256  *    called from ddi_dma_unbind_handle()
2257  */
2258 /*ARGSUSED*/
2259 static int
2260 rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip,
2261     ddi_dma_handle_t handle)
2262 {
2263 #if defined(__amd64) && !defined(__xpv)
2264 	if (IOMMU_USED(rdip)) {
2265 		return (iommulib_nexdma_unbindhdl(dip, rdip, handle));
2266 	}
2267 #endif
2268 	return (rootnex_coredma_unbindhdl(dip, rdip, handle));
2269 }
2270 
2271 #if defined(__amd64) && !defined(__xpv)
2272 
2273 static int
2274 rootnex_coredma_get_sleep_flags(ddi_dma_handle_t handle)
2275 {
2276 	ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle;
2277 	rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private;
2278 
2279 	if (dma->dp_sleep_flags != KM_SLEEP &&
2280 	    dma->dp_sleep_flags != KM_NOSLEEP)
2281 		cmn_err(CE_PANIC, "kmem sleep flags not set in DMA handle");
2282 	return (dma->dp_sleep_flags);
2283 }
2284 /*ARGSUSED*/
2285 static void
2286 rootnex_coredma_reset_cookies(dev_info_t *dip, ddi_dma_handle_t handle)
2287 {
2288 	ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle;
2289 	rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private;
2290 	rootnex_window_t *window;
2291 
2292 	if (dma->dp_window) {
2293 		window = &dma->dp_window[dma->dp_current_win];
2294 		hp->dmai_cookie = window->wd_first_cookie;
2295 	} else {
2296 		hp->dmai_cookie = dma->dp_cookies;
2297 	}
2298 	hp->dmai_cookie++;
2299 }
2300 
2301 /*ARGSUSED*/
2302 static int
2303 rootnex_coredma_get_cookies(dev_info_t *dip, ddi_dma_handle_t handle,
2304     ddi_dma_cookie_t **cookiepp, uint_t *ccountp)
2305 {
2306 	int i;
2307 	int km_flags;
2308 	ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle;
2309 	rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private;
2310 	rootnex_window_t *window;
2311 	ddi_dma_cookie_t *cp;
2312 	ddi_dma_cookie_t *cookie;
2313 
2314 	ASSERT(*cookiepp == NULL);
2315 	ASSERT(*ccountp == 0);
2316 
2317 	if (dma->dp_window) {
2318 		window = &dma->dp_window[dma->dp_current_win];
2319 		cp = window->wd_first_cookie;
2320 		*ccountp = window->wd_cookie_cnt;
2321 	} else {
2322 		cp = dma->dp_cookies;
2323 		*ccountp = dma->dp_sglinfo.si_sgl_size;
2324 	}
2325 
2326 	km_flags = rootnex_coredma_get_sleep_flags(handle);
2327 	cookie = kmem_zalloc(sizeof (ddi_dma_cookie_t) * (*ccountp), km_flags);
2328 	if (cookie == NULL) {
2329 		return (DDI_DMA_NORESOURCES);
2330 	}
2331 
2332 	for (i = 0; i < *ccountp; i++) {
2333 		cookie[i].dmac_notused = cp[i].dmac_notused;
2334 		cookie[i].dmac_type = cp[i].dmac_type;
2335 		cookie[i].dmac_address = cp[i].dmac_address;
2336 		cookie[i].dmac_size = cp[i].dmac_size;
2337 	}
2338 
2339 	*cookiepp = cookie;
2340 
2341 	return (DDI_SUCCESS);
2342 }
2343 
2344 /*ARGSUSED*/
2345 static int
2346 rootnex_coredma_set_cookies(dev_info_t *dip, ddi_dma_handle_t handle,
2347     ddi_dma_cookie_t *cookiep, uint_t ccount)
2348 {
2349 	ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle;
2350 	rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private;
2351 	rootnex_window_t *window;
2352 	ddi_dma_cookie_t *cur_cookiep;
2353 
2354 	ASSERT(cookiep);
2355 	ASSERT(ccount != 0);
2356 	ASSERT(dma->dp_need_to_switch_cookies == B_FALSE);
2357 
2358 	if (dma->dp_window) {
2359 		window = &dma->dp_window[dma->dp_current_win];
2360 		dma->dp_saved_cookies = window->wd_first_cookie;
2361 		window->wd_first_cookie = cookiep;
2362 		ASSERT(ccount == window->wd_cookie_cnt);
2363 		cur_cookiep = (hp->dmai_cookie - dma->dp_saved_cookies)
2364 		    + window->wd_first_cookie;
2365 	} else {
2366 		dma->dp_saved_cookies = dma->dp_cookies;
2367 		dma->dp_cookies = cookiep;
2368 		ASSERT(ccount == dma->dp_sglinfo.si_sgl_size);
2369 		cur_cookiep = (hp->dmai_cookie - dma->dp_saved_cookies)
2370 		    + dma->dp_cookies;
2371 	}
2372 
2373 	dma->dp_need_to_switch_cookies = B_TRUE;
2374 	hp->dmai_cookie = cur_cookiep;
2375 
2376 	return (DDI_SUCCESS);
2377 }
2378 
2379 /*ARGSUSED*/
2380 static int
2381 rootnex_coredma_clear_cookies(dev_info_t *dip, ddi_dma_handle_t handle)
2382 {
2383 	ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle;
2384 	rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private;
2385 	rootnex_window_t *window;
2386 	ddi_dma_cookie_t *cur_cookiep;
2387 	ddi_dma_cookie_t *cookie_array;
2388 	uint_t ccount;
2389 
2390 	/* check if cookies have not been switched */
2391 	if (dma->dp_need_to_switch_cookies == B_FALSE)
2392 		return (DDI_SUCCESS);
2393 
2394 	ASSERT(dma->dp_saved_cookies);
2395 
2396 	if (dma->dp_window) {
2397 		window = &dma->dp_window[dma->dp_current_win];
2398 		cookie_array = window->wd_first_cookie;
2399 		window->wd_first_cookie = dma->dp_saved_cookies;
2400 		dma->dp_saved_cookies = NULL;
2401 		ccount = window->wd_cookie_cnt;
2402 		cur_cookiep = (hp->dmai_cookie - cookie_array)
2403 		    + window->wd_first_cookie;
2404 	} else {
2405 		cookie_array = dma->dp_cookies;
2406 		dma->dp_cookies = dma->dp_saved_cookies;
2407 		dma->dp_saved_cookies = NULL;
2408 		ccount = dma->dp_sglinfo.si_sgl_size;
2409 		cur_cookiep = (hp->dmai_cookie - cookie_array)
2410 		    + dma->dp_cookies;
2411 	}
2412 
2413 	kmem_free(cookie_array, sizeof (ddi_dma_cookie_t) * ccount);
2414 
2415 	hp->dmai_cookie = cur_cookiep;
2416 
2417 	dma->dp_need_to_switch_cookies = B_FALSE;
2418 
2419 	return (DDI_SUCCESS);
2420 }
2421 
2422 #endif
2423 
2424 /*
2425  * rootnex_verify_buffer()
2426  *   verify buffer wasn't free'd
2427  */
2428 static int
2429 rootnex_verify_buffer(rootnex_dma_t *dma)
2430 {
2431 	page_t **pplist;
2432 	caddr_t vaddr;
2433 	uint_t pcnt;
2434 	uint_t poff;
2435 	page_t *pp;
2436 	char b;
2437 	int i;
2438 
2439 	/* Figure out how many pages this buffer occupies */
2440 	if (dma->dp_dma.dmao_type == DMA_OTYP_PAGES) {
2441 		poff = dma->dp_dma.dmao_obj.pp_obj.pp_offset & MMU_PAGEOFFSET;
2442 	} else {
2443 		vaddr = dma->dp_dma.dmao_obj.virt_obj.v_addr;
2444 		poff = (uintptr_t)vaddr & MMU_PAGEOFFSET;
2445 	}
2446 	pcnt = mmu_btopr(dma->dp_dma.dmao_size + poff);
2447 
2448 	switch (dma->dp_dma.dmao_type) {
2449 	case DMA_OTYP_PAGES:
2450 		/*
2451 		 * for a linked list of pp's walk through them to make sure
2452 		 * they're locked and not free.
2453 		 */
2454 		pp = dma->dp_dma.dmao_obj.pp_obj.pp_pp;
2455 		for (i = 0; i < pcnt; i++) {
2456 			if (PP_ISFREE(pp) || !PAGE_LOCKED(pp)) {
2457 				return (DDI_FAILURE);
2458 			}
2459 			pp = pp->p_next;
2460 		}
2461 		break;
2462 
2463 	case DMA_OTYP_VADDR:
2464 	case DMA_OTYP_BUFVADDR:
2465 		pplist = dma->dp_dma.dmao_obj.virt_obj.v_priv;
2466 		/*
2467 		 * for an array of pp's walk through them to make sure they're
2468 		 * not free. It's possible that they may not be locked.
2469 		 */
2470 		if (pplist) {
2471 			for (i = 0; i < pcnt; i++) {
2472 				if (PP_ISFREE(pplist[i])) {
2473 					return (DDI_FAILURE);
2474 				}
2475 			}
2476 
2477 		/* For a virtual address, try to peek at each page */
2478 		} else {
2479 			if (dma->dp_sglinfo.si_asp == &kas) {
2480 				for (i = 0; i < pcnt; i++) {
2481 					if (ddi_peek8(NULL, vaddr, &b) ==
2482 					    DDI_FAILURE)
2483 						return (DDI_FAILURE);
2484 					vaddr += MMU_PAGESIZE;
2485 				}
2486 			}
2487 		}
2488 		break;
2489 
2490 	default:
2491 		ASSERT(0);
2492 		break;
2493 	}
2494 
2495 	return (DDI_SUCCESS);
2496 }
2497 
2498 
2499 /*
2500  * rootnex_clean_dmahdl()
2501  *    Clean the dma handle. This should be called on a handle alloc and an
2502  *    unbind handle. Set the handle state to the default settings.
2503  */
2504 static void
2505 rootnex_clean_dmahdl(ddi_dma_impl_t *hp)
2506 {
2507 	rootnex_dma_t *dma;
2508 
2509 
2510 	dma = (rootnex_dma_t *)hp->dmai_private;
2511 
2512 	hp->dmai_nwin = 0;
2513 	dma->dp_current_cookie = 0;
2514 	dma->dp_copybuf_size = 0;
2515 	dma->dp_window = NULL;
2516 	dma->dp_cbaddr = NULL;
2517 	dma->dp_inuse = B_FALSE;
2518 	dma->dp_need_to_free_cookie = B_FALSE;
2519 	dma->dp_need_to_switch_cookies = B_FALSE;
2520 	dma->dp_saved_cookies = NULL;
2521 	dma->dp_sleep_flags = KM_PANIC;
2522 	dma->dp_need_to_free_window = B_FALSE;
2523 	dma->dp_partial_required = B_FALSE;
2524 	dma->dp_trim_required = B_FALSE;
2525 	dma->dp_sglinfo.si_copybuf_req = 0;
2526 #if !defined(__amd64)
2527 	dma->dp_cb_remaping = B_FALSE;
2528 	dma->dp_kva = NULL;
2529 #endif
2530 
2531 	/* FMA related initialization */
2532 	hp->dmai_fault = 0;
2533 	hp->dmai_fault_check = NULL;
2534 	hp->dmai_fault_notify = NULL;
2535 	hp->dmai_error.err_ena = 0;
2536 	hp->dmai_error.err_status = DDI_FM_OK;
2537 	hp->dmai_error.err_expected = DDI_FM_ERR_UNEXPECTED;
2538 	hp->dmai_error.err_ontrap = NULL;
2539 }
2540 
2541 
2542 /*
2543  * rootnex_valid_alloc_parms()
2544  *    Called in ddi_dma_alloc_handle path to validate its parameters.
2545  */
2546 static int
2547 rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegmentsize)
2548 {
2549 	if ((attr->dma_attr_seg < MMU_PAGEOFFSET) ||
2550 	    (attr->dma_attr_count_max < MMU_PAGEOFFSET) ||
2551 	    (attr->dma_attr_granular > MMU_PAGESIZE) ||
2552 	    (attr->dma_attr_maxxfer < MMU_PAGESIZE)) {
2553 		return (DDI_DMA_BADATTR);
2554 	}
2555 
2556 	if (attr->dma_attr_addr_hi <= attr->dma_attr_addr_lo) {
2557 		return (DDI_DMA_BADATTR);
2558 	}
2559 
2560 	if ((attr->dma_attr_seg & MMU_PAGEOFFSET) != MMU_PAGEOFFSET ||
2561 	    MMU_PAGESIZE & (attr->dma_attr_granular - 1) ||
2562 	    attr->dma_attr_sgllen <= 0) {
2563 		return (DDI_DMA_BADATTR);
2564 	}
2565 
2566 	/* We should be able to DMA into every byte offset in a page */
2567 	if (maxsegmentsize < MMU_PAGESIZE) {
2568 		return (DDI_DMA_BADATTR);
2569 	}
2570 
2571 	/* if we're bouncing on seg, seg must be <= addr_hi */
2572 	if ((attr->dma_attr_flags & _DDI_DMA_BOUNCE_ON_SEG) &&
2573 	    (attr->dma_attr_seg > attr->dma_attr_addr_hi)) {
2574 		return (DDI_DMA_BADATTR);
2575 	}
2576 	return (DDI_SUCCESS);
2577 }
2578 
2579 /*
2580  * rootnex_valid_bind_parms()
2581  *    Called in ddi_dma_*_bind_handle path to validate its parameters.
2582  */
2583 /* ARGSUSED */
2584 static int
2585 rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, ddi_dma_attr_t *attr)
2586 {
2587 #if !defined(__amd64)
2588 	/*
2589 	 * we only support up to a 2G-1 transfer size on 32-bit kernels so
2590 	 * we can track the offset for the obsoleted interfaces.
2591 	 */
2592 	if (dmareq->dmar_object.dmao_size > 0x7FFFFFFF) {
2593 		return (DDI_DMA_TOOBIG);
2594 	}
2595 #endif
2596 
2597 	return (DDI_SUCCESS);
2598 }
2599 
2600 
2601 /*
2602  * rootnex_need_bounce_seg()
2603  *    check to see if the buffer lives on both side of the seg.
2604  */
2605 static boolean_t
2606 rootnex_need_bounce_seg(ddi_dma_obj_t *dmar_object, rootnex_sglinfo_t *sglinfo)
2607 {
2608 	ddi_dma_atyp_t buftype;
2609 	rootnex_addr_t raddr;
2610 	boolean_t lower_addr;
2611 	boolean_t upper_addr;
2612 	uint64_t offset;
2613 	page_t **pplist;
2614 	uint64_t paddr;
2615 	uint32_t psize;
2616 	uint32_t size;
2617 	caddr_t vaddr;
2618 	uint_t pcnt;
2619 	page_t *pp;
2620 
2621 
2622 	/* shortcuts */
2623 	pplist = dmar_object->dmao_obj.virt_obj.v_priv;
2624 	vaddr = dmar_object->dmao_obj.virt_obj.v_addr;
2625 	buftype = dmar_object->dmao_type;
2626 	size = dmar_object->dmao_size;
2627 
2628 	lower_addr = B_FALSE;
2629 	upper_addr = B_FALSE;
2630 	pcnt = 0;
2631 
2632 	/*
2633 	 * Process the first page to handle the initial offset of the buffer.
2634 	 * We'll use the base address we get later when we loop through all
2635 	 * the pages.
2636 	 */
2637 	if (buftype == DMA_OTYP_PAGES) {
2638 		pp = dmar_object->dmao_obj.pp_obj.pp_pp;
2639 		offset =  dmar_object->dmao_obj.pp_obj.pp_offset &
2640 		    MMU_PAGEOFFSET;
2641 		paddr = pfn_to_pa(pp->p_pagenum) + offset;
2642 		psize = MIN(size, (MMU_PAGESIZE - offset));
2643 		pp = pp->p_next;
2644 		sglinfo->si_asp = NULL;
2645 	} else if (pplist != NULL) {
2646 		offset = (uintptr_t)vaddr & MMU_PAGEOFFSET;
2647 		sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as;
2648 		if (sglinfo->si_asp == NULL) {
2649 			sglinfo->si_asp = &kas;
2650 		}
2651 		paddr = pfn_to_pa(pplist[pcnt]->p_pagenum);
2652 		paddr += offset;
2653 		psize = MIN(size, (MMU_PAGESIZE - offset));
2654 		pcnt++;
2655 	} else {
2656 		offset = (uintptr_t)vaddr & MMU_PAGEOFFSET;
2657 		sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as;
2658 		if (sglinfo->si_asp == NULL) {
2659 			sglinfo->si_asp = &kas;
2660 		}
2661 		paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat, vaddr));
2662 		paddr += offset;
2663 		psize = MIN(size, (MMU_PAGESIZE - offset));
2664 		vaddr += psize;
2665 	}
2666 
2667 #ifdef __xpv
2668 	/*
2669 	 * If we're dom0, we're using a real device so we need to load
2670 	 * the cookies with MFNs instead of PFNs.
2671 	 */
2672 	raddr = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr);
2673 #else
2674 	raddr = paddr;
2675 #endif
2676 
2677 	if ((raddr + psize) > sglinfo->si_segmask) {
2678 		upper_addr = B_TRUE;
2679 	} else {
2680 		lower_addr = B_TRUE;
2681 	}
2682 	size -= psize;
2683 
2684 	/*
2685 	 * Walk through the rest of the pages in the buffer. Track to see
2686 	 * if we have pages on both sides of the segment boundary.
2687 	 */
2688 	while (size > 0) {
2689 		/* partial or full page */
2690 		psize = MIN(size, MMU_PAGESIZE);
2691 
2692 		if (buftype == DMA_OTYP_PAGES) {
2693 			/* get the paddr from the page_t */
2694 			ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp));
2695 			paddr = pfn_to_pa(pp->p_pagenum);
2696 			pp = pp->p_next;
2697 		} else if (pplist != NULL) {
2698 			/* index into the array of page_t's to get the paddr */
2699 			ASSERT(!PP_ISFREE(pplist[pcnt]));
2700 			paddr = pfn_to_pa(pplist[pcnt]->p_pagenum);
2701 			pcnt++;
2702 		} else {
2703 			/* call into the VM to get the paddr */
2704 			paddr =  pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat,
2705 			    vaddr));
2706 			vaddr += psize;
2707 		}
2708 
2709 #ifdef __xpv
2710 		/*
2711 		 * If we're dom0, we're using a real device so we need to load
2712 		 * the cookies with MFNs instead of PFNs.
2713 		 */
2714 		raddr = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr);
2715 #else
2716 		raddr = paddr;
2717 #endif
2718 
2719 		if ((raddr + psize) > sglinfo->si_segmask) {
2720 			upper_addr = B_TRUE;
2721 		} else {
2722 			lower_addr = B_TRUE;
2723 		}
2724 		/*
2725 		 * if the buffer lives both above and below the segment
2726 		 * boundary, or the current page is the page immediately
2727 		 * after the segment, we will use a copy/bounce buffer for
2728 		 * all pages > seg.
2729 		 */
2730 		if ((lower_addr && upper_addr) ||
2731 		    (raddr == (sglinfo->si_segmask + 1))) {
2732 			return (B_TRUE);
2733 		}
2734 
2735 		size -= psize;
2736 	}
2737 
2738 	return (B_FALSE);
2739 }
2740 
2741 
2742 /*
2743  * rootnex_get_sgl()
2744  *    Called in bind fastpath to get the sgl. Most of this will be replaced
2745  *    with a call to the vm layer when vm2.0 comes around...
2746  */
2747 static void
2748 rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl,
2749     rootnex_sglinfo_t *sglinfo)
2750 {
2751 	ddi_dma_atyp_t buftype;
2752 	rootnex_addr_t raddr;
2753 	uint64_t last_page;
2754 	uint64_t offset;
2755 	uint64_t addrhi;
2756 	uint64_t addrlo;
2757 	uint64_t maxseg;
2758 	page_t **pplist;
2759 	uint64_t paddr;
2760 	uint32_t psize;
2761 	uint32_t size;
2762 	caddr_t vaddr;
2763 	uint_t pcnt;
2764 	page_t *pp;
2765 	uint_t cnt;
2766 
2767 
2768 	/* shortcuts */
2769 	pplist = dmar_object->dmao_obj.virt_obj.v_priv;
2770 	vaddr = dmar_object->dmao_obj.virt_obj.v_addr;
2771 	maxseg = sglinfo->si_max_cookie_size;
2772 	buftype = dmar_object->dmao_type;
2773 	addrhi = sglinfo->si_max_addr;
2774 	addrlo = sglinfo->si_min_addr;
2775 	size = dmar_object->dmao_size;
2776 
2777 	pcnt = 0;
2778 	cnt = 0;
2779 
2780 
2781 	/*
2782 	 * check to see if we need to use the copy buffer for pages over
2783 	 * the segment attr.
2784 	 */
2785 	sglinfo->si_bounce_on_seg = B_FALSE;
2786 	if (sglinfo->si_flags & _DDI_DMA_BOUNCE_ON_SEG) {
2787 		sglinfo->si_bounce_on_seg = rootnex_need_bounce_seg(
2788 		    dmar_object, sglinfo);
2789 	}
2790 
2791 	/*
2792 	 * if we were passed down a linked list of pages, i.e. pointer to
2793 	 * page_t, use this to get our physical address and buf offset.
2794 	 */
2795 	if (buftype == DMA_OTYP_PAGES) {
2796 		pp = dmar_object->dmao_obj.pp_obj.pp_pp;
2797 		ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp));
2798 		offset =  dmar_object->dmao_obj.pp_obj.pp_offset &
2799 		    MMU_PAGEOFFSET;
2800 		paddr = pfn_to_pa(pp->p_pagenum) + offset;
2801 		psize = MIN(size, (MMU_PAGESIZE - offset));
2802 		pp = pp->p_next;
2803 		sglinfo->si_asp = NULL;
2804 
2805 	/*
2806 	 * We weren't passed down a linked list of pages, but if we were passed
2807 	 * down an array of pages, use this to get our physical address and buf
2808 	 * offset.
2809 	 */
2810 	} else if (pplist != NULL) {
2811 		ASSERT((buftype == DMA_OTYP_VADDR) ||
2812 		    (buftype == DMA_OTYP_BUFVADDR));
2813 
2814 		offset = (uintptr_t)vaddr & MMU_PAGEOFFSET;
2815 		sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as;
2816 		if (sglinfo->si_asp == NULL) {
2817 			sglinfo->si_asp = &kas;
2818 		}
2819 
2820 		ASSERT(!PP_ISFREE(pplist[pcnt]));
2821 		paddr = pfn_to_pa(pplist[pcnt]->p_pagenum);
2822 		paddr += offset;
2823 		psize = MIN(size, (MMU_PAGESIZE - offset));
2824 		pcnt++;
2825 
2826 	/*
2827 	 * All we have is a virtual address, we'll need to call into the VM
2828 	 * to get the physical address.
2829 	 */
2830 	} else {
2831 		ASSERT((buftype == DMA_OTYP_VADDR) ||
2832 		    (buftype == DMA_OTYP_BUFVADDR));
2833 
2834 		offset = (uintptr_t)vaddr & MMU_PAGEOFFSET;
2835 		sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as;
2836 		if (sglinfo->si_asp == NULL) {
2837 			sglinfo->si_asp = &kas;
2838 		}
2839 
2840 		paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat, vaddr));
2841 		paddr += offset;
2842 		psize = MIN(size, (MMU_PAGESIZE - offset));
2843 		vaddr += psize;
2844 	}
2845 
2846 #ifdef __xpv
2847 	/*
2848 	 * If we're dom0, we're using a real device so we need to load
2849 	 * the cookies with MFNs instead of PFNs.
2850 	 */
2851 	raddr = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr);
2852 #else
2853 	raddr = paddr;
2854 #endif
2855 
2856 	/*
2857 	 * Setup the first cookie with the physical address of the page and the
2858 	 * size of the page (which takes into account the initial offset into
2859 	 * the page.
2860 	 */
2861 	sgl[cnt].dmac_laddress = raddr;
2862 	sgl[cnt].dmac_size = psize;
2863 	sgl[cnt].dmac_type = 0;
2864 
2865 	/*
2866 	 * Save away the buffer offset into the page. We'll need this later in
2867 	 * the copy buffer code to help figure out the page index within the
2868 	 * buffer and the offset into the current page.
2869 	 */
2870 	sglinfo->si_buf_offset = offset;
2871 
2872 	/*
2873 	 * If we are using the copy buffer for anything over the segment
2874 	 * boundary, and this page is over the segment boundary.
2875 	 *   OR
2876 	 * if the DMA engine can't reach the physical address.
2877 	 */
2878 	if (((sglinfo->si_bounce_on_seg) &&
2879 	    ((raddr + psize) > sglinfo->si_segmask)) ||
2880 	    ((raddr < addrlo) || ((raddr + psize) > addrhi))) {
2881 		/*
2882 		 * Increase how much copy buffer we use. We always increase by
2883 		 * pagesize so we don't have to worry about converting offsets.
2884 		 * Set a flag in the cookies dmac_type to indicate that it uses
2885 		 * the copy buffer. If this isn't the last cookie, go to the
2886 		 * next cookie (since we separate each page which uses the copy
2887 		 * buffer in case the copy buffer is not physically contiguous.
2888 		 */
2889 		sglinfo->si_copybuf_req += MMU_PAGESIZE;
2890 		sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF;
2891 		if ((cnt + 1) < sglinfo->si_max_pages) {
2892 			cnt++;
2893 			sgl[cnt].dmac_laddress = 0;
2894 			sgl[cnt].dmac_size = 0;
2895 			sgl[cnt].dmac_type = 0;
2896 		}
2897 	}
2898 
2899 	/*
2900 	 * save this page's physical address so we can figure out if the next
2901 	 * page is physically contiguous. Keep decrementing size until we are
2902 	 * done with the buffer.
2903 	 */
2904 	last_page = raddr & MMU_PAGEMASK;
2905 	size -= psize;
2906 
2907 	while (size > 0) {
2908 		/* Get the size for this page (i.e. partial or full page) */
2909 		psize = MIN(size, MMU_PAGESIZE);
2910 
2911 		if (buftype == DMA_OTYP_PAGES) {
2912 			/* get the paddr from the page_t */
2913 			ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp));
2914 			paddr = pfn_to_pa(pp->p_pagenum);
2915 			pp = pp->p_next;
2916 		} else if (pplist != NULL) {
2917 			/* index into the array of page_t's to get the paddr */
2918 			ASSERT(!PP_ISFREE(pplist[pcnt]));
2919 			paddr = pfn_to_pa(pplist[pcnt]->p_pagenum);
2920 			pcnt++;
2921 		} else {
2922 			/* call into the VM to get the paddr */
2923 			paddr =  pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat,
2924 			    vaddr));
2925 			vaddr += psize;
2926 		}
2927 
2928 #ifdef __xpv
2929 		/*
2930 		 * If we're dom0, we're using a real device so we need to load
2931 		 * the cookies with MFNs instead of PFNs.
2932 		 */
2933 		raddr = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr);
2934 #else
2935 		raddr = paddr;
2936 #endif
2937 
2938 		/*
2939 		 * If we are using the copy buffer for anything over the
2940 		 * segment boundary, and this page is over the segment
2941 		 * boundary.
2942 		 *   OR
2943 		 * if the DMA engine can't reach the physical address.
2944 		 */
2945 		if (((sglinfo->si_bounce_on_seg) &&
2946 		    ((raddr + psize) > sglinfo->si_segmask)) ||
2947 		    ((raddr < addrlo) || ((raddr + psize) > addrhi))) {
2948 
2949 			sglinfo->si_copybuf_req += MMU_PAGESIZE;
2950 
2951 			/*
2952 			 * if there is something in the current cookie, go to
2953 			 * the next one. We only want one page in a cookie which
2954 			 * uses the copybuf since the copybuf doesn't have to
2955 			 * be physically contiguous.
2956 			 */
2957 			if (sgl[cnt].dmac_size != 0) {
2958 				cnt++;
2959 			}
2960 			sgl[cnt].dmac_laddress = raddr;
2961 			sgl[cnt].dmac_size = psize;
2962 #if defined(__amd64)
2963 			sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF;
2964 #else
2965 			/*
2966 			 * save the buf offset for 32-bit kernel. used in the
2967 			 * obsoleted interfaces.
2968 			 */
2969 			sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF |
2970 			    (dmar_object->dmao_size - size);
2971 #endif
2972 			/* if this isn't the last cookie, go to the next one */
2973 			if ((cnt + 1) < sglinfo->si_max_pages) {
2974 				cnt++;
2975 				sgl[cnt].dmac_laddress = 0;
2976 				sgl[cnt].dmac_size = 0;
2977 				sgl[cnt].dmac_type = 0;
2978 			}
2979 
2980 		/*
2981 		 * this page didn't need the copy buffer, if it's not physically
2982 		 * contiguous, or it would put us over a segment boundary, or it
2983 		 * puts us over the max cookie size, or the current sgl doesn't
2984 		 * have anything in it.
2985 		 */
2986 		} else if (((last_page + MMU_PAGESIZE) != raddr) ||
2987 		    !(raddr & sglinfo->si_segmask) ||
2988 		    ((sgl[cnt].dmac_size + psize) > maxseg) ||
2989 		    (sgl[cnt].dmac_size == 0)) {
2990 			/*
2991 			 * if we're not already in a new cookie, go to the next
2992 			 * cookie.
2993 			 */
2994 			if (sgl[cnt].dmac_size != 0) {
2995 				cnt++;
2996 			}
2997 
2998 			/* save the cookie information */
2999 			sgl[cnt].dmac_laddress = raddr;
3000 			sgl[cnt].dmac_size = psize;
3001 #if defined(__amd64)
3002 			sgl[cnt].dmac_type = 0;
3003 #else
3004 			/*
3005 			 * save the buf offset for 32-bit kernel. used in the
3006 			 * obsoleted interfaces.
3007 			 */
3008 			sgl[cnt].dmac_type = dmar_object->dmao_size - size;
3009 #endif
3010 
3011 		/*
3012 		 * this page didn't need the copy buffer, it is physically
3013 		 * contiguous with the last page, and it's <= the max cookie
3014 		 * size.
3015 		 */
3016 		} else {
3017 			sgl[cnt].dmac_size += psize;
3018 
3019 			/*
3020 			 * if this exactly ==  the maximum cookie size, and
3021 			 * it isn't the last cookie, go to the next cookie.
3022 			 */
3023 			if (((sgl[cnt].dmac_size + psize) == maxseg) &&
3024 			    ((cnt + 1) < sglinfo->si_max_pages)) {
3025 				cnt++;
3026 				sgl[cnt].dmac_laddress = 0;
3027 				sgl[cnt].dmac_size = 0;
3028 				sgl[cnt].dmac_type = 0;
3029 			}
3030 		}
3031 
3032 		/*
3033 		 * save this page's physical address so we can figure out if the
3034 		 * next page is physically contiguous. Keep decrementing size
3035 		 * until we are done with the buffer.
3036 		 */
3037 		last_page = raddr;
3038 		size -= psize;
3039 	}
3040 
3041 	/* we're done, save away how many cookies the sgl has */
3042 	if (sgl[cnt].dmac_size == 0) {
3043 		ASSERT(cnt < sglinfo->si_max_pages);
3044 		sglinfo->si_sgl_size = cnt;
3045 	} else {
3046 		sglinfo->si_sgl_size = cnt + 1;
3047 	}
3048 }
3049 
3050 /*
3051  * rootnex_bind_slowpath()
3052  *    Call in the bind path if the calling driver can't use the sgl without
3053  *    modifying it. We either need to use the copy buffer and/or we will end up
3054  *    with a partial bind.
3055  */
3056 static int
3057 rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq,
3058     rootnex_dma_t *dma, ddi_dma_attr_t *attr, int kmflag)
3059 {
3060 	rootnex_sglinfo_t *sinfo;
3061 	rootnex_window_t *window;
3062 	ddi_dma_cookie_t *cookie;
3063 	size_t copybuf_used;
3064 	size_t dmac_size;
3065 	boolean_t partial;
3066 	off_t cur_offset;
3067 	page_t *cur_pp;
3068 	major_t mnum;
3069 	int e;
3070 	int i;
3071 
3072 
3073 	sinfo = &dma->dp_sglinfo;
3074 	copybuf_used = 0;
3075 	partial = B_FALSE;
3076 
3077 	/*
3078 	 * If we're using the copybuf, set the copybuf state in dma struct.
3079 	 * Needs to be first since it sets the copy buffer size.
3080 	 */
3081 	if (sinfo->si_copybuf_req != 0) {
3082 		e = rootnex_setup_copybuf(hp, dmareq, dma, attr);
3083 		if (e != DDI_SUCCESS) {
3084 			return (e);
3085 		}
3086 	} else {
3087 		dma->dp_copybuf_size = 0;
3088 	}
3089 
3090 	/*
3091 	 * Figure out if we need to do a partial mapping. If so, figure out
3092 	 * if we need to trim the buffers when we munge the sgl.
3093 	 */
3094 	if ((dma->dp_copybuf_size < sinfo->si_copybuf_req) ||
3095 	    (dma->dp_dma.dmao_size > dma->dp_maxxfer) ||
3096 	    (attr->dma_attr_sgllen < sinfo->si_sgl_size)) {
3097 		dma->dp_partial_required = B_TRUE;
3098 		if (attr->dma_attr_granular != 1) {
3099 			dma->dp_trim_required = B_TRUE;
3100 		}
3101 	} else {
3102 		dma->dp_partial_required = B_FALSE;
3103 		dma->dp_trim_required = B_FALSE;
3104 	}
3105 
3106 	/* If we need to do a partial bind, make sure the driver supports it */
3107 	if (dma->dp_partial_required &&
3108 	    !(dmareq->dmar_flags & DDI_DMA_PARTIAL)) {
3109 
3110 		mnum = ddi_driver_major(dma->dp_dip);
3111 		/*
3112 		 * patchable which allows us to print one warning per major
3113 		 * number.
3114 		 */
3115 		if ((rootnex_bind_warn) &&
3116 		    ((rootnex_warn_list[mnum] & ROOTNEX_BIND_WARNING) == 0)) {
3117 			rootnex_warn_list[mnum] |= ROOTNEX_BIND_WARNING;
3118 			cmn_err(CE_WARN, "!%s: coding error detected, the "
3119 			    "driver is using ddi_dma_attr(9S) incorrectly. "
3120 			    "There is a small risk of data corruption in "
3121 			    "particular with large I/Os. The driver should be "
3122 			    "replaced with a corrected version for proper "
3123 			    "system operation. To disable this warning, add "
3124 			    "'set rootnex:rootnex_bind_warn=0' to "
3125 			    "/etc/system(4).", ddi_driver_name(dma->dp_dip));
3126 		}
3127 		return (DDI_DMA_TOOBIG);
3128 	}
3129 
3130 	/*
3131 	 * we might need multiple windows, setup state to handle them. In this
3132 	 * code path, we will have at least one window.
3133 	 */
3134 	e = rootnex_setup_windows(hp, dma, attr, kmflag);
3135 	if (e != DDI_SUCCESS) {
3136 		rootnex_teardown_copybuf(dma);
3137 		return (e);
3138 	}
3139 
3140 	window = &dma->dp_window[0];
3141 	cookie = &dma->dp_cookies[0];
3142 	cur_offset = 0;
3143 	rootnex_init_win(hp, dma, window, cookie, cur_offset);
3144 	if (dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) {
3145 		cur_pp = dmareq->dmar_object.dmao_obj.pp_obj.pp_pp;
3146 	}
3147 
3148 	/* loop though all the cookies we got back from get_sgl() */
3149 	for (i = 0; i < sinfo->si_sgl_size; i++) {
3150 		/*
3151 		 * If we're using the copy buffer, check this cookie and setup
3152 		 * its associated copy buffer state. If this cookie uses the
3153 		 * copy buffer, make sure we sync this window during dma_sync.
3154 		 */
3155 		if (dma->dp_copybuf_size > 0) {
3156 			rootnex_setup_cookie(&dmareq->dmar_object, dma, cookie,
3157 			    cur_offset, &copybuf_used, &cur_pp);
3158 			if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
3159 				window->wd_dosync = B_TRUE;
3160 			}
3161 		}
3162 
3163 		/*
3164 		 * save away the cookie size, since it could be modified in
3165 		 * the windowing code.
3166 		 */
3167 		dmac_size = cookie->dmac_size;
3168 
3169 		/* if we went over max copybuf size */
3170 		if (dma->dp_copybuf_size &&
3171 		    (copybuf_used > dma->dp_copybuf_size)) {
3172 			partial = B_TRUE;
3173 			e = rootnex_copybuf_window_boundary(hp, dma, &window,
3174 			    cookie, cur_offset, &copybuf_used);
3175 			if (e != DDI_SUCCESS) {
3176 				rootnex_teardown_copybuf(dma);
3177 				rootnex_teardown_windows(dma);
3178 				return (e);
3179 			}
3180 
3181 			/*
3182 			 * if the coookie uses the copy buffer, make sure the
3183 			 * new window we just moved to is set to sync.
3184 			 */
3185 			if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
3186 				window->wd_dosync = B_TRUE;
3187 			}
3188 			ROOTNEX_DPROBE1(rootnex__copybuf__window, dev_info_t *,
3189 			    dma->dp_dip);
3190 
3191 		/* if the cookie cnt == max sgllen, move to the next window */
3192 		} else if (window->wd_cookie_cnt >= attr->dma_attr_sgllen) {
3193 			partial = B_TRUE;
3194 			ASSERT(window->wd_cookie_cnt == attr->dma_attr_sgllen);
3195 			e = rootnex_sgllen_window_boundary(hp, dma, &window,
3196 			    cookie, attr, cur_offset);
3197 			if (e != DDI_SUCCESS) {
3198 				rootnex_teardown_copybuf(dma);
3199 				rootnex_teardown_windows(dma);
3200 				return (e);
3201 			}
3202 
3203 			/*
3204 			 * if the coookie uses the copy buffer, make sure the
3205 			 * new window we just moved to is set to sync.
3206 			 */
3207 			if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
3208 				window->wd_dosync = B_TRUE;
3209 			}
3210 			ROOTNEX_DPROBE1(rootnex__sgllen__window, dev_info_t *,
3211 			    dma->dp_dip);
3212 
3213 		/* else if we will be over maxxfer */
3214 		} else if ((window->wd_size + dmac_size) >
3215 		    dma->dp_maxxfer) {
3216 			partial = B_TRUE;
3217 			e = rootnex_maxxfer_window_boundary(hp, dma, &window,
3218 			    cookie);
3219 			if (e != DDI_SUCCESS) {
3220 				rootnex_teardown_copybuf(dma);
3221 				rootnex_teardown_windows(dma);
3222 				return (e);
3223 			}
3224 
3225 			/*
3226 			 * if the coookie uses the copy buffer, make sure the
3227 			 * new window we just moved to is set to sync.
3228 			 */
3229 			if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
3230 				window->wd_dosync = B_TRUE;
3231 			}
3232 			ROOTNEX_DPROBE1(rootnex__maxxfer__window, dev_info_t *,
3233 			    dma->dp_dip);
3234 
3235 		/* else this cookie fits in the current window */
3236 		} else {
3237 			window->wd_cookie_cnt++;
3238 			window->wd_size += dmac_size;
3239 		}
3240 
3241 		/* track our offset into the buffer, go to the next cookie */
3242 		ASSERT(dmac_size <= dma->dp_dma.dmao_size);
3243 		ASSERT(cookie->dmac_size <= dmac_size);
3244 		cur_offset += dmac_size;
3245 		cookie++;
3246 	}
3247 
3248 	/* if we ended up with a zero sized window in the end, clean it up */
3249 	if (window->wd_size == 0) {
3250 		hp->dmai_nwin--;
3251 		window--;
3252 	}
3253 
3254 	ASSERT(window->wd_trim.tr_trim_last == B_FALSE);
3255 
3256 	if (!partial) {
3257 		return (DDI_DMA_MAPPED);
3258 	}
3259 
3260 	ASSERT(dma->dp_partial_required);
3261 	return (DDI_DMA_PARTIAL_MAP);
3262 }
3263 
3264 
3265 /*
3266  * rootnex_setup_copybuf()
3267  *    Called in bind slowpath. Figures out if we're going to use the copy
3268  *    buffer, and if we do, sets up the basic state to handle it.
3269  */
3270 static int
3271 rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq,
3272     rootnex_dma_t *dma, ddi_dma_attr_t *attr)
3273 {
3274 	rootnex_sglinfo_t *sinfo;
3275 	ddi_dma_attr_t lattr;
3276 	size_t max_copybuf;
3277 	int cansleep;
3278 	int e;
3279 #if !defined(__amd64)
3280 	int vmflag;
3281 #endif
3282 
3283 
3284 	sinfo = &dma->dp_sglinfo;
3285 
3286 	/* read this first so it's consistent through the routine  */
3287 	max_copybuf = i_ddi_copybuf_size() & MMU_PAGEMASK;
3288 
3289 	/* We need to call into the rootnex on ddi_dma_sync() */
3290 	hp->dmai_rflags &= ~DMP_NOSYNC;
3291 
3292 	/* make sure the copybuf size <= the max size */
3293 	dma->dp_copybuf_size = MIN(sinfo->si_copybuf_req, max_copybuf);
3294 	ASSERT((dma->dp_copybuf_size & MMU_PAGEOFFSET) == 0);
3295 
3296 #if !defined(__amd64)
3297 	/*
3298 	 * if we don't have kva space to copy to/from, allocate the KVA space
3299 	 * now. We only do this for the 32-bit kernel. We use seg kpm space for
3300 	 * the 64-bit kernel.
3301 	 */
3302 	if ((dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) ||
3303 	    (dmareq->dmar_object.dmao_obj.virt_obj.v_as != NULL)) {
3304 
3305 		/* convert the sleep flags */
3306 		if (dmareq->dmar_fp == DDI_DMA_SLEEP) {
3307 			vmflag = VM_SLEEP;
3308 		} else {
3309 			vmflag = VM_NOSLEEP;
3310 		}
3311 
3312 		/* allocate Kernel VA space that we can bcopy to/from */
3313 		dma->dp_kva = vmem_alloc(heap_arena, dma->dp_copybuf_size,
3314 		    vmflag);
3315 		if (dma->dp_kva == NULL) {
3316 			return (DDI_DMA_NORESOURCES);
3317 		}
3318 	}
3319 #endif
3320 
3321 	/* convert the sleep flags */
3322 	if (dmareq->dmar_fp == DDI_DMA_SLEEP) {
3323 		cansleep = 1;
3324 	} else {
3325 		cansleep = 0;
3326 	}
3327 
3328 	/*
3329 	 * Allocate the actual copy buffer. This needs to fit within the DMA
3330 	 * engine limits, so we can't use kmem_alloc... We don't need
3331 	 * contiguous memory (sgllen) since we will be forcing windows on
3332 	 * sgllen anyway.
3333 	 */
3334 	lattr = *attr;
3335 	lattr.dma_attr_align = MMU_PAGESIZE;
3336 	/*
3337 	 * this should be < 0 to indicate no limit, but due to a bug in
3338 	 * the rootnex, we'll set it to the maximum positive int.
3339 	 */
3340 	lattr.dma_attr_sgllen = 0x7fffffff;
3341 	/*
3342 	 * if we're using the copy buffer because of seg, use that for our
3343 	 * upper address limit.
3344 	 */
3345 	if (sinfo->si_bounce_on_seg) {
3346 		lattr.dma_attr_addr_hi = lattr.dma_attr_seg;
3347 	}
3348 	e = i_ddi_mem_alloc(dma->dp_dip, &lattr, dma->dp_copybuf_size, cansleep,
3349 	    0, NULL, &dma->dp_cbaddr, &dma->dp_cbsize, NULL);
3350 	if (e != DDI_SUCCESS) {
3351 #if !defined(__amd64)
3352 		if (dma->dp_kva != NULL) {
3353 			vmem_free(heap_arena, dma->dp_kva,
3354 			    dma->dp_copybuf_size);
3355 		}
3356 #endif
3357 		return (DDI_DMA_NORESOURCES);
3358 	}
3359 
3360 	ROOTNEX_DPROBE2(rootnex__alloc__copybuf, dev_info_t *, dma->dp_dip,
3361 	    size_t, dma->dp_copybuf_size);
3362 
3363 	return (DDI_SUCCESS);
3364 }
3365 
3366 
3367 /*
3368  * rootnex_setup_windows()
3369  *    Called in bind slowpath to setup the window state. We always have windows
3370  *    in the slowpath. Even if the window count = 1.
3371  */
3372 static int
3373 rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma,
3374     ddi_dma_attr_t *attr, int kmflag)
3375 {
3376 	rootnex_window_t *windowp;
3377 	rootnex_sglinfo_t *sinfo;
3378 	size_t copy_state_size;
3379 	size_t win_state_size;
3380 	size_t state_available;
3381 	size_t space_needed;
3382 	uint_t copybuf_win;
3383 	uint_t maxxfer_win;
3384 	size_t space_used;
3385 	uint_t sglwin;
3386 
3387 
3388 	sinfo = &dma->dp_sglinfo;
3389 
3390 	dma->dp_current_win = 0;
3391 	hp->dmai_nwin = 0;
3392 
3393 	/* If we don't need to do a partial, we only have one window */
3394 	if (!dma->dp_partial_required) {
3395 		dma->dp_max_win = 1;
3396 
3397 	/*
3398 	 * we need multiple windows, need to figure out the worse case number
3399 	 * of windows.
3400 	 */
3401 	} else {
3402 		/*
3403 		 * if we need windows because we need more copy buffer that
3404 		 * we allow, the worse case number of windows we could need
3405 		 * here would be (copybuf space required / copybuf space that
3406 		 * we have) plus one for remainder, and plus 2 to handle the
3407 		 * extra pages on the trim for the first and last pages of the
3408 		 * buffer (a page is the minimum window size so under the right
3409 		 * attr settings, you could have a window for each page).
3410 		 * The last page will only be hit here if the size is not a
3411 		 * multiple of the granularity (which theoretically shouldn't
3412 		 * be the case but never has been enforced, so we could have
3413 		 * broken things without it).
3414 		 */
3415 		if (sinfo->si_copybuf_req > dma->dp_copybuf_size) {
3416 			ASSERT(dma->dp_copybuf_size > 0);
3417 			copybuf_win = (sinfo->si_copybuf_req /
3418 			    dma->dp_copybuf_size) + 1 + 2;
3419 		} else {
3420 			copybuf_win = 0;
3421 		}
3422 
3423 		/*
3424 		 * if we need windows because we have more cookies than the H/W
3425 		 * can handle, the number of windows we would need here would
3426 		 * be (cookie count / cookies count H/W supports minus 1[for
3427 		 * trim]) plus one for remainder.
3428 		 */
3429 		if (attr->dma_attr_sgllen < sinfo->si_sgl_size) {
3430 			sglwin = (sinfo->si_sgl_size /
3431 			    (attr->dma_attr_sgllen - 1)) + 1;
3432 		} else {
3433 			sglwin = 0;
3434 		}
3435 
3436 		/*
3437 		 * if we need windows because we're binding more memory than the
3438 		 * H/W can transfer at once, the number of windows we would need
3439 		 * here would be (xfer count / max xfer H/W supports) plus one
3440 		 * for remainder, and plus 2 to handle the extra pages on the
3441 		 * trim (see above comment about trim)
3442 		 */
3443 		if (dma->dp_dma.dmao_size > dma->dp_maxxfer) {
3444 			maxxfer_win = (dma->dp_dma.dmao_size /
3445 			    dma->dp_maxxfer) + 1 + 2;
3446 		} else {
3447 			maxxfer_win = 0;
3448 		}
3449 		dma->dp_max_win =  copybuf_win + sglwin + maxxfer_win;
3450 		ASSERT(dma->dp_max_win > 0);
3451 	}
3452 	win_state_size = dma->dp_max_win * sizeof (rootnex_window_t);
3453 
3454 	/*
3455 	 * Get space for window and potential copy buffer state. Before we
3456 	 * go and allocate memory, see if we can get away with using what's
3457 	 * left in the pre-allocted state or the dynamically allocated sgl.
3458 	 */
3459 	space_used = (uintptr_t)(sinfo->si_sgl_size *
3460 	    sizeof (ddi_dma_cookie_t));
3461 
3462 	/* if we dynamically allocated space for the cookies */
3463 	if (dma->dp_need_to_free_cookie) {
3464 		/* if we have more space in the pre-allocted buffer, use it */
3465 		ASSERT(space_used <= dma->dp_cookie_size);
3466 		if ((dma->dp_cookie_size - space_used) <=
3467 		    rootnex_state->r_prealloc_size) {
3468 			state_available = rootnex_state->r_prealloc_size;
3469 			windowp = (rootnex_window_t *)dma->dp_prealloc_buffer;
3470 
3471 		/*
3472 		 * else, we have more free space in the dynamically allocated
3473 		 * buffer, i.e. the buffer wasn't worse case fragmented so we
3474 		 * didn't need a lot of cookies.
3475 		 */
3476 		} else {
3477 			state_available = dma->dp_cookie_size - space_used;
3478 			windowp = (rootnex_window_t *)
3479 			    &dma->dp_cookies[sinfo->si_sgl_size];
3480 		}
3481 
3482 	/* we used the pre-alloced buffer */
3483 	} else {
3484 		ASSERT(space_used <= rootnex_state->r_prealloc_size);
3485 		state_available = rootnex_state->r_prealloc_size - space_used;
3486 		windowp = (rootnex_window_t *)
3487 		    &dma->dp_cookies[sinfo->si_sgl_size];
3488 	}
3489 
3490 	/*
3491 	 * figure out how much state we need to track the copy buffer. Add an
3492 	 * addition 8 bytes for pointer alignemnt later.
3493 	 */
3494 	if (dma->dp_copybuf_size > 0) {
3495 		copy_state_size = sinfo->si_max_pages *
3496 		    sizeof (rootnex_pgmap_t);
3497 	} else {
3498 		copy_state_size = 0;
3499 	}
3500 	/* add an additional 8 bytes for pointer alignment */
3501 	space_needed = win_state_size + copy_state_size + 0x8;
3502 
3503 	/* if we have enough space already, use it */
3504 	if (state_available >= space_needed) {
3505 		dma->dp_window = windowp;
3506 		dma->dp_need_to_free_window = B_FALSE;
3507 
3508 	/* not enough space, need to allocate more. */
3509 	} else {
3510 		dma->dp_window = kmem_alloc(space_needed, kmflag);
3511 		if (dma->dp_window == NULL) {
3512 			return (DDI_DMA_NORESOURCES);
3513 		}
3514 		dma->dp_need_to_free_window = B_TRUE;
3515 		dma->dp_window_size = space_needed;
3516 		ROOTNEX_DPROBE2(rootnex__bind__sp__alloc, dev_info_t *,
3517 		    dma->dp_dip, size_t, space_needed);
3518 	}
3519 
3520 	/*
3521 	 * we allocate copy buffer state and window state at the same time.
3522 	 * setup our copy buffer state pointers. Make sure it's aligned.
3523 	 */
3524 	if (dma->dp_copybuf_size > 0) {
3525 		dma->dp_pgmap = (rootnex_pgmap_t *)(((uintptr_t)
3526 		    &dma->dp_window[dma->dp_max_win] + 0x7) & ~0x7);
3527 
3528 #if !defined(__amd64)
3529 		/*
3530 		 * make sure all pm_mapped, pm_vaddr, and pm_pp are set to
3531 		 * false/NULL. Should be quicker to bzero vs loop and set.
3532 		 */
3533 		bzero(dma->dp_pgmap, copy_state_size);
3534 #endif
3535 	} else {
3536 		dma->dp_pgmap = NULL;
3537 	}
3538 
3539 	return (DDI_SUCCESS);
3540 }
3541 
3542 
3543 /*
3544  * rootnex_teardown_copybuf()
3545  *    cleans up after rootnex_setup_copybuf()
3546  */
3547 static void
3548 rootnex_teardown_copybuf(rootnex_dma_t *dma)
3549 {
3550 #if !defined(__amd64)
3551 	int i;
3552 
3553 	/*
3554 	 * if we allocated kernel heap VMEM space, go through all the pages and
3555 	 * map out any of the ones that we're mapped into the kernel heap VMEM
3556 	 * arena. Then free the VMEM space.
3557 	 */
3558 	if (dma->dp_kva != NULL) {
3559 		for (i = 0; i < dma->dp_sglinfo.si_max_pages; i++) {
3560 			if (dma->dp_pgmap[i].pm_mapped) {
3561 				hat_unload(kas.a_hat, dma->dp_pgmap[i].pm_kaddr,
3562 				    MMU_PAGESIZE, HAT_UNLOAD);
3563 				dma->dp_pgmap[i].pm_mapped = B_FALSE;
3564 			}
3565 		}
3566 
3567 		vmem_free(heap_arena, dma->dp_kva, dma->dp_copybuf_size);
3568 	}
3569 
3570 #endif
3571 
3572 	/* if we allocated a copy buffer, free it */
3573 	if (dma->dp_cbaddr != NULL) {
3574 		i_ddi_mem_free(dma->dp_cbaddr, NULL);
3575 	}
3576 }
3577 
3578 
3579 /*
3580  * rootnex_teardown_windows()
3581  *    cleans up after rootnex_setup_windows()
3582  */
3583 static void
3584 rootnex_teardown_windows(rootnex_dma_t *dma)
3585 {
3586 	/*
3587 	 * if we had to allocate window state on the last bind (because we
3588 	 * didn't have enough pre-allocated space in the handle), free it.
3589 	 */
3590 	if (dma->dp_need_to_free_window) {
3591 		kmem_free(dma->dp_window, dma->dp_window_size);
3592 	}
3593 }
3594 
3595 
3596 /*
3597  * rootnex_init_win()
3598  *    Called in bind slow path during creation of a new window. Initializes
3599  *    window state to default values.
3600  */
3601 /*ARGSUSED*/
3602 static void
3603 rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma,
3604     rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset)
3605 {
3606 	hp->dmai_nwin++;
3607 	window->wd_dosync = B_FALSE;
3608 	window->wd_offset = cur_offset;
3609 	window->wd_size = 0;
3610 	window->wd_first_cookie = cookie;
3611 	window->wd_cookie_cnt = 0;
3612 	window->wd_trim.tr_trim_first = B_FALSE;
3613 	window->wd_trim.tr_trim_last = B_FALSE;
3614 	window->wd_trim.tr_first_copybuf_win = B_FALSE;
3615 	window->wd_trim.tr_last_copybuf_win = B_FALSE;
3616 #if !defined(__amd64)
3617 	window->wd_remap_copybuf = dma->dp_cb_remaping;
3618 #endif
3619 }
3620 
3621 
3622 /*
3623  * rootnex_setup_cookie()
3624  *    Called in the bind slow path when the sgl uses the copy buffer. If any of
3625  *    the sgl uses the copy buffer, we need to go through each cookie, figure
3626  *    out if it uses the copy buffer, and if it does, save away everything we'll
3627  *    need during sync.
3628  */
3629 static void
3630 rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, rootnex_dma_t *dma,
3631     ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used,
3632     page_t **cur_pp)
3633 {
3634 	boolean_t copybuf_sz_power_2;
3635 	rootnex_sglinfo_t *sinfo;
3636 	paddr_t paddr;
3637 	uint_t pidx;
3638 	uint_t pcnt;
3639 	off_t poff;
3640 #if defined(__amd64)
3641 	pfn_t pfn;
3642 #else
3643 	page_t **pplist;
3644 #endif
3645 
3646 	sinfo = &dma->dp_sglinfo;
3647 
3648 	/*
3649 	 * Calculate the page index relative to the start of the buffer. The
3650 	 * index to the current page for our buffer is the offset into the
3651 	 * first page of the buffer plus our current offset into the buffer
3652 	 * itself, shifted of course...
3653 	 */
3654 	pidx = (sinfo->si_buf_offset + cur_offset) >> MMU_PAGESHIFT;
3655 	ASSERT(pidx < sinfo->si_max_pages);
3656 
3657 	/* if this cookie uses the copy buffer */
3658 	if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
3659 		/*
3660 		 * NOTE: we know that since this cookie uses the copy buffer, it
3661 		 * is <= MMU_PAGESIZE.
3662 		 */
3663 
3664 		/*
3665 		 * get the offset into the page. For the 64-bit kernel, get the
3666 		 * pfn which we'll use with seg kpm.
3667 		 */
3668 		poff = cookie->dmac_laddress & MMU_PAGEOFFSET;
3669 #if defined(__amd64)
3670 		/* mfn_to_pfn() is a NOP on i86pc */
3671 		pfn = mfn_to_pfn(cookie->dmac_laddress >> MMU_PAGESHIFT);
3672 #endif /* __amd64 */
3673 
3674 		/* figure out if the copybuf size is a power of 2 */
3675 		if (dma->dp_copybuf_size & (dma->dp_copybuf_size - 1)) {
3676 			copybuf_sz_power_2 = B_FALSE;
3677 		} else {
3678 			copybuf_sz_power_2 = B_TRUE;
3679 		}
3680 
3681 		/* This page uses the copy buffer */
3682 		dma->dp_pgmap[pidx].pm_uses_copybuf = B_TRUE;
3683 
3684 		/*
3685 		 * save the copy buffer KVA that we'll use with this page.
3686 		 * if we still fit within the copybuf, it's a simple add.
3687 		 * otherwise, we need to wrap over using & or % accordingly.
3688 		 */
3689 		if ((*copybuf_used + MMU_PAGESIZE) <= dma->dp_copybuf_size) {
3690 			dma->dp_pgmap[pidx].pm_cbaddr = dma->dp_cbaddr +
3691 			    *copybuf_used;
3692 		} else {
3693 			if (copybuf_sz_power_2) {
3694 				dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)(
3695 				    (uintptr_t)dma->dp_cbaddr +
3696 				    (*copybuf_used &
3697 				    (dma->dp_copybuf_size - 1)));
3698 			} else {
3699 				dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)(
3700 				    (uintptr_t)dma->dp_cbaddr +
3701 				    (*copybuf_used % dma->dp_copybuf_size));
3702 			}
3703 		}
3704 
3705 		/*
3706 		 * over write the cookie physical address with the address of
3707 		 * the physical address of the copy buffer page that we will
3708 		 * use.
3709 		 */
3710 		paddr = pfn_to_pa(hat_getpfnum(kas.a_hat,
3711 		    dma->dp_pgmap[pidx].pm_cbaddr)) + poff;
3712 
3713 #ifdef __xpv
3714 		/*
3715 		 * If we're dom0, we're using a real device so we need to load
3716 		 * the cookies with MAs instead of PAs.
3717 		 */
3718 		cookie->dmac_laddress = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr);
3719 #else
3720 		cookie->dmac_laddress = paddr;
3721 #endif
3722 
3723 		/* if we have a kernel VA, it's easy, just save that address */
3724 		if ((dmar_object->dmao_type != DMA_OTYP_PAGES) &&
3725 		    (sinfo->si_asp == &kas)) {
3726 			/*
3727 			 * save away the page aligned virtual address of the
3728 			 * driver buffer. Offsets are handled in the sync code.
3729 			 */
3730 			dma->dp_pgmap[pidx].pm_kaddr = (caddr_t)(((uintptr_t)
3731 			    dmar_object->dmao_obj.virt_obj.v_addr + cur_offset)
3732 			    & MMU_PAGEMASK);
3733 #if !defined(__amd64)
3734 			/*
3735 			 * we didn't need to, and will never need to map this
3736 			 * page.
3737 			 */
3738 			dma->dp_pgmap[pidx].pm_mapped = B_FALSE;
3739 #endif
3740 
3741 		/* we don't have a kernel VA. We need one for the bcopy. */
3742 		} else {
3743 #if defined(__amd64)
3744 			/*
3745 			 * for the 64-bit kernel, it's easy. We use seg kpm to
3746 			 * get a Kernel VA for the corresponding pfn.
3747 			 */
3748 			dma->dp_pgmap[pidx].pm_kaddr = hat_kpm_pfn2va(pfn);
3749 #else
3750 			/*
3751 			 * for the 32-bit kernel, this is a pain. First we'll
3752 			 * save away the page_t or user VA for this page. This
3753 			 * is needed in rootnex_dma_win() when we switch to a
3754 			 * new window which requires us to re-map the copy
3755 			 * buffer.
3756 			 */
3757 			pplist = dmar_object->dmao_obj.virt_obj.v_priv;
3758 			if (dmar_object->dmao_type == DMA_OTYP_PAGES) {
3759 				dma->dp_pgmap[pidx].pm_pp = *cur_pp;
3760 				dma->dp_pgmap[pidx].pm_vaddr = NULL;
3761 			} else if (pplist != NULL) {
3762 				dma->dp_pgmap[pidx].pm_pp = pplist[pidx];
3763 				dma->dp_pgmap[pidx].pm_vaddr = NULL;
3764 			} else {
3765 				dma->dp_pgmap[pidx].pm_pp = NULL;
3766 				dma->dp_pgmap[pidx].pm_vaddr = (caddr_t)
3767 				    (((uintptr_t)
3768 				    dmar_object->dmao_obj.virt_obj.v_addr +
3769 				    cur_offset) & MMU_PAGEMASK);
3770 			}
3771 
3772 			/*
3773 			 * save away the page aligned virtual address which was
3774 			 * allocated from the kernel heap arena (taking into
3775 			 * account if we need more copy buffer than we alloced
3776 			 * and use multiple windows to handle this, i.e. &,%).
3777 			 * NOTE: there isn't and physical memory backing up this
3778 			 * virtual address space currently.
3779 			 */
3780 			if ((*copybuf_used + MMU_PAGESIZE) <=
3781 			    dma->dp_copybuf_size) {
3782 				dma->dp_pgmap[pidx].pm_kaddr = (caddr_t)
3783 				    (((uintptr_t)dma->dp_kva + *copybuf_used) &
3784 				    MMU_PAGEMASK);
3785 			} else {
3786 				if (copybuf_sz_power_2) {
3787 					dma->dp_pgmap[pidx].pm_kaddr = (caddr_t)
3788 					    (((uintptr_t)dma->dp_kva +
3789 					    (*copybuf_used &
3790 					    (dma->dp_copybuf_size - 1))) &
3791 					    MMU_PAGEMASK);
3792 				} else {
3793 					dma->dp_pgmap[pidx].pm_kaddr = (caddr_t)
3794 					    (((uintptr_t)dma->dp_kva +
3795 					    (*copybuf_used %
3796 					    dma->dp_copybuf_size)) &
3797 					    MMU_PAGEMASK);
3798 				}
3799 			}
3800 
3801 			/*
3802 			 * if we haven't used up the available copy buffer yet,
3803 			 * map the kva to the physical page.
3804 			 */
3805 			if (!dma->dp_cb_remaping && ((*copybuf_used +
3806 			    MMU_PAGESIZE) <= dma->dp_copybuf_size)) {
3807 				dma->dp_pgmap[pidx].pm_mapped = B_TRUE;
3808 				if (dma->dp_pgmap[pidx].pm_pp != NULL) {
3809 					i86_pp_map(dma->dp_pgmap[pidx].pm_pp,
3810 					    dma->dp_pgmap[pidx].pm_kaddr);
3811 				} else {
3812 					i86_va_map(dma->dp_pgmap[pidx].pm_vaddr,
3813 					    sinfo->si_asp,
3814 					    dma->dp_pgmap[pidx].pm_kaddr);
3815 				}
3816 
3817 			/*
3818 			 * we've used up the available copy buffer, this page
3819 			 * will have to be mapped during rootnex_dma_win() when
3820 			 * we switch to a new window which requires a re-map
3821 			 * the copy buffer. (32-bit kernel only)
3822 			 */
3823 			} else {
3824 				dma->dp_pgmap[pidx].pm_mapped = B_FALSE;
3825 			}
3826 #endif
3827 			/* go to the next page_t */
3828 			if (dmar_object->dmao_type == DMA_OTYP_PAGES) {
3829 				*cur_pp = (*cur_pp)->p_next;
3830 			}
3831 		}
3832 
3833 		/* add to the copy buffer count */
3834 		*copybuf_used += MMU_PAGESIZE;
3835 
3836 	/*
3837 	 * This cookie doesn't use the copy buffer. Walk through the pages this
3838 	 * cookie occupies to reflect this.
3839 	 */
3840 	} else {
3841 		/*
3842 		 * figure out how many pages the cookie occupies. We need to
3843 		 * use the original page offset of the buffer and the cookies
3844 		 * offset in the buffer to do this.
3845 		 */
3846 		poff = (sinfo->si_buf_offset + cur_offset) & MMU_PAGEOFFSET;
3847 		pcnt = mmu_btopr(cookie->dmac_size + poff);
3848 
3849 		while (pcnt > 0) {
3850 #if !defined(__amd64)
3851 			/*
3852 			 * the 32-bit kernel doesn't have seg kpm, so we need
3853 			 * to map in the driver buffer (if it didn't come down
3854 			 * with a kernel VA) on the fly. Since this page doesn't
3855 			 * use the copy buffer, it's not, or will it ever, have
3856 			 * to be mapped in.
3857 			 */
3858 			dma->dp_pgmap[pidx].pm_mapped = B_FALSE;
3859 #endif
3860 			dma->dp_pgmap[pidx].pm_uses_copybuf = B_FALSE;
3861 
3862 			/*
3863 			 * we need to update pidx and cur_pp or we'll loose
3864 			 * track of where we are.
3865 			 */
3866 			if (dmar_object->dmao_type == DMA_OTYP_PAGES) {
3867 				*cur_pp = (*cur_pp)->p_next;
3868 			}
3869 			pidx++;
3870 			pcnt--;
3871 		}
3872 	}
3873 }
3874 
3875 
3876 /*
3877  * rootnex_sgllen_window_boundary()
3878  *    Called in the bind slow path when the next cookie causes us to exceed (in
3879  *    this case == since we start at 0 and sgllen starts at 1) the maximum sgl
3880  *    length supported by the DMA H/W.
3881  */
3882 static int
3883 rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma,
3884     rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, ddi_dma_attr_t *attr,
3885     off_t cur_offset)
3886 {
3887 	off_t new_offset;
3888 	size_t trim_sz;
3889 	off_t coffset;
3890 
3891 
3892 	/*
3893 	 * if we know we'll never have to trim, it's pretty easy. Just move to
3894 	 * the next window and init it. We're done.
3895 	 */
3896 	if (!dma->dp_trim_required) {
3897 		(*windowp)++;
3898 		rootnex_init_win(hp, dma, *windowp, cookie, cur_offset);
3899 		(*windowp)->wd_cookie_cnt++;
3900 		(*windowp)->wd_size = cookie->dmac_size;
3901 		return (DDI_SUCCESS);
3902 	}
3903 
3904 	/* figure out how much we need to trim from the window */
3905 	ASSERT(attr->dma_attr_granular != 0);
3906 	if (dma->dp_granularity_power_2) {
3907 		trim_sz = (*windowp)->wd_size & (attr->dma_attr_granular - 1);
3908 	} else {
3909 		trim_sz = (*windowp)->wd_size % attr->dma_attr_granular;
3910 	}
3911 
3912 	/* The window's a whole multiple of granularity. We're done */
3913 	if (trim_sz == 0) {
3914 		(*windowp)++;
3915 		rootnex_init_win(hp, dma, *windowp, cookie, cur_offset);
3916 		(*windowp)->wd_cookie_cnt++;
3917 		(*windowp)->wd_size = cookie->dmac_size;
3918 		return (DDI_SUCCESS);
3919 	}
3920 
3921 	/*
3922 	 * The window's not a whole multiple of granularity, since we know this
3923 	 * is due to the sgllen, we need to go back to the last cookie and trim
3924 	 * that one, add the left over part of the old cookie into the new
3925 	 * window, and then add in the new cookie into the new window.
3926 	 */
3927 
3928 	/*
3929 	 * make sure the driver isn't making us do something bad... Trimming and
3930 	 * sgllen == 1 don't go together.
3931 	 */
3932 	if (attr->dma_attr_sgllen == 1) {
3933 		return (DDI_DMA_NOMAPPING);
3934 	}
3935 
3936 	/*
3937 	 * first, setup the current window to account for the trim. Need to go
3938 	 * back to the last cookie for this.
3939 	 */
3940 	cookie--;
3941 	(*windowp)->wd_trim.tr_trim_last = B_TRUE;
3942 	(*windowp)->wd_trim.tr_last_cookie = cookie;
3943 	(*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress;
3944 	ASSERT(cookie->dmac_size > trim_sz);
3945 	(*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz;
3946 	(*windowp)->wd_size -= trim_sz;
3947 
3948 	/* save the buffer offsets for the next window */
3949 	coffset = cookie->dmac_size - trim_sz;
3950 	new_offset = (*windowp)->wd_offset + (*windowp)->wd_size;
3951 
3952 	/*
3953 	 * set this now in case this is the first window. all other cases are
3954 	 * set in dma_win()
3955 	 */
3956 	cookie->dmac_size = (*windowp)->wd_trim.tr_last_size;
3957 
3958 	/*
3959 	 * initialize the next window using what's left over in the previous
3960 	 * cookie.
3961 	 */
3962 	(*windowp)++;
3963 	rootnex_init_win(hp, dma, *windowp, cookie, new_offset);
3964 	(*windowp)->wd_cookie_cnt++;
3965 	(*windowp)->wd_trim.tr_trim_first = B_TRUE;
3966 	(*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + coffset;
3967 	(*windowp)->wd_trim.tr_first_size = trim_sz;
3968 	if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
3969 		(*windowp)->wd_dosync = B_TRUE;
3970 	}
3971 
3972 	/*
3973 	 * now go back to the current cookie and add it to the new window. set
3974 	 * the new window size to the what was left over from the previous
3975 	 * cookie and what's in the current cookie.
3976 	 */
3977 	cookie++;
3978 	(*windowp)->wd_cookie_cnt++;
3979 	(*windowp)->wd_size = trim_sz + cookie->dmac_size;
3980 
3981 	/*
3982 	 * trim plus the next cookie could put us over maxxfer (a cookie can be
3983 	 * a max size of maxxfer). Handle that case.
3984 	 */
3985 	if ((*windowp)->wd_size > dma->dp_maxxfer) {
3986 		/*
3987 		 * maxxfer is already a whole multiple of granularity, and this
3988 		 * trim will be <= the previous trim (since a cookie can't be
3989 		 * larger than maxxfer). Make things simple here.
3990 		 */
3991 		trim_sz = (*windowp)->wd_size - dma->dp_maxxfer;
3992 		(*windowp)->wd_trim.tr_trim_last = B_TRUE;
3993 		(*windowp)->wd_trim.tr_last_cookie = cookie;
3994 		(*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress;
3995 		(*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz;
3996 		(*windowp)->wd_size -= trim_sz;
3997 		ASSERT((*windowp)->wd_size == dma->dp_maxxfer);
3998 
3999 		/* save the buffer offsets for the next window */
4000 		coffset = cookie->dmac_size - trim_sz;
4001 		new_offset = (*windowp)->wd_offset + (*windowp)->wd_size;
4002 
4003 		/* setup the next window */
4004 		(*windowp)++;
4005 		rootnex_init_win(hp, dma, *windowp, cookie, new_offset);
4006 		(*windowp)->wd_cookie_cnt++;
4007 		(*windowp)->wd_trim.tr_trim_first = B_TRUE;
4008 		(*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress +
4009 		    coffset;
4010 		(*windowp)->wd_trim.tr_first_size = trim_sz;
4011 	}
4012 
4013 	return (DDI_SUCCESS);
4014 }
4015 
4016 
4017 /*
4018  * rootnex_copybuf_window_boundary()
4019  *    Called in bind slowpath when we get to a window boundary because we used
4020  *    up all the copy buffer that we have.
4021  */
4022 static int
4023 rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma,
4024     rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, off_t cur_offset,
4025     size_t *copybuf_used)
4026 {
4027 	rootnex_sglinfo_t *sinfo;
4028 	off_t new_offset;
4029 	size_t trim_sz;
4030 	paddr_t paddr;
4031 	off_t coffset;
4032 	uint_t pidx;
4033 	off_t poff;
4034 
4035 
4036 	sinfo = &dma->dp_sglinfo;
4037 
4038 	/*
4039 	 * the copy buffer should be a whole multiple of page size. We know that
4040 	 * this cookie is <= MMU_PAGESIZE.
4041 	 */
4042 	ASSERT(cookie->dmac_size <= MMU_PAGESIZE);
4043 
4044 	/*
4045 	 * from now on, all new windows in this bind need to be re-mapped during
4046 	 * ddi_dma_getwin() (32-bit kernel only). i.e. we ran out out copybuf
4047 	 * space...
4048 	 */
4049 #if !defined(__amd64)
4050 	dma->dp_cb_remaping = B_TRUE;
4051 #endif
4052 
4053 	/* reset copybuf used */
4054 	*copybuf_used = 0;
4055 
4056 	/*
4057 	 * if we don't have to trim (since granularity is set to 1), go to the
4058 	 * next window and add the current cookie to it. We know the current
4059 	 * cookie uses the copy buffer since we're in this code path.
4060 	 */
4061 	if (!dma->dp_trim_required) {
4062 		(*windowp)++;
4063 		rootnex_init_win(hp, dma, *windowp, cookie, cur_offset);
4064 
4065 		/* Add this cookie to the new window */
4066 		(*windowp)->wd_cookie_cnt++;
4067 		(*windowp)->wd_size += cookie->dmac_size;
4068 		*copybuf_used += MMU_PAGESIZE;
4069 		return (DDI_SUCCESS);
4070 	}
4071 
4072 	/*
4073 	 * *** may need to trim, figure it out.
4074 	 */
4075 
4076 	/* figure out how much we need to trim from the window */
4077 	if (dma->dp_granularity_power_2) {
4078 		trim_sz = (*windowp)->wd_size &
4079 		    (hp->dmai_attr.dma_attr_granular - 1);
4080 	} else {
4081 		trim_sz = (*windowp)->wd_size % hp->dmai_attr.dma_attr_granular;
4082 	}
4083 
4084 	/*
4085 	 * if the window's a whole multiple of granularity, go to the next
4086 	 * window, init it, then add in the current cookie. We know the current
4087 	 * cookie uses the copy buffer since we're in this code path.
4088 	 */
4089 	if (trim_sz == 0) {
4090 		(*windowp)++;
4091 		rootnex_init_win(hp, dma, *windowp, cookie, cur_offset);
4092 
4093 		/* Add this cookie to the new window */
4094 		(*windowp)->wd_cookie_cnt++;
4095 		(*windowp)->wd_size += cookie->dmac_size;
4096 		*copybuf_used += MMU_PAGESIZE;
4097 		return (DDI_SUCCESS);
4098 	}
4099 
4100 	/*
4101 	 * *** We figured it out, we definitly need to trim
4102 	 */
4103 
4104 	/*
4105 	 * make sure the driver isn't making us do something bad...
4106 	 * Trimming and sgllen == 1 don't go together.
4107 	 */
4108 	if (hp->dmai_attr.dma_attr_sgllen == 1) {
4109 		return (DDI_DMA_NOMAPPING);
4110 	}
4111 
4112 	/*
4113 	 * first, setup the current window to account for the trim. Need to go
4114 	 * back to the last cookie for this. Some of the last cookie will be in
4115 	 * the current window, and some of the last cookie will be in the new
4116 	 * window. All of the current cookie will be in the new window.
4117 	 */
4118 	cookie--;
4119 	(*windowp)->wd_trim.tr_trim_last = B_TRUE;
4120 	(*windowp)->wd_trim.tr_last_cookie = cookie;
4121 	(*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress;
4122 	ASSERT(cookie->dmac_size > trim_sz);
4123 	(*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz;
4124 	(*windowp)->wd_size -= trim_sz;
4125 
4126 	/*
4127 	 * we're trimming the last cookie (not the current cookie). So that
4128 	 * last cookie may have or may not have been using the copy buffer (
4129 	 * we know the cookie passed in uses the copy buffer since we're in
4130 	 * this code path).
4131 	 *
4132 	 * If the last cookie doesn't use the copy buffer, nothing special to
4133 	 * do. However, if it does uses the copy buffer, it will be both the
4134 	 * last page in the current window and the first page in the next
4135 	 * window. Since we are reusing the copy buffer (and KVA space on the
4136 	 * 32-bit kernel), this page will use the end of the copy buffer in the
4137 	 * current window, and the start of the copy buffer in the next window.
4138 	 * Track that info... The cookie physical address was already set to
4139 	 * the copy buffer physical address in setup_cookie..
4140 	 */
4141 	if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
4142 		pidx = (sinfo->si_buf_offset + (*windowp)->wd_offset +
4143 		    (*windowp)->wd_size) >> MMU_PAGESHIFT;
4144 		(*windowp)->wd_trim.tr_last_copybuf_win = B_TRUE;
4145 		(*windowp)->wd_trim.tr_last_pidx = pidx;
4146 		(*windowp)->wd_trim.tr_last_cbaddr =
4147 		    dma->dp_pgmap[pidx].pm_cbaddr;
4148 #if !defined(__amd64)
4149 		(*windowp)->wd_trim.tr_last_kaddr =
4150 		    dma->dp_pgmap[pidx].pm_kaddr;
4151 #endif
4152 	}
4153 
4154 	/* save the buffer offsets for the next window */
4155 	coffset = cookie->dmac_size - trim_sz;
4156 	new_offset = (*windowp)->wd_offset + (*windowp)->wd_size;
4157 
4158 	/*
4159 	 * set this now in case this is the first window. all other cases are
4160 	 * set in dma_win()
4161 	 */
4162 	cookie->dmac_size = (*windowp)->wd_trim.tr_last_size;
4163 
4164 	/*
4165 	 * initialize the next window using what's left over in the previous
4166 	 * cookie.
4167 	 */
4168 	(*windowp)++;
4169 	rootnex_init_win(hp, dma, *windowp, cookie, new_offset);
4170 	(*windowp)->wd_cookie_cnt++;
4171 	(*windowp)->wd_trim.tr_trim_first = B_TRUE;
4172 	(*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + coffset;
4173 	(*windowp)->wd_trim.tr_first_size = trim_sz;
4174 
4175 	/*
4176 	 * again, we're tracking if the last cookie uses the copy buffer.
4177 	 * read the comment above for more info on why we need to track
4178 	 * additional state.
4179 	 *
4180 	 * For the first cookie in the new window, we need reset the physical
4181 	 * address to DMA into to the start of the copy buffer plus any
4182 	 * initial page offset which may be present.
4183 	 */
4184 	if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
4185 		(*windowp)->wd_dosync = B_TRUE;
4186 		(*windowp)->wd_trim.tr_first_copybuf_win = B_TRUE;
4187 		(*windowp)->wd_trim.tr_first_pidx = pidx;
4188 		(*windowp)->wd_trim.tr_first_cbaddr = dma->dp_cbaddr;
4189 		poff = (*windowp)->wd_trim.tr_first_paddr & MMU_PAGEOFFSET;
4190 
4191 		paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, dma->dp_cbaddr)) +
4192 		    poff;
4193 #ifdef __xpv
4194 		/*
4195 		 * If we're dom0, we're using a real device so we need to load
4196 		 * the cookies with MAs instead of PAs.
4197 		 */
4198 		(*windowp)->wd_trim.tr_first_paddr =
4199 		    ROOTNEX_PADDR_TO_RBASE(xen_info, paddr);
4200 #else
4201 		(*windowp)->wd_trim.tr_first_paddr = paddr;
4202 #endif
4203 
4204 #if !defined(__amd64)
4205 		(*windowp)->wd_trim.tr_first_kaddr = dma->dp_kva;
4206 #endif
4207 		/* account for the cookie copybuf usage in the new window */
4208 		*copybuf_used += MMU_PAGESIZE;
4209 
4210 		/*
4211 		 * every piece of code has to have a hack, and here is this
4212 		 * ones :-)
4213 		 *
4214 		 * There is a complex interaction between setup_cookie and the
4215 		 * copybuf window boundary. The complexity had to be in either
4216 		 * the maxxfer window, or the copybuf window, and I chose the
4217 		 * copybuf code.
4218 		 *
4219 		 * So in this code path, we have taken the last cookie,
4220 		 * virtually broken it in half due to the trim, and it happens
4221 		 * to use the copybuf which further complicates life. At the
4222 		 * same time, we have already setup the current cookie, which
4223 		 * is now wrong. More background info: the current cookie uses
4224 		 * the copybuf, so it is only a page long max. So we need to
4225 		 * fix the current cookies copy buffer address, physical
4226 		 * address, and kva for the 32-bit kernel. We due this by
4227 		 * bumping them by page size (of course, we can't due this on
4228 		 * the physical address since the copy buffer may not be
4229 		 * physically contiguous).
4230 		 */
4231 		cookie++;
4232 		dma->dp_pgmap[pidx + 1].pm_cbaddr += MMU_PAGESIZE;
4233 		poff = cookie->dmac_laddress & MMU_PAGEOFFSET;
4234 
4235 		paddr = pfn_to_pa(hat_getpfnum(kas.a_hat,
4236 		    dma->dp_pgmap[pidx + 1].pm_cbaddr)) + poff;
4237 #ifdef __xpv
4238 		/*
4239 		 * If we're dom0, we're using a real device so we need to load
4240 		 * the cookies with MAs instead of PAs.
4241 		 */
4242 		cookie->dmac_laddress = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr);
4243 #else
4244 		cookie->dmac_laddress = paddr;
4245 #endif
4246 
4247 #if !defined(__amd64)
4248 		ASSERT(dma->dp_pgmap[pidx + 1].pm_mapped == B_FALSE);
4249 		dma->dp_pgmap[pidx + 1].pm_kaddr += MMU_PAGESIZE;
4250 #endif
4251 	} else {
4252 		/* go back to the current cookie */
4253 		cookie++;
4254 	}
4255 
4256 	/*
4257 	 * add the current cookie to the new window. set the new window size to
4258 	 * the what was left over from the previous cookie and what's in the
4259 	 * current cookie.
4260 	 */
4261 	(*windowp)->wd_cookie_cnt++;
4262 	(*windowp)->wd_size = trim_sz + cookie->dmac_size;
4263 	ASSERT((*windowp)->wd_size < dma->dp_maxxfer);
4264 
4265 	/*
4266 	 * we know that the cookie passed in always uses the copy buffer. We
4267 	 * wouldn't be here if it didn't.
4268 	 */
4269 	*copybuf_used += MMU_PAGESIZE;
4270 
4271 	return (DDI_SUCCESS);
4272 }
4273 
4274 
4275 /*
4276  * rootnex_maxxfer_window_boundary()
4277  *    Called in bind slowpath when we get to a window boundary because we will
4278  *    go over maxxfer.
4279  */
4280 static int
4281 rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma,
4282     rootnex_window_t **windowp, ddi_dma_cookie_t *cookie)
4283 {
4284 	size_t dmac_size;
4285 	off_t new_offset;
4286 	size_t trim_sz;
4287 	off_t coffset;
4288 
4289 
4290 	/*
4291 	 * calculate how much we have to trim off of the current cookie to equal
4292 	 * maxxfer. We don't have to account for granularity here since our
4293 	 * maxxfer already takes that into account.
4294 	 */
4295 	trim_sz = ((*windowp)->wd_size + cookie->dmac_size) - dma->dp_maxxfer;
4296 	ASSERT(trim_sz <= cookie->dmac_size);
4297 	ASSERT(trim_sz <= dma->dp_maxxfer);
4298 
4299 	/* save cookie size since we need it later and we might change it */
4300 	dmac_size = cookie->dmac_size;
4301 
4302 	/*
4303 	 * if we're not trimming the entire cookie, setup the current window to
4304 	 * account for the trim.
4305 	 */
4306 	if (trim_sz < cookie->dmac_size) {
4307 		(*windowp)->wd_cookie_cnt++;
4308 		(*windowp)->wd_trim.tr_trim_last = B_TRUE;
4309 		(*windowp)->wd_trim.tr_last_cookie = cookie;
4310 		(*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress;
4311 		(*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz;
4312 		(*windowp)->wd_size = dma->dp_maxxfer;
4313 
4314 		/*
4315 		 * set the adjusted cookie size now in case this is the first
4316 		 * window. All other windows are taken care of in get win
4317 		 */
4318 		cookie->dmac_size = (*windowp)->wd_trim.tr_last_size;
4319 	}
4320 
4321 	/*
4322 	 * coffset is the current offset within the cookie, new_offset is the
4323 	 * current offset with the entire buffer.
4324 	 */
4325 	coffset = dmac_size - trim_sz;
4326 	new_offset = (*windowp)->wd_offset + (*windowp)->wd_size;
4327 
4328 	/* initialize the next window */
4329 	(*windowp)++;
4330 	rootnex_init_win(hp, dma, *windowp, cookie, new_offset);
4331 	(*windowp)->wd_cookie_cnt++;
4332 	(*windowp)->wd_size = trim_sz;
4333 	if (trim_sz < dmac_size) {
4334 		(*windowp)->wd_trim.tr_trim_first = B_TRUE;
4335 		(*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress +
4336 		    coffset;
4337 		(*windowp)->wd_trim.tr_first_size = trim_sz;
4338 	}
4339 
4340 	return (DDI_SUCCESS);
4341 }
4342 
4343 
4344 /*ARGSUSED*/
4345 static int
4346 rootnex_coredma_sync(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle,
4347     off_t off, size_t len, uint_t cache_flags)
4348 {
4349 	rootnex_sglinfo_t *sinfo;
4350 	rootnex_pgmap_t *cbpage;
4351 	rootnex_window_t *win;
4352 	ddi_dma_impl_t *hp;
4353 	rootnex_dma_t *dma;
4354 	caddr_t fromaddr;
4355 	caddr_t toaddr;
4356 	uint_t psize;
4357 	off_t offset;
4358 	uint_t pidx;
4359 	size_t size;
4360 	off_t poff;
4361 	int e;
4362 
4363 
4364 	hp = (ddi_dma_impl_t *)handle;
4365 	dma = (rootnex_dma_t *)hp->dmai_private;
4366 	sinfo = &dma->dp_sglinfo;
4367 
4368 	/*
4369 	 * if we don't have any windows, we don't need to sync. A copybuf
4370 	 * will cause us to have at least one window.
4371 	 */
4372 	if (dma->dp_window == NULL) {
4373 		return (DDI_SUCCESS);
4374 	}
4375 
4376 	/* This window may not need to be sync'd */
4377 	win = &dma->dp_window[dma->dp_current_win];
4378 	if (!win->wd_dosync) {
4379 		return (DDI_SUCCESS);
4380 	}
4381 
4382 	/* handle off and len special cases */
4383 	if ((off == 0) || (rootnex_sync_ignore_params)) {
4384 		offset = win->wd_offset;
4385 	} else {
4386 		offset = off;
4387 	}
4388 	if ((len == 0) || (rootnex_sync_ignore_params)) {
4389 		size = win->wd_size;
4390 	} else {
4391 		size = len;
4392 	}
4393 
4394 	/* check the sync args to make sure they make a little sense */
4395 	if (rootnex_sync_check_parms) {
4396 		e = rootnex_valid_sync_parms(hp, win, offset, size,
4397 		    cache_flags);
4398 		if (e != DDI_SUCCESS) {
4399 			ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_SYNC_FAIL]);
4400 			return (DDI_FAILURE);
4401 		}
4402 	}
4403 
4404 	/*
4405 	 * special case the first page to handle the offset into the page. The
4406 	 * offset to the current page for our buffer is the offset into the
4407 	 * first page of the buffer plus our current offset into the buffer
4408 	 * itself, masked of course.
4409 	 */
4410 	poff = (sinfo->si_buf_offset + offset) & MMU_PAGEOFFSET;
4411 	psize = MIN((MMU_PAGESIZE - poff), size);
4412 
4413 	/* go through all the pages that we want to sync */
4414 	while (size > 0) {
4415 		/*
4416 		 * Calculate the page index relative to the start of the buffer.
4417 		 * The index to the current page for our buffer is the offset
4418 		 * into the first page of the buffer plus our current offset
4419 		 * into the buffer itself, shifted of course...
4420 		 */
4421 		pidx = (sinfo->si_buf_offset + offset) >> MMU_PAGESHIFT;
4422 		ASSERT(pidx < sinfo->si_max_pages);
4423 
4424 		/*
4425 		 * if this page uses the copy buffer, we need to sync it,
4426 		 * otherwise, go on to the next page.
4427 		 */
4428 		cbpage = &dma->dp_pgmap[pidx];
4429 		ASSERT((cbpage->pm_uses_copybuf == B_TRUE) ||
4430 		    (cbpage->pm_uses_copybuf == B_FALSE));
4431 		if (cbpage->pm_uses_copybuf) {
4432 			/* cbaddr and kaddr should be page aligned */
4433 			ASSERT(((uintptr_t)cbpage->pm_cbaddr &
4434 			    MMU_PAGEOFFSET) == 0);
4435 			ASSERT(((uintptr_t)cbpage->pm_kaddr &
4436 			    MMU_PAGEOFFSET) == 0);
4437 
4438 			/*
4439 			 * if we're copying for the device, we are going to
4440 			 * copy from the drivers buffer and to the rootnex
4441 			 * allocated copy buffer.
4442 			 */
4443 			if (cache_flags == DDI_DMA_SYNC_FORDEV) {
4444 				fromaddr = cbpage->pm_kaddr + poff;
4445 				toaddr = cbpage->pm_cbaddr + poff;
4446 				ROOTNEX_DPROBE2(rootnex__sync__dev,
4447 				    dev_info_t *, dma->dp_dip, size_t, psize);
4448 
4449 			/*
4450 			 * if we're copying for the cpu/kernel, we are going to
4451 			 * copy from the rootnex allocated copy buffer to the
4452 			 * drivers buffer.
4453 			 */
4454 			} else {
4455 				fromaddr = cbpage->pm_cbaddr + poff;
4456 				toaddr = cbpage->pm_kaddr + poff;
4457 				ROOTNEX_DPROBE2(rootnex__sync__cpu,
4458 				    dev_info_t *, dma->dp_dip, size_t, psize);
4459 			}
4460 
4461 			bcopy(fromaddr, toaddr, psize);
4462 		}
4463 
4464 		/*
4465 		 * decrement size until we're done, update our offset into the
4466 		 * buffer, and get the next page size.
4467 		 */
4468 		size -= psize;
4469 		offset += psize;
4470 		psize = MIN(MMU_PAGESIZE, size);
4471 
4472 		/* page offset is zero for the rest of this loop */
4473 		poff = 0;
4474 	}
4475 
4476 	return (DDI_SUCCESS);
4477 }
4478 
4479 /*
4480  * rootnex_dma_sync()
4481  *    called from ddi_dma_sync() if DMP_NOSYNC is not set in hp->dmai_rflags.
4482  *    We set DMP_NOSYNC if we're not using the copy buffer. If DMP_NOSYNC
4483  *    is set, ddi_dma_sync() returns immediately passing back success.
4484  */
4485 /*ARGSUSED*/
4486 static int
4487 rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle,
4488     off_t off, size_t len, uint_t cache_flags)
4489 {
4490 #if defined(__amd64) && !defined(__xpv)
4491 	if (IOMMU_USED(rdip)) {
4492 		return (iommulib_nexdma_sync(dip, rdip, handle, off, len,
4493 		    cache_flags));
4494 	}
4495 #endif
4496 	return (rootnex_coredma_sync(dip, rdip, handle, off, len,
4497 	    cache_flags));
4498 }
4499 
4500 /*
4501  * rootnex_valid_sync_parms()
4502  *    checks the parameters passed to sync to verify they are correct.
4503  */
4504 static int
4505 rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win,
4506     off_t offset, size_t size, uint_t cache_flags)
4507 {
4508 	off_t woffset;
4509 
4510 
4511 	/*
4512 	 * the first part of the test to make sure the offset passed in is
4513 	 * within the window.
4514 	 */
4515 	if (offset < win->wd_offset) {
4516 		return (DDI_FAILURE);
4517 	}
4518 
4519 	/*
4520 	 * second and last part of the test to make sure the offset and length
4521 	 * passed in is within the window.
4522 	 */
4523 	woffset = offset - win->wd_offset;
4524 	if ((woffset + size) > win->wd_size) {
4525 		return (DDI_FAILURE);
4526 	}
4527 
4528 	/*
4529 	 * if we are sync'ing for the device, the DDI_DMA_WRITE flag should
4530 	 * be set too.
4531 	 */
4532 	if ((cache_flags == DDI_DMA_SYNC_FORDEV) &&
4533 	    (hp->dmai_rflags & DDI_DMA_WRITE)) {
4534 		return (DDI_SUCCESS);
4535 	}
4536 
4537 	/*
4538 	 * at this point, either DDI_DMA_SYNC_FORCPU or DDI_DMA_SYNC_FORKERNEL
4539 	 * should be set. Also DDI_DMA_READ should be set in the flags.
4540 	 */
4541 	if (((cache_flags == DDI_DMA_SYNC_FORCPU) ||
4542 	    (cache_flags == DDI_DMA_SYNC_FORKERNEL)) &&
4543 	    (hp->dmai_rflags & DDI_DMA_READ)) {
4544 		return (DDI_SUCCESS);
4545 	}
4546 
4547 	return (DDI_FAILURE);
4548 }
4549 
4550 
4551 /*ARGSUSED*/
4552 static int
4553 rootnex_coredma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle,
4554     uint_t win, off_t *offp, size_t *lenp, ddi_dma_cookie_t *cookiep,
4555     uint_t *ccountp)
4556 {
4557 	rootnex_window_t *window;
4558 	rootnex_trim_t *trim;
4559 	ddi_dma_impl_t *hp;
4560 	rootnex_dma_t *dma;
4561 #if !defined(__amd64)
4562 	rootnex_sglinfo_t *sinfo;
4563 	rootnex_pgmap_t *pmap;
4564 	uint_t pidx;
4565 	uint_t pcnt;
4566 	off_t poff;
4567 	int i;
4568 #endif
4569 
4570 
4571 	hp = (ddi_dma_impl_t *)handle;
4572 	dma = (rootnex_dma_t *)hp->dmai_private;
4573 #if !defined(__amd64)
4574 	sinfo = &dma->dp_sglinfo;
4575 #endif
4576 
4577 	/* If we try and get a window which doesn't exist, return failure */
4578 	if (win >= hp->dmai_nwin) {
4579 		ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]);
4580 		return (DDI_FAILURE);
4581 	}
4582 
4583 	/*
4584 	 * if we don't have any windows, and they're asking for the first
4585 	 * window, setup the cookie pointer to the first cookie in the bind.
4586 	 * setup our return values, then increment the cookie since we return
4587 	 * the first cookie on the stack.
4588 	 */
4589 	if (dma->dp_window == NULL) {
4590 		if (win != 0) {
4591 			ROOTNEX_DPROF_INC(
4592 			    &rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]);
4593 			return (DDI_FAILURE);
4594 		}
4595 		hp->dmai_cookie = dma->dp_cookies;
4596 		*offp = 0;
4597 		*lenp = dma->dp_dma.dmao_size;
4598 		*ccountp = dma->dp_sglinfo.si_sgl_size;
4599 		*cookiep = hp->dmai_cookie[0];
4600 		hp->dmai_cookie++;
4601 		return (DDI_SUCCESS);
4602 	}
4603 
4604 	/* sync the old window before moving on to the new one */
4605 	window = &dma->dp_window[dma->dp_current_win];
4606 	if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_READ)) {
4607 		(void) rootnex_coredma_sync(dip, rdip, handle, 0, 0,
4608 		    DDI_DMA_SYNC_FORCPU);
4609 	}
4610 
4611 #if !defined(__amd64)
4612 	/*
4613 	 * before we move to the next window, if we need to re-map, unmap all
4614 	 * the pages in this window.
4615 	 */
4616 	if (dma->dp_cb_remaping) {
4617 		/*
4618 		 * If we switch to this window again, we'll need to map in
4619 		 * on the fly next time.
4620 		 */
4621 		window->wd_remap_copybuf = B_TRUE;
4622 
4623 		/*
4624 		 * calculate the page index into the buffer where this window
4625 		 * starts, and the number of pages this window takes up.
4626 		 */
4627 		pidx = (sinfo->si_buf_offset + window->wd_offset) >>
4628 		    MMU_PAGESHIFT;
4629 		poff = (sinfo->si_buf_offset + window->wd_offset) &
4630 		    MMU_PAGEOFFSET;
4631 		pcnt = mmu_btopr(window->wd_size + poff);
4632 		ASSERT((pidx + pcnt) <= sinfo->si_max_pages);
4633 
4634 		/* unmap pages which are currently mapped in this window */
4635 		for (i = 0; i < pcnt; i++) {
4636 			if (dma->dp_pgmap[pidx].pm_mapped) {
4637 				hat_unload(kas.a_hat,
4638 				    dma->dp_pgmap[pidx].pm_kaddr, MMU_PAGESIZE,
4639 				    HAT_UNLOAD);
4640 				dma->dp_pgmap[pidx].pm_mapped = B_FALSE;
4641 			}
4642 			pidx++;
4643 		}
4644 	}
4645 #endif
4646 
4647 	/*
4648 	 * Move to the new window.
4649 	 * NOTE: current_win must be set for sync to work right
4650 	 */
4651 	dma->dp_current_win = win;
4652 	window = &dma->dp_window[win];
4653 
4654 	/* if needed, adjust the first and/or last cookies for trim */
4655 	trim = &window->wd_trim;
4656 	if (trim->tr_trim_first) {
4657 		window->wd_first_cookie->dmac_laddress = trim->tr_first_paddr;
4658 		window->wd_first_cookie->dmac_size = trim->tr_first_size;
4659 #if !defined(__amd64)
4660 		window->wd_first_cookie->dmac_type =
4661 		    (window->wd_first_cookie->dmac_type &
4662 		    ROOTNEX_USES_COPYBUF) + window->wd_offset;
4663 #endif
4664 		if (trim->tr_first_copybuf_win) {
4665 			dma->dp_pgmap[trim->tr_first_pidx].pm_cbaddr =
4666 			    trim->tr_first_cbaddr;
4667 #if !defined(__amd64)
4668 			dma->dp_pgmap[trim->tr_first_pidx].pm_kaddr =
4669 			    trim->tr_first_kaddr;
4670 #endif
4671 		}
4672 	}
4673 	if (trim->tr_trim_last) {
4674 		trim->tr_last_cookie->dmac_laddress = trim->tr_last_paddr;
4675 		trim->tr_last_cookie->dmac_size = trim->tr_last_size;
4676 		if (trim->tr_last_copybuf_win) {
4677 			dma->dp_pgmap[trim->tr_last_pidx].pm_cbaddr =
4678 			    trim->tr_last_cbaddr;
4679 #if !defined(__amd64)
4680 			dma->dp_pgmap[trim->tr_last_pidx].pm_kaddr =
4681 			    trim->tr_last_kaddr;
4682 #endif
4683 		}
4684 	}
4685 
4686 	/*
4687 	 * setup the cookie pointer to the first cookie in the window. setup
4688 	 * our return values, then increment the cookie since we return the
4689 	 * first cookie on the stack.
4690 	 */
4691 	hp->dmai_cookie = window->wd_first_cookie;
4692 	*offp = window->wd_offset;
4693 	*lenp = window->wd_size;
4694 	*ccountp = window->wd_cookie_cnt;
4695 	*cookiep = hp->dmai_cookie[0];
4696 	hp->dmai_cookie++;
4697 
4698 #if !defined(__amd64)
4699 	/* re-map copybuf if required for this window */
4700 	if (dma->dp_cb_remaping) {
4701 		/*
4702 		 * calculate the page index into the buffer where this
4703 		 * window starts.
4704 		 */
4705 		pidx = (sinfo->si_buf_offset + window->wd_offset) >>
4706 		    MMU_PAGESHIFT;
4707 		ASSERT(pidx < sinfo->si_max_pages);
4708 
4709 		/*
4710 		 * the first page can get unmapped if it's shared with the
4711 		 * previous window. Even if the rest of this window is already
4712 		 * mapped in, we need to still check this one.
4713 		 */
4714 		pmap = &dma->dp_pgmap[pidx];
4715 		if ((pmap->pm_uses_copybuf) && (pmap->pm_mapped == B_FALSE)) {
4716 			if (pmap->pm_pp != NULL) {
4717 				pmap->pm_mapped = B_TRUE;
4718 				i86_pp_map(pmap->pm_pp, pmap->pm_kaddr);
4719 			} else if (pmap->pm_vaddr != NULL) {
4720 				pmap->pm_mapped = B_TRUE;
4721 				i86_va_map(pmap->pm_vaddr, sinfo->si_asp,
4722 				    pmap->pm_kaddr);
4723 			}
4724 		}
4725 		pidx++;
4726 
4727 		/* map in the rest of the pages if required */
4728 		if (window->wd_remap_copybuf) {
4729 			window->wd_remap_copybuf = B_FALSE;
4730 
4731 			/* figure out many pages this window takes up */
4732 			poff = (sinfo->si_buf_offset + window->wd_offset) &
4733 			    MMU_PAGEOFFSET;
4734 			pcnt = mmu_btopr(window->wd_size + poff);
4735 			ASSERT(((pidx - 1) + pcnt) <= sinfo->si_max_pages);
4736 
4737 			/* map pages which require it */
4738 			for (i = 1; i < pcnt; i++) {
4739 				pmap = &dma->dp_pgmap[pidx];
4740 				if (pmap->pm_uses_copybuf) {
4741 					ASSERT(pmap->pm_mapped == B_FALSE);
4742 					if (pmap->pm_pp != NULL) {
4743 						pmap->pm_mapped = B_TRUE;
4744 						i86_pp_map(pmap->pm_pp,
4745 						    pmap->pm_kaddr);
4746 					} else if (pmap->pm_vaddr != NULL) {
4747 						pmap->pm_mapped = B_TRUE;
4748 						i86_va_map(pmap->pm_vaddr,
4749 						    sinfo->si_asp,
4750 						    pmap->pm_kaddr);
4751 					}
4752 				}
4753 				pidx++;
4754 			}
4755 		}
4756 	}
4757 #endif
4758 
4759 	/* if the new window uses the copy buffer, sync it for the device */
4760 	if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_WRITE)) {
4761 		(void) rootnex_coredma_sync(dip, rdip, handle, 0, 0,
4762 		    DDI_DMA_SYNC_FORDEV);
4763 	}
4764 
4765 	return (DDI_SUCCESS);
4766 }
4767 
4768 /*
4769  * rootnex_dma_win()
4770  *    called from ddi_dma_getwin()
4771  */
4772 /*ARGSUSED*/
4773 static int
4774 rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle,
4775     uint_t win, off_t *offp, size_t *lenp, ddi_dma_cookie_t *cookiep,
4776     uint_t *ccountp)
4777 {
4778 #if defined(__amd64) && !defined(__xpv)
4779 	if (IOMMU_USED(rdip)) {
4780 		return (iommulib_nexdma_win(dip, rdip, handle, win, offp, lenp,
4781 		    cookiep, ccountp));
4782 	}
4783 #endif
4784 
4785 	return (rootnex_coredma_win(dip, rdip, handle, win, offp, lenp,
4786 	    cookiep, ccountp));
4787 }
4788 
4789 /*
4790  * ************************
4791  *  obsoleted dma routines
4792  * ************************
4793  */
4794 
4795 /*
4796  * rootnex_dma_map()
4797  *    called from ddi_dma_setup()
4798  * NO IOMMU in 32 bit mode. The below routines doesn't work in 64 bit mode.
4799  */
4800 /* ARGSUSED */
4801 static int
4802 rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip,
4803     struct ddi_dma_req *dmareq, ddi_dma_handle_t *handlep)
4804 {
4805 #if defined(__amd64)
4806 	/*
4807 	 * this interface is not supported in 64-bit x86 kernel. See comment in
4808 	 * rootnex_dma_mctl()
4809 	 */
4810 	return (DDI_DMA_NORESOURCES);
4811 
4812 #else /* 32-bit x86 kernel */
4813 	ddi_dma_handle_t *lhandlep;
4814 	ddi_dma_handle_t lhandle;
4815 	ddi_dma_cookie_t cookie;
4816 	ddi_dma_attr_t dma_attr;
4817 	ddi_dma_lim_t *dma_lim;
4818 	uint_t ccnt;
4819 	int e;
4820 
4821 
4822 	/*
4823 	 * if the driver is just testing to see if it's possible to do the bind,
4824 	 * we'll use local state. Otherwise, use the handle pointer passed in.
4825 	 */
4826 	if (handlep == NULL) {
4827 		lhandlep = &lhandle;
4828 	} else {
4829 		lhandlep = handlep;
4830 	}
4831 
4832 	/* convert the limit structure to a dma_attr one */
4833 	dma_lim = dmareq->dmar_limits;
4834 	dma_attr.dma_attr_version = DMA_ATTR_V0;
4835 	dma_attr.dma_attr_addr_lo = dma_lim->dlim_addr_lo;
4836 	dma_attr.dma_attr_addr_hi = dma_lim->dlim_addr_hi;
4837 	dma_attr.dma_attr_minxfer = dma_lim->dlim_minxfer;
4838 	dma_attr.dma_attr_seg = dma_lim->dlim_adreg_max;
4839 	dma_attr.dma_attr_count_max = dma_lim->dlim_ctreg_max;
4840 	dma_attr.dma_attr_granular = dma_lim->dlim_granular;
4841 	dma_attr.dma_attr_sgllen = dma_lim->dlim_sgllen;
4842 	dma_attr.dma_attr_maxxfer = dma_lim->dlim_reqsize;
4843 	dma_attr.dma_attr_burstsizes = dma_lim->dlim_burstsizes;
4844 	dma_attr.dma_attr_align = MMU_PAGESIZE;
4845 	dma_attr.dma_attr_flags = 0;
4846 
4847 	e = rootnex_dma_allochdl(dip, rdip, &dma_attr, dmareq->dmar_fp,
4848 	    dmareq->dmar_arg, lhandlep);
4849 	if (e != DDI_SUCCESS) {
4850 		return (e);
4851 	}
4852 
4853 	e = rootnex_dma_bindhdl(dip, rdip, *lhandlep, dmareq, &cookie, &ccnt);
4854 	if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) {
4855 		(void) rootnex_dma_freehdl(dip, rdip, *lhandlep);
4856 		return (e);
4857 	}
4858 
4859 	/*
4860 	 * if the driver is just testing to see if it's possible to do the bind,
4861 	 * free up the local state and return the result.
4862 	 */
4863 	if (handlep == NULL) {
4864 		(void) rootnex_dma_unbindhdl(dip, rdip, *lhandlep);
4865 		(void) rootnex_dma_freehdl(dip, rdip, *lhandlep);
4866 		if (e == DDI_DMA_MAPPED) {
4867 			return (DDI_DMA_MAPOK);
4868 		} else {
4869 			return (DDI_DMA_NOMAPPING);
4870 		}
4871 	}
4872 
4873 	return (e);
4874 #endif /* defined(__amd64) */
4875 }
4876 
4877 /*
4878  * rootnex_dma_mctl()
4879  *
4880  * No IOMMU in 32 bit mode. The below routine doesn't work in 64 bit mode.
4881  */
4882 /* ARGSUSED */
4883 static int
4884 rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle,
4885     enum ddi_dma_ctlops request, off_t *offp, size_t *lenp, caddr_t *objpp,
4886     uint_t cache_flags)
4887 {
4888 #if defined(__amd64)
4889 	/*
4890 	 * DDI_DMA_SMEM_ALLOC & DDI_DMA_IOPB_ALLOC we're changed to have a
4891 	 * common implementation in genunix, so they no longer have x86
4892 	 * specific functionality which called into dma_ctl.
4893 	 *
4894 	 * The rest of the obsoleted interfaces were never supported in the
4895 	 * 64-bit x86 kernel. For s10, the obsoleted DDI_DMA_SEGTOC interface
4896 	 * was not ported to the x86 64-bit kernel do to serious x86 rootnex
4897 	 * implementation issues.
4898 	 *
4899 	 * If you can't use DDI_DMA_SEGTOC; DDI_DMA_NEXTSEG, DDI_DMA_FREE, and
4900 	 * DDI_DMA_NEXTWIN are useless since you can get to the cookie, so we
4901 	 * reflect that now too...
4902 	 *
4903 	 * Even though we fixed the pointer problem in DDI_DMA_SEGTOC, we are
4904 	 * not going to put this functionality into the 64-bit x86 kernel now.
4905 	 * It wasn't ported to the 64-bit kernel for s10, no reason to change
4906 	 * that in a future release.
4907 	 */
4908 	return (DDI_FAILURE);
4909 
4910 #else /* 32-bit x86 kernel */
4911 	ddi_dma_cookie_t lcookie;
4912 	ddi_dma_cookie_t *cookie;
4913 	rootnex_window_t *window;
4914 	ddi_dma_impl_t *hp;
4915 	rootnex_dma_t *dma;
4916 	uint_t nwin;
4917 	uint_t ccnt;
4918 	size_t len;
4919 	off_t off;
4920 	int e;
4921 
4922 
4923 	/*
4924 	 * DDI_DMA_SEGTOC, DDI_DMA_NEXTSEG, and DDI_DMA_NEXTWIN are a little
4925 	 * hacky since were optimizing for the current interfaces and so we can
4926 	 * cleanup the mess in genunix. Hopefully we will remove the this
4927 	 * obsoleted routines someday soon.
4928 	 */
4929 
4930 	switch (request) {
4931 
4932 	case DDI_DMA_SEGTOC: /* ddi_dma_segtocookie() */
4933 		hp = (ddi_dma_impl_t *)handle;
4934 		cookie = (ddi_dma_cookie_t *)objpp;
4935 
4936 		/*
4937 		 * convert segment to cookie. We don't distinguish between the
4938 		 * two :-)
4939 		 */
4940 		*cookie = *hp->dmai_cookie;
4941 		*lenp = cookie->dmac_size;
4942 		*offp = cookie->dmac_type & ~ROOTNEX_USES_COPYBUF;
4943 		return (DDI_SUCCESS);
4944 
4945 	case DDI_DMA_NEXTSEG: /* ddi_dma_nextseg() */
4946 		hp = (ddi_dma_impl_t *)handle;
4947 		dma = (rootnex_dma_t *)hp->dmai_private;
4948 
4949 		if ((*lenp != NULL) && ((uintptr_t)*lenp != (uintptr_t)hp)) {
4950 			return (DDI_DMA_STALE);
4951 		}
4952 
4953 		/* handle the case where we don't have any windows */
4954 		if (dma->dp_window == NULL) {
4955 			/*
4956 			 * if seg == NULL, and we don't have any windows,
4957 			 * return the first cookie in the sgl.
4958 			 */
4959 			if (*lenp == NULL) {
4960 				dma->dp_current_cookie = 0;
4961 				hp->dmai_cookie = dma->dp_cookies;
4962 				*objpp = (caddr_t)handle;
4963 				return (DDI_SUCCESS);
4964 
4965 			/* if we have more cookies, go to the next cookie */
4966 			} else {
4967 				if ((dma->dp_current_cookie + 1) >=
4968 				    dma->dp_sglinfo.si_sgl_size) {
4969 					return (DDI_DMA_DONE);
4970 				}
4971 				dma->dp_current_cookie++;
4972 				hp->dmai_cookie++;
4973 				return (DDI_SUCCESS);
4974 			}
4975 		}
4976 
4977 		/* We have one or more windows */
4978 		window = &dma->dp_window[dma->dp_current_win];
4979 
4980 		/*
4981 		 * if seg == NULL, return the first cookie in the current
4982 		 * window
4983 		 */
4984 		if (*lenp == NULL) {
4985 			dma->dp_current_cookie = 0;
4986 			hp->dmai_cookie = window->wd_first_cookie;
4987 
4988 		/*
4989 		 * go to the next cookie in the window then see if we done with
4990 		 * this window.
4991 		 */
4992 		} else {
4993 			if ((dma->dp_current_cookie + 1) >=
4994 			    window->wd_cookie_cnt) {
4995 				return (DDI_DMA_DONE);
4996 			}
4997 			dma->dp_current_cookie++;
4998 			hp->dmai_cookie++;
4999 		}
5000 		*objpp = (caddr_t)handle;
5001 		return (DDI_SUCCESS);
5002 
5003 	case DDI_DMA_NEXTWIN: /* ddi_dma_nextwin() */
5004 		hp = (ddi_dma_impl_t *)handle;
5005 		dma = (rootnex_dma_t *)hp->dmai_private;
5006 
5007 		if ((*offp != NULL) && ((uintptr_t)*offp != (uintptr_t)hp)) {
5008 			return (DDI_DMA_STALE);
5009 		}
5010 
5011 		/* if win == NULL, return the first window in the bind */
5012 		if (*offp == NULL) {
5013 			nwin = 0;
5014 
5015 		/*
5016 		 * else, go to the next window then see if we're done with all
5017 		 * the windows.
5018 		 */
5019 		} else {
5020 			nwin = dma->dp_current_win + 1;
5021 			if (nwin >= hp->dmai_nwin) {
5022 				return (DDI_DMA_DONE);
5023 			}
5024 		}
5025 
5026 		/* switch to the next window */
5027 		e = rootnex_dma_win(dip, rdip, handle, nwin, &off, &len,
5028 		    &lcookie, &ccnt);
5029 		ASSERT(e == DDI_SUCCESS);
5030 		if (e != DDI_SUCCESS) {
5031 			return (DDI_DMA_STALE);
5032 		}
5033 
5034 		/* reset the cookie back to the first cookie in the window */
5035 		if (dma->dp_window != NULL) {
5036 			window = &dma->dp_window[dma->dp_current_win];
5037 			hp->dmai_cookie = window->wd_first_cookie;
5038 		} else {
5039 			hp->dmai_cookie = dma->dp_cookies;
5040 		}
5041 
5042 		*objpp = (caddr_t)handle;
5043 		return (DDI_SUCCESS);
5044 
5045 	case DDI_DMA_FREE: /* ddi_dma_free() */
5046 		(void) rootnex_dma_unbindhdl(dip, rdip, handle);
5047 		(void) rootnex_dma_freehdl(dip, rdip, handle);
5048 		if (rootnex_state->r_dvma_call_list_id) {
5049 			ddi_run_callback(&rootnex_state->r_dvma_call_list_id);
5050 		}
5051 		return (DDI_SUCCESS);
5052 
5053 	case DDI_DMA_IOPB_ALLOC:	/* get contiguous DMA-able memory */
5054 	case DDI_DMA_SMEM_ALLOC:	/* get contiguous DMA-able memory */
5055 		/* should never get here, handled in genunix */
5056 		ASSERT(0);
5057 		return (DDI_FAILURE);
5058 
5059 	case DDI_DMA_KVADDR:
5060 	case DDI_DMA_GETERR:
5061 	case DDI_DMA_COFF:
5062 		return (DDI_FAILURE);
5063 	}
5064 
5065 	return (DDI_FAILURE);
5066 #endif /* defined(__amd64) */
5067 }
5068 
5069 /*
5070  * *********
5071  *  FMA Code
5072  * *********
5073  */
5074 
5075 /*
5076  * rootnex_fm_init()
5077  *    FMA init busop
5078  */
5079 /* ARGSUSED */
5080 static int
5081 rootnex_fm_init(dev_info_t *dip, dev_info_t *tdip, int tcap,
5082     ddi_iblock_cookie_t *ibc)
5083 {
5084 	*ibc = rootnex_state->r_err_ibc;
5085 
5086 	return (ddi_system_fmcap);
5087 }
5088 
5089 /*
5090  * rootnex_dma_check()
5091  *    Function called after a dma fault occurred to find out whether the
5092  *    fault address is associated with a driver that is able to handle faults
5093  *    and recover from faults.
5094  */
5095 /* ARGSUSED */
5096 static int
5097 rootnex_dma_check(dev_info_t *dip, const void *handle, const void *addr,
5098     const void *not_used)
5099 {
5100 	rootnex_window_t *window;
5101 	uint64_t start_addr;
5102 	uint64_t fault_addr;
5103 	ddi_dma_impl_t *hp;
5104 	rootnex_dma_t *dma;
5105 	uint64_t end_addr;
5106 	size_t csize;
5107 	int i;
5108 	int j;
5109 
5110 
5111 	/* The driver has to set DDI_DMA_FLAGERR to recover from dma faults */
5112 	hp = (ddi_dma_impl_t *)handle;
5113 	ASSERT(hp);
5114 
5115 	dma = (rootnex_dma_t *)hp->dmai_private;
5116 
5117 	/* Get the address that we need to search for */
5118 	fault_addr = *(uint64_t *)addr;
5119 
5120 	/*
5121 	 * if we don't have any windows, we can just walk through all the
5122 	 * cookies.
5123 	 */
5124 	if (dma->dp_window == NULL) {
5125 		/* for each cookie */
5126 		for (i = 0; i < dma->dp_sglinfo.si_sgl_size; i++) {
5127 			/*
5128 			 * if the faulted address is within the physical address
5129 			 * range of the cookie, return DDI_FM_NONFATAL.
5130 			 */
5131 			if ((fault_addr >= dma->dp_cookies[i].dmac_laddress) &&
5132 			    (fault_addr <= (dma->dp_cookies[i].dmac_laddress +
5133 			    dma->dp_cookies[i].dmac_size))) {
5134 				return (DDI_FM_NONFATAL);
5135 			}
5136 		}
5137 
5138 		/* fault_addr not within this DMA handle */
5139 		return (DDI_FM_UNKNOWN);
5140 	}
5141 
5142 	/* we have mutiple windows, walk through each window */
5143 	for (i = 0; i < hp->dmai_nwin; i++) {
5144 		window = &dma->dp_window[i];
5145 
5146 		/* Go through all the cookies in the window */
5147 		for (j = 0; j < window->wd_cookie_cnt; j++) {
5148 
5149 			start_addr = window->wd_first_cookie[j].dmac_laddress;
5150 			csize = window->wd_first_cookie[j].dmac_size;
5151 
5152 			/*
5153 			 * if we are trimming the first cookie in the window,
5154 			 * and this is the first cookie, adjust the start
5155 			 * address and size of the cookie to account for the
5156 			 * trim.
5157 			 */
5158 			if (window->wd_trim.tr_trim_first && (j == 0)) {
5159 				start_addr = window->wd_trim.tr_first_paddr;
5160 				csize = window->wd_trim.tr_first_size;
5161 			}
5162 
5163 			/*
5164 			 * if we are trimming the last cookie in the window,
5165 			 * and this is the last cookie, adjust the start
5166 			 * address and size of the cookie to account for the
5167 			 * trim.
5168 			 */
5169 			if (window->wd_trim.tr_trim_last &&
5170 			    (j == (window->wd_cookie_cnt - 1))) {
5171 				start_addr = window->wd_trim.tr_last_paddr;
5172 				csize = window->wd_trim.tr_last_size;
5173 			}
5174 
5175 			end_addr = start_addr + csize;
5176 
5177 			/*
5178 			 * if the faulted address is within the physical
5179 			 * address of the cookie, return DDI_FM_NONFATAL.
5180 			 */
5181 			if ((fault_addr >= start_addr) &&
5182 			    (fault_addr <= end_addr)) {
5183 				return (DDI_FM_NONFATAL);
5184 			}
5185 		}
5186 	}
5187 
5188 	/* fault_addr not within this DMA handle */
5189 	return (DDI_FM_UNKNOWN);
5190 }
5191 
5192 /*ARGSUSED*/
5193 static int
5194 rootnex_quiesce(dev_info_t *dip)
5195 {
5196 #if defined(__amd64) && !defined(__xpv)
5197 	return (immu_quiesce());
5198 #else
5199 	return (DDI_SUCCESS);
5200 #endif
5201 }
5202 
5203 #if defined(__xpv)
5204 void
5205 immu_init(void)
5206 {
5207 	;
5208 }
5209 
5210 void
5211 immu_startup(void)
5212 {
5213 	;
5214 }
5215 /*ARGSUSED*/
5216 void
5217 immu_physmem_update(uint64_t addr, uint64_t size)
5218 {
5219 	;
5220 }
5221 #endif
5222