1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright (c) 1992, 2010, Oracle and/or its affiliates. All rights reserved. 23 */ 24 /* 25 * Copyright 2011 Nexenta Systems, Inc. All rights reserved. 26 * Copyright (c) 2011 Bayard G. Bell. All rights reserved. 27 * Copyright 2012 Garrett D'Amore <garrett@damore.org>. All rights reserved. 28 * Copyright 2017 Joyent, Inc. 29 */ 30 31 /* 32 * x86 root nexus driver 33 */ 34 35 #include <sys/sysmacros.h> 36 #include <sys/conf.h> 37 #include <sys/autoconf.h> 38 #include <sys/sysmacros.h> 39 #include <sys/debug.h> 40 #include <sys/psw.h> 41 #include <sys/ddidmareq.h> 42 #include <sys/promif.h> 43 #include <sys/devops.h> 44 #include <sys/kmem.h> 45 #include <sys/cmn_err.h> 46 #include <vm/seg.h> 47 #include <vm/seg_kmem.h> 48 #include <vm/seg_dev.h> 49 #include <sys/vmem.h> 50 #include <sys/mman.h> 51 #include <vm/hat.h> 52 #include <vm/as.h> 53 #include <vm/page.h> 54 #include <sys/avintr.h> 55 #include <sys/errno.h> 56 #include <sys/modctl.h> 57 #include <sys/ddi_impldefs.h> 58 #include <sys/sunddi.h> 59 #include <sys/sunndi.h> 60 #include <sys/mach_intr.h> 61 #include <sys/psm.h> 62 #include <sys/ontrap.h> 63 #include <sys/atomic.h> 64 #include <sys/sdt.h> 65 #include <sys/rootnex.h> 66 #include <vm/hat_i86.h> 67 #include <sys/ddifm.h> 68 #include <sys/ddi_isa.h> 69 #include <sys/apic.h> 70 71 #ifdef __xpv 72 #include <sys/bootinfo.h> 73 #include <sys/hypervisor.h> 74 #include <sys/bootconf.h> 75 #include <vm/kboot_mmu.h> 76 #endif 77 78 #if defined(__amd64) && !defined(__xpv) 79 #include <sys/immu.h> 80 #endif 81 82 83 /* 84 * enable/disable extra checking of function parameters. Useful for debugging 85 * drivers. 86 */ 87 #ifdef DEBUG 88 int rootnex_alloc_check_parms = 1; 89 int rootnex_bind_check_parms = 1; 90 int rootnex_bind_check_inuse = 1; 91 int rootnex_unbind_verify_buffer = 0; 92 int rootnex_sync_check_parms = 1; 93 #else 94 int rootnex_alloc_check_parms = 0; 95 int rootnex_bind_check_parms = 0; 96 int rootnex_bind_check_inuse = 0; 97 int rootnex_unbind_verify_buffer = 0; 98 int rootnex_sync_check_parms = 0; 99 #endif 100 101 boolean_t rootnex_dmar_not_setup; 102 103 /* Master Abort and Target Abort panic flag */ 104 int rootnex_fm_ma_ta_panic_flag = 0; 105 106 /* Semi-temporary patchables to phase in bug fixes, test drivers, etc. */ 107 int rootnex_bind_fail = 1; 108 int rootnex_bind_warn = 1; 109 uint8_t *rootnex_warn_list; 110 /* bitmasks for rootnex_warn_list. Up to 8 different warnings with uint8_t */ 111 #define ROOTNEX_BIND_WARNING (0x1 << 0) 112 113 /* 114 * revert back to old broken behavior of always sync'ing entire copy buffer. 115 * This is useful if be have a buggy driver which doesn't correctly pass in 116 * the offset and size into ddi_dma_sync(). 117 */ 118 int rootnex_sync_ignore_params = 0; 119 120 /* 121 * For the 64-bit kernel, pre-alloc enough cookies for a 256K buffer plus 1 122 * page for alignment. For the 32-bit kernel, pre-alloc enough cookies for a 123 * 64K buffer plus 1 page for alignment (we have less kernel space in a 32-bit 124 * kernel). Allocate enough windows to handle a 256K buffer w/ at least 65 125 * sgllen DMA engine, and enough copybuf buffer state pages to handle 2 pages 126 * (< 8K). We will still need to allocate the copy buffer during bind though 127 * (if we need one). These can only be modified in /etc/system before rootnex 128 * attach. 129 */ 130 #if defined(__amd64) 131 int rootnex_prealloc_cookies = 65; 132 int rootnex_prealloc_windows = 4; 133 int rootnex_prealloc_copybuf = 2; 134 #else 135 int rootnex_prealloc_cookies = 33; 136 int rootnex_prealloc_windows = 4; 137 int rootnex_prealloc_copybuf = 2; 138 #endif 139 140 /* driver global state */ 141 static rootnex_state_t *rootnex_state; 142 143 #ifdef DEBUG 144 /* shortcut to rootnex counters */ 145 static uint64_t *rootnex_cnt; 146 #endif 147 148 /* 149 * XXX - does x86 even need these or are they left over from the SPARC days? 150 */ 151 /* statically defined integer/boolean properties for the root node */ 152 static rootnex_intprop_t rootnex_intprp[] = { 153 { "PAGESIZE", PAGESIZE }, 154 { "MMU_PAGESIZE", MMU_PAGESIZE }, 155 { "MMU_PAGEOFFSET", MMU_PAGEOFFSET }, 156 { DDI_RELATIVE_ADDRESSING, 1 }, 157 }; 158 #define NROOT_INTPROPS (sizeof (rootnex_intprp) / sizeof (rootnex_intprop_t)) 159 160 /* 161 * If we're dom0, we're using a real device so we need to load 162 * the cookies with MFNs instead of PFNs. 163 */ 164 #ifdef __xpv 165 typedef maddr_t rootnex_addr_t; 166 #define ROOTNEX_PADDR_TO_RBASE(pa) \ 167 (DOMAIN_IS_INITDOMAIN(xen_info) ? pa_to_ma(pa) : (pa)) 168 #else 169 typedef paddr_t rootnex_addr_t; 170 #define ROOTNEX_PADDR_TO_RBASE(pa) (pa) 171 #endif 172 173 static struct cb_ops rootnex_cb_ops = { 174 nodev, /* open */ 175 nodev, /* close */ 176 nodev, /* strategy */ 177 nodev, /* print */ 178 nodev, /* dump */ 179 nodev, /* read */ 180 nodev, /* write */ 181 nodev, /* ioctl */ 182 nodev, /* devmap */ 183 nodev, /* mmap */ 184 nodev, /* segmap */ 185 nochpoll, /* chpoll */ 186 ddi_prop_op, /* cb_prop_op */ 187 NULL, /* struct streamtab */ 188 D_NEW | D_MP | D_HOTPLUG, /* compatibility flags */ 189 CB_REV, /* Rev */ 190 nodev, /* cb_aread */ 191 nodev /* cb_awrite */ 192 }; 193 194 static int rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, 195 off_t offset, off_t len, caddr_t *vaddrp); 196 static int rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip, 197 struct hat *hat, struct seg *seg, caddr_t addr, 198 struct devpage *dp, pfn_t pfn, uint_t prot, uint_t lock); 199 static int rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, 200 ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg, 201 ddi_dma_handle_t *handlep); 202 static int rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, 203 ddi_dma_handle_t handle); 204 static int rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 205 ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 206 ddi_dma_cookie_t *cookiep, uint_t *ccountp); 207 static int rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 208 ddi_dma_handle_t handle); 209 static int rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip, 210 ddi_dma_handle_t handle, off_t off, size_t len, uint_t cache_flags); 211 static int rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, 212 ddi_dma_handle_t handle, uint_t win, off_t *offp, size_t *lenp, 213 ddi_dma_cookie_t *cookiep, uint_t *ccountp); 214 static int rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip, 215 ddi_dma_handle_t handle, enum ddi_dma_ctlops request, 216 off_t *offp, size_t *lenp, caddr_t *objp, uint_t cache_flags); 217 static int rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip, 218 ddi_ctl_enum_t ctlop, void *arg, void *result); 219 static int rootnex_fm_init(dev_info_t *dip, dev_info_t *tdip, int tcap, 220 ddi_iblock_cookie_t *ibc); 221 static int rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip, 222 ddi_intr_op_t intr_op, ddi_intr_handle_impl_t *hdlp, void *result); 223 static int rootnex_alloc_intr_fixed(dev_info_t *, ddi_intr_handle_impl_t *, 224 void *); 225 static int rootnex_free_intr_fixed(dev_info_t *, ddi_intr_handle_impl_t *); 226 227 static int rootnex_coredma_allochdl(dev_info_t *dip, dev_info_t *rdip, 228 ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg, 229 ddi_dma_handle_t *handlep); 230 static int rootnex_coredma_freehdl(dev_info_t *dip, dev_info_t *rdip, 231 ddi_dma_handle_t handle); 232 static int rootnex_coredma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 233 ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 234 ddi_dma_cookie_t *cookiep, uint_t *ccountp); 235 static int rootnex_coredma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 236 ddi_dma_handle_t handle); 237 #if defined(__amd64) && !defined(__xpv) 238 static void rootnex_coredma_reset_cookies(dev_info_t *dip, 239 ddi_dma_handle_t handle); 240 static int rootnex_coredma_get_cookies(dev_info_t *dip, ddi_dma_handle_t handle, 241 ddi_dma_cookie_t **cookiepp, uint_t *ccountp); 242 static int rootnex_coredma_set_cookies(dev_info_t *dip, ddi_dma_handle_t handle, 243 ddi_dma_cookie_t *cookiep, uint_t ccount); 244 static int rootnex_coredma_clear_cookies(dev_info_t *dip, 245 ddi_dma_handle_t handle); 246 static int rootnex_coredma_get_sleep_flags(ddi_dma_handle_t handle); 247 #endif 248 static int rootnex_coredma_sync(dev_info_t *dip, dev_info_t *rdip, 249 ddi_dma_handle_t handle, off_t off, size_t len, uint_t cache_flags); 250 static int rootnex_coredma_win(dev_info_t *dip, dev_info_t *rdip, 251 ddi_dma_handle_t handle, uint_t win, off_t *offp, size_t *lenp, 252 ddi_dma_cookie_t *cookiep, uint_t *ccountp); 253 254 #if defined(__amd64) && !defined(__xpv) 255 static int rootnex_coredma_hdl_setprivate(dev_info_t *dip, dev_info_t *rdip, 256 ddi_dma_handle_t handle, void *v); 257 static void *rootnex_coredma_hdl_getprivate(dev_info_t *dip, dev_info_t *rdip, 258 ddi_dma_handle_t handle); 259 #endif 260 261 262 static struct bus_ops rootnex_bus_ops = { 263 BUSO_REV, 264 rootnex_map, 265 NULL, 266 NULL, 267 NULL, 268 rootnex_map_fault, 269 0, 270 rootnex_dma_allochdl, 271 rootnex_dma_freehdl, 272 rootnex_dma_bindhdl, 273 rootnex_dma_unbindhdl, 274 rootnex_dma_sync, 275 rootnex_dma_win, 276 rootnex_dma_mctl, 277 rootnex_ctlops, 278 ddi_bus_prop_op, 279 i_ddi_rootnex_get_eventcookie, 280 i_ddi_rootnex_add_eventcall, 281 i_ddi_rootnex_remove_eventcall, 282 i_ddi_rootnex_post_event, 283 0, /* bus_intr_ctl */ 284 0, /* bus_config */ 285 0, /* bus_unconfig */ 286 rootnex_fm_init, /* bus_fm_init */ 287 NULL, /* bus_fm_fini */ 288 NULL, /* bus_fm_access_enter */ 289 NULL, /* bus_fm_access_exit */ 290 NULL, /* bus_powr */ 291 rootnex_intr_ops /* bus_intr_op */ 292 }; 293 294 static int rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd); 295 static int rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd); 296 static int rootnex_quiesce(dev_info_t *dip); 297 298 static struct dev_ops rootnex_ops = { 299 DEVO_REV, 300 0, 301 ddi_no_info, 302 nulldev, 303 nulldev, 304 rootnex_attach, 305 rootnex_detach, 306 nulldev, 307 &rootnex_cb_ops, 308 &rootnex_bus_ops, 309 NULL, 310 rootnex_quiesce, /* quiesce */ 311 }; 312 313 static struct modldrv rootnex_modldrv = { 314 &mod_driverops, 315 "i86pc root nexus", 316 &rootnex_ops 317 }; 318 319 static struct modlinkage rootnex_modlinkage = { 320 MODREV_1, 321 (void *)&rootnex_modldrv, 322 NULL 323 }; 324 325 #if defined(__amd64) && !defined(__xpv) 326 static iommulib_nexops_t iommulib_nexops = { 327 IOMMU_NEXOPS_VERSION, 328 "Rootnex IOMMU ops Vers 1.1", 329 NULL, 330 rootnex_coredma_allochdl, 331 rootnex_coredma_freehdl, 332 rootnex_coredma_bindhdl, 333 rootnex_coredma_unbindhdl, 334 rootnex_coredma_reset_cookies, 335 rootnex_coredma_get_cookies, 336 rootnex_coredma_set_cookies, 337 rootnex_coredma_clear_cookies, 338 rootnex_coredma_get_sleep_flags, 339 rootnex_coredma_sync, 340 rootnex_coredma_win, 341 rootnex_coredma_hdl_setprivate, 342 rootnex_coredma_hdl_getprivate 343 }; 344 #endif 345 346 /* 347 * extern hacks 348 */ 349 extern struct seg_ops segdev_ops; 350 extern int ignore_hardware_nodes; /* force flag from ddi_impl.c */ 351 #ifdef DDI_MAP_DEBUG 352 extern int ddi_map_debug_flag; 353 #define ddi_map_debug if (ddi_map_debug_flag) prom_printf 354 #endif 355 extern void i86_pp_map(page_t *pp, caddr_t kaddr); 356 extern void i86_va_map(caddr_t vaddr, struct as *asp, caddr_t kaddr); 357 extern int (*psm_intr_ops)(dev_info_t *, ddi_intr_handle_impl_t *, 358 psm_intr_op_t, int *); 359 extern int impl_ddi_sunbus_initchild(dev_info_t *dip); 360 extern void impl_ddi_sunbus_removechild(dev_info_t *dip); 361 362 /* 363 * Use device arena to use for device control register mappings. 364 * Various kernel memory walkers (debugger, dtrace) need to know 365 * to avoid this address range to prevent undesired device activity. 366 */ 367 extern void *device_arena_alloc(size_t size, int vm_flag); 368 extern void device_arena_free(void * vaddr, size_t size); 369 370 371 /* 372 * Internal functions 373 */ 374 static int rootnex_dma_init(); 375 static void rootnex_add_props(dev_info_t *); 376 static int rootnex_ctl_reportdev(dev_info_t *dip); 377 static struct intrspec *rootnex_get_ispec(dev_info_t *rdip, int inum); 378 static int rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp); 379 static int rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp); 380 static int rootnex_map_handle(ddi_map_req_t *mp); 381 static void rootnex_clean_dmahdl(ddi_dma_impl_t *hp); 382 static int rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegsize); 383 static int rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, 384 ddi_dma_attr_t *attr); 385 static void rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl, 386 rootnex_sglinfo_t *sglinfo); 387 static void rootnex_dvma_get_sgl(ddi_dma_obj_t *dmar_object, 388 ddi_dma_cookie_t *sgl, rootnex_sglinfo_t *sglinfo); 389 static int rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 390 rootnex_dma_t *dma, ddi_dma_attr_t *attr, ddi_dma_obj_t *dmao, int kmflag); 391 static int rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 392 rootnex_dma_t *dma, ddi_dma_attr_t *attr); 393 static void rootnex_teardown_copybuf(rootnex_dma_t *dma); 394 static int rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 395 ddi_dma_attr_t *attr, ddi_dma_obj_t *dmao, int kmflag); 396 static void rootnex_teardown_windows(rootnex_dma_t *dma); 397 static void rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 398 rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset); 399 static void rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, 400 rootnex_dma_t *dma, ddi_dma_cookie_t *cookie, off_t cur_offset, 401 size_t *copybuf_used, page_t **cur_pp); 402 static int rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp, 403 rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, 404 ddi_dma_attr_t *attr, off_t cur_offset); 405 static int rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, 406 rootnex_dma_t *dma, rootnex_window_t **windowp, 407 ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used); 408 static int rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp, 409 rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie); 410 static int rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win, 411 off_t offset, size_t size, uint_t cache_flags); 412 static int rootnex_verify_buffer(rootnex_dma_t *dma); 413 static int rootnex_dma_check(dev_info_t *dip, const void *handle, 414 const void *comp_addr, const void *not_used); 415 static boolean_t rootnex_need_bounce_seg(ddi_dma_obj_t *dmar_object, 416 rootnex_sglinfo_t *sglinfo); 417 static struct as *rootnex_get_as(ddi_dma_obj_t *dmar_object); 418 419 /* 420 * _init() 421 * 422 */ 423 int 424 _init(void) 425 { 426 427 rootnex_state = NULL; 428 return (mod_install(&rootnex_modlinkage)); 429 } 430 431 432 /* 433 * _info() 434 * 435 */ 436 int 437 _info(struct modinfo *modinfop) 438 { 439 return (mod_info(&rootnex_modlinkage, modinfop)); 440 } 441 442 443 /* 444 * _fini() 445 * 446 */ 447 int 448 _fini(void) 449 { 450 return (EBUSY); 451 } 452 453 454 /* 455 * rootnex_attach() 456 * 457 */ 458 static int 459 rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 460 { 461 int fmcap; 462 int e; 463 464 switch (cmd) { 465 case DDI_ATTACH: 466 break; 467 case DDI_RESUME: 468 #if defined(__amd64) && !defined(__xpv) 469 return (immu_unquiesce()); 470 #else 471 return (DDI_SUCCESS); 472 #endif 473 default: 474 return (DDI_FAILURE); 475 } 476 477 /* 478 * We should only have one instance of rootnex. Save it away since we 479 * don't have an easy way to get it back later. 480 */ 481 ASSERT(rootnex_state == NULL); 482 rootnex_state = kmem_zalloc(sizeof (rootnex_state_t), KM_SLEEP); 483 484 rootnex_state->r_dip = dip; 485 rootnex_state->r_err_ibc = (ddi_iblock_cookie_t)ipltospl(15); 486 rootnex_state->r_reserved_msg_printed = B_FALSE; 487 #ifdef DEBUG 488 rootnex_cnt = &rootnex_state->r_counters[0]; 489 #endif 490 491 /* 492 * Set minimum fm capability level for i86pc platforms and then 493 * initialize error handling. Since we're the rootnex, we don't 494 * care what's returned in the fmcap field. 495 */ 496 ddi_system_fmcap = DDI_FM_EREPORT_CAPABLE | DDI_FM_ERRCB_CAPABLE | 497 DDI_FM_ACCCHK_CAPABLE | DDI_FM_DMACHK_CAPABLE; 498 fmcap = ddi_system_fmcap; 499 ddi_fm_init(dip, &fmcap, &rootnex_state->r_err_ibc); 500 501 /* initialize DMA related state */ 502 e = rootnex_dma_init(); 503 if (e != DDI_SUCCESS) { 504 kmem_free(rootnex_state, sizeof (rootnex_state_t)); 505 return (DDI_FAILURE); 506 } 507 508 /* Add static root node properties */ 509 rootnex_add_props(dip); 510 511 /* since we can't call ddi_report_dev() */ 512 cmn_err(CE_CONT, "?root nexus = %s\n", ddi_get_name(dip)); 513 514 /* Initialize rootnex event handle */ 515 i_ddi_rootnex_init_events(dip); 516 517 #if defined(__amd64) && !defined(__xpv) 518 e = iommulib_nexus_register(dip, &iommulib_nexops, 519 &rootnex_state->r_iommulib_handle); 520 521 ASSERT(e == DDI_SUCCESS); 522 #endif 523 524 return (DDI_SUCCESS); 525 } 526 527 528 /* 529 * rootnex_detach() 530 * 531 */ 532 /*ARGSUSED*/ 533 static int 534 rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 535 { 536 switch (cmd) { 537 case DDI_SUSPEND: 538 #if defined(__amd64) && !defined(__xpv) 539 return (immu_quiesce()); 540 #else 541 return (DDI_SUCCESS); 542 #endif 543 default: 544 return (DDI_FAILURE); 545 } 546 /*NOTREACHED*/ 547 548 } 549 550 551 /* 552 * rootnex_dma_init() 553 * 554 */ 555 /*ARGSUSED*/ 556 static int 557 rootnex_dma_init() 558 { 559 size_t bufsize; 560 561 562 /* 563 * size of our cookie/window/copybuf state needed in dma bind that we 564 * pre-alloc in dma_alloc_handle 565 */ 566 rootnex_state->r_prealloc_cookies = rootnex_prealloc_cookies; 567 rootnex_state->r_prealloc_size = 568 (rootnex_state->r_prealloc_cookies * sizeof (ddi_dma_cookie_t)) + 569 (rootnex_prealloc_windows * sizeof (rootnex_window_t)) + 570 (rootnex_prealloc_copybuf * sizeof (rootnex_pgmap_t)); 571 572 /* 573 * setup DDI DMA handle kmem cache, align each handle on 64 bytes, 574 * allocate 16 extra bytes for struct pointer alignment 575 * (p->dmai_private & dma->dp_prealloc_buffer) 576 */ 577 bufsize = sizeof (ddi_dma_impl_t) + sizeof (rootnex_dma_t) + 578 rootnex_state->r_prealloc_size + 0x10; 579 rootnex_state->r_dmahdl_cache = kmem_cache_create("rootnex_dmahdl", 580 bufsize, 64, NULL, NULL, NULL, NULL, NULL, 0); 581 if (rootnex_state->r_dmahdl_cache == NULL) { 582 return (DDI_FAILURE); 583 } 584 585 /* 586 * allocate array to track which major numbers we have printed warnings 587 * for. 588 */ 589 rootnex_warn_list = kmem_zalloc(devcnt * sizeof (*rootnex_warn_list), 590 KM_SLEEP); 591 592 return (DDI_SUCCESS); 593 } 594 595 596 /* 597 * rootnex_add_props() 598 * 599 */ 600 static void 601 rootnex_add_props(dev_info_t *dip) 602 { 603 rootnex_intprop_t *rpp; 604 int i; 605 606 /* Add static integer/boolean properties to the root node */ 607 rpp = rootnex_intprp; 608 for (i = 0; i < NROOT_INTPROPS; i++) { 609 (void) e_ddi_prop_update_int(DDI_DEV_T_NONE, dip, 610 rpp[i].prop_name, rpp[i].prop_value); 611 } 612 } 613 614 615 616 /* 617 * ************************* 618 * ctlops related routines 619 * ************************* 620 */ 621 622 /* 623 * rootnex_ctlops() 624 * 625 */ 626 /*ARGSUSED*/ 627 static int 628 rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip, ddi_ctl_enum_t ctlop, 629 void *arg, void *result) 630 { 631 int n, *ptr; 632 struct ddi_parent_private_data *pdp; 633 634 switch (ctlop) { 635 case DDI_CTLOPS_DMAPMAPC: 636 /* 637 * Return 'partial' to indicate that dma mapping 638 * has to be done in the main MMU. 639 */ 640 return (DDI_DMA_PARTIAL); 641 642 case DDI_CTLOPS_BTOP: 643 /* 644 * Convert byte count input to physical page units. 645 * (byte counts that are not a page-size multiple 646 * are rounded down) 647 */ 648 *(ulong_t *)result = btop(*(ulong_t *)arg); 649 return (DDI_SUCCESS); 650 651 case DDI_CTLOPS_PTOB: 652 /* 653 * Convert size in physical pages to bytes 654 */ 655 *(ulong_t *)result = ptob(*(ulong_t *)arg); 656 return (DDI_SUCCESS); 657 658 case DDI_CTLOPS_BTOPR: 659 /* 660 * Convert byte count input to physical page units 661 * (byte counts that are not a page-size multiple 662 * are rounded up) 663 */ 664 *(ulong_t *)result = btopr(*(ulong_t *)arg); 665 return (DDI_SUCCESS); 666 667 case DDI_CTLOPS_INITCHILD: 668 return (impl_ddi_sunbus_initchild(arg)); 669 670 case DDI_CTLOPS_UNINITCHILD: 671 impl_ddi_sunbus_removechild(arg); 672 return (DDI_SUCCESS); 673 674 case DDI_CTLOPS_REPORTDEV: 675 return (rootnex_ctl_reportdev(rdip)); 676 677 case DDI_CTLOPS_IOMIN: 678 /* 679 * Nothing to do here but reflect back.. 680 */ 681 return (DDI_SUCCESS); 682 683 case DDI_CTLOPS_REGSIZE: 684 case DDI_CTLOPS_NREGS: 685 break; 686 687 case DDI_CTLOPS_SIDDEV: 688 if (ndi_dev_is_prom_node(rdip)) 689 return (DDI_SUCCESS); 690 if (ndi_dev_is_persistent_node(rdip)) 691 return (DDI_SUCCESS); 692 return (DDI_FAILURE); 693 694 case DDI_CTLOPS_POWER: 695 return ((*pm_platform_power)((power_req_t *)arg)); 696 697 case DDI_CTLOPS_RESERVED0: /* Was DDI_CTLOPS_NINTRS, obsolete */ 698 case DDI_CTLOPS_RESERVED1: /* Was DDI_CTLOPS_POKE_INIT, obsolete */ 699 case DDI_CTLOPS_RESERVED2: /* Was DDI_CTLOPS_POKE_FLUSH, obsolete */ 700 case DDI_CTLOPS_RESERVED3: /* Was DDI_CTLOPS_POKE_FINI, obsolete */ 701 case DDI_CTLOPS_RESERVED4: /* Was DDI_CTLOPS_INTR_HILEVEL, obsolete */ 702 case DDI_CTLOPS_RESERVED5: /* Was DDI_CTLOPS_XLATE_INTRS, obsolete */ 703 if (!rootnex_state->r_reserved_msg_printed) { 704 rootnex_state->r_reserved_msg_printed = B_TRUE; 705 cmn_err(CE_WARN, "Failing ddi_ctlops call(s) for " 706 "1 or more reserved/obsolete operations."); 707 } 708 return (DDI_FAILURE); 709 710 default: 711 return (DDI_FAILURE); 712 } 713 /* 714 * The rest are for "hardware" properties 715 */ 716 if ((pdp = ddi_get_parent_data(rdip)) == NULL) 717 return (DDI_FAILURE); 718 719 if (ctlop == DDI_CTLOPS_NREGS) { 720 ptr = (int *)result; 721 *ptr = pdp->par_nreg; 722 } else { 723 off_t *size = (off_t *)result; 724 725 ptr = (int *)arg; 726 n = *ptr; 727 if (n >= pdp->par_nreg) { 728 return (DDI_FAILURE); 729 } 730 *size = (off_t)pdp->par_reg[n].regspec_size; 731 } 732 return (DDI_SUCCESS); 733 } 734 735 736 /* 737 * rootnex_ctl_reportdev() 738 * 739 */ 740 static int 741 rootnex_ctl_reportdev(dev_info_t *dev) 742 { 743 int i, n, len, f_len = 0; 744 char *buf; 745 746 buf = kmem_alloc(REPORTDEV_BUFSIZE, KM_SLEEP); 747 f_len += snprintf(buf, REPORTDEV_BUFSIZE, 748 "%s%d at root", ddi_driver_name(dev), ddi_get_instance(dev)); 749 len = strlen(buf); 750 751 for (i = 0; i < sparc_pd_getnreg(dev); i++) { 752 753 struct regspec *rp = sparc_pd_getreg(dev, i); 754 755 if (i == 0) 756 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 757 ": "); 758 else 759 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 760 " and "); 761 len = strlen(buf); 762 763 switch (rp->regspec_bustype) { 764 765 case BTEISA: 766 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 767 "%s 0x%x", DEVI_EISA_NEXNAME, rp->regspec_addr); 768 break; 769 770 case BTISA: 771 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 772 "%s 0x%x", DEVI_ISA_NEXNAME, rp->regspec_addr); 773 break; 774 775 default: 776 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 777 "space %x offset %x", 778 rp->regspec_bustype, rp->regspec_addr); 779 break; 780 } 781 len = strlen(buf); 782 } 783 for (i = 0, n = sparc_pd_getnintr(dev); i < n; i++) { 784 int pri; 785 786 if (i != 0) { 787 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 788 ","); 789 len = strlen(buf); 790 } 791 pri = INT_IPL(sparc_pd_getintr(dev, i)->intrspec_pri); 792 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 793 " sparc ipl %d", pri); 794 len = strlen(buf); 795 } 796 #ifdef DEBUG 797 if (f_len + 1 >= REPORTDEV_BUFSIZE) { 798 cmn_err(CE_NOTE, "next message is truncated: " 799 "printed length 1024, real length %d", f_len); 800 } 801 #endif /* DEBUG */ 802 cmn_err(CE_CONT, "?%s\n", buf); 803 kmem_free(buf, REPORTDEV_BUFSIZE); 804 return (DDI_SUCCESS); 805 } 806 807 808 /* 809 * ****************** 810 * map related code 811 * ****************** 812 */ 813 814 /* 815 * rootnex_map() 816 * 817 */ 818 static int 819 rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, off_t offset, 820 off_t len, caddr_t *vaddrp) 821 { 822 struct regspec *orp = NULL; 823 struct regspec64 rp = { 0 }; 824 ddi_map_req_t mr = *mp; /* Get private copy of request */ 825 826 mp = &mr; 827 828 switch (mp->map_op) { 829 case DDI_MO_MAP_LOCKED: 830 case DDI_MO_UNMAP: 831 case DDI_MO_MAP_HANDLE: 832 break; 833 default: 834 #ifdef DDI_MAP_DEBUG 835 cmn_err(CE_WARN, "rootnex_map: unimplemented map op %d.", 836 mp->map_op); 837 #endif /* DDI_MAP_DEBUG */ 838 return (DDI_ME_UNIMPLEMENTED); 839 } 840 841 if (mp->map_flags & DDI_MF_USER_MAPPING) { 842 #ifdef DDI_MAP_DEBUG 843 cmn_err(CE_WARN, "rootnex_map: unimplemented map type: user."); 844 #endif /* DDI_MAP_DEBUG */ 845 return (DDI_ME_UNIMPLEMENTED); 846 } 847 848 /* 849 * First, we need to get the original regspec out before we convert it 850 * to the extended format. If we have a register number, then we need to 851 * convert that to a regspec. 852 */ 853 if (mp->map_type == DDI_MT_RNUMBER) { 854 855 int rnumber = mp->map_obj.rnumber; 856 #ifdef DDI_MAP_DEBUG 857 static char *out_of_range = 858 "rootnex_map: Out of range rnumber <%d>, device <%s>"; 859 #endif /* DDI_MAP_DEBUG */ 860 861 orp = i_ddi_rnumber_to_regspec(rdip, rnumber); 862 if (orp == NULL) { 863 #ifdef DDI_MAP_DEBUG 864 cmn_err(CE_WARN, out_of_range, rnumber, 865 ddi_get_name(rdip)); 866 #endif /* DDI_MAP_DEBUG */ 867 return (DDI_ME_RNUMBER_RANGE); 868 } 869 } else if (!(mp->map_flags & DDI_MF_EXT_REGSPEC)) { 870 orp = mp->map_obj.rp; 871 } 872 873 /* 874 * Ensure that we are always using a 64-bit extended regspec regardless 875 * of what was passed into us. If the child driver is using a 64-bit 876 * regspec, then we need to make sure that we copy this to the local 877 * regspec64, rp. 878 */ 879 if (orp != NULL) { 880 rp.regspec_bustype = orp->regspec_bustype; 881 rp.regspec_addr = orp->regspec_addr; 882 rp.regspec_size = orp->regspec_size; 883 } else { 884 struct regspec64 *rp64; 885 rp64 = (struct regspec64 *)mp->map_obj.rp; 886 rp = *rp64; 887 } 888 889 mp->map_type = DDI_MT_REGSPEC; 890 mp->map_flags |= DDI_MF_EXT_REGSPEC; 891 mp->map_obj.rp = (struct regspec *)&rp; 892 893 /* 894 * Adjust offset and length correspnding to called values... 895 * XXX: A non-zero length means override the one in the regspec 896 * XXX: (regardless of what's in the parent's range?) 897 */ 898 899 #ifdef DDI_MAP_DEBUG 900 cmn_err(CE_CONT, "rootnex: <%s,%s> <0x%x, 0x%x, 0x%d> offset %d len %d " 901 "handle 0x%x\n", ddi_get_name(dip), ddi_get_name(rdip), 902 rp.regspec_bustype, rp.regspec_addr, rp.regspec_size, offset, 903 len, mp->map_handlep); 904 #endif /* DDI_MAP_DEBUG */ 905 906 /* 907 * I/O or memory mapping: 908 * 909 * <bustype=0, addr=x, len=x>: memory 910 * <bustype=1, addr=x, len=x>: i/o 911 * <bustype>1, addr=0, len=x>: x86-compatibility i/o 912 */ 913 914 if (rp.regspec_bustype > 1 && rp.regspec_addr != 0) { 915 cmn_err(CE_WARN, "<%s,%s> invalid register spec" 916 " <0x%" PRIx64 ", 0x%" PRIx64 ", 0x%" PRIx64 ">", 917 ddi_get_name(dip), ddi_get_name(rdip), rp.regspec_bustype, 918 rp.regspec_addr, rp.regspec_size); 919 return (DDI_ME_INVAL); 920 } 921 922 if (rp.regspec_bustype > 1 && rp.regspec_addr == 0) { 923 /* 924 * compatibility i/o mapping 925 */ 926 rp.regspec_bustype += offset; 927 } else { 928 /* 929 * Normal memory or i/o mapping 930 */ 931 rp.regspec_addr += offset; 932 } 933 934 if (len != 0) 935 rp.regspec_size = len; 936 937 #ifdef DDI_MAP_DEBUG 938 cmn_err(CE_CONT, " <%s,%s> <0x%" PRIx64 ", 0x%" PRIx64 939 ", 0x%" PRId64 "> offset %d len %d handle 0x%x\n", 940 ddi_get_name(dip), ddi_get_name(rdip), rp.regspec_bustype, 941 rp.regspec_addr, rp.regspec_size, offset, len, mp->map_handlep); 942 #endif /* DDI_MAP_DEBUG */ 943 944 945 /* 946 * The x86 root nexus does not have any notion of valid ranges of 947 * addresses. Its children have valid ranges, but because there are none 948 * for the nexus, we don't need to call i_ddi_apply_range(). Verify 949 * that is the case. 950 */ 951 ASSERT0(sparc_pd_getnrng(dip)); 952 953 switch (mp->map_op) { 954 case DDI_MO_MAP_LOCKED: 955 956 /* 957 * Set up the locked down kernel mapping to the regspec... 958 */ 959 960 return (rootnex_map_regspec(mp, vaddrp)); 961 962 case DDI_MO_UNMAP: 963 964 /* 965 * Release mapping... 966 */ 967 968 return (rootnex_unmap_regspec(mp, vaddrp)); 969 970 case DDI_MO_MAP_HANDLE: 971 972 return (rootnex_map_handle(mp)); 973 974 default: 975 return (DDI_ME_UNIMPLEMENTED); 976 } 977 } 978 979 980 /* 981 * rootnex_map_fault() 982 * 983 * fault in mappings for requestors 984 */ 985 /*ARGSUSED*/ 986 static int 987 rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip, struct hat *hat, 988 struct seg *seg, caddr_t addr, struct devpage *dp, pfn_t pfn, uint_t prot, 989 uint_t lock) 990 { 991 992 #ifdef DDI_MAP_DEBUG 993 ddi_map_debug("rootnex_map_fault: address <%x> pfn <%x>", addr, pfn); 994 ddi_map_debug(" Seg <%s>\n", 995 seg->s_ops == &segdev_ops ? "segdev" : 996 seg == &kvseg ? "segkmem" : "NONE!"); 997 #endif /* DDI_MAP_DEBUG */ 998 999 /* 1000 * This is all terribly broken, but it is a start 1001 * 1002 * XXX Note that this test means that segdev_ops 1003 * must be exported from seg_dev.c. 1004 * XXX What about devices with their own segment drivers? 1005 */ 1006 if (seg->s_ops == &segdev_ops) { 1007 struct segdev_data *sdp = (struct segdev_data *)seg->s_data; 1008 1009 if (hat == NULL) { 1010 /* 1011 * This is one plausible interpretation of 1012 * a null hat i.e. use the first hat on the 1013 * address space hat list which by convention is 1014 * the hat of the system MMU. At alternative 1015 * would be to panic .. this might well be better .. 1016 */ 1017 ASSERT(AS_READ_HELD(seg->s_as)); 1018 hat = seg->s_as->a_hat; 1019 cmn_err(CE_NOTE, "rootnex_map_fault: nil hat"); 1020 } 1021 hat_devload(hat, addr, MMU_PAGESIZE, pfn, prot | sdp->hat_attr, 1022 (lock ? HAT_LOAD_LOCK : HAT_LOAD)); 1023 } else if (seg == &kvseg && dp == NULL) { 1024 hat_devload(kas.a_hat, addr, MMU_PAGESIZE, pfn, prot, 1025 HAT_LOAD_LOCK); 1026 } else 1027 return (DDI_FAILURE); 1028 return (DDI_SUCCESS); 1029 } 1030 1031 1032 static int 1033 rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp) 1034 { 1035 rootnex_addr_t rbase; 1036 void *cvaddr; 1037 uint64_t npages, pgoffset; 1038 struct regspec64 *rp; 1039 ddi_acc_hdl_t *hp; 1040 ddi_acc_impl_t *ap; 1041 uint_t hat_acc_flags; 1042 paddr_t pbase; 1043 1044 ASSERT(mp->map_flags & DDI_MF_EXT_REGSPEC); 1045 rp = (struct regspec64 *)mp->map_obj.rp; 1046 hp = mp->map_handlep; 1047 1048 #ifdef DDI_MAP_DEBUG 1049 ddi_map_debug( 1050 "rootnex_map_regspec: <0x%x 0x%x 0x%x> handle 0x%x\n", 1051 rp->regspec_bustype, rp->regspec_addr, 1052 rp->regspec_size, mp->map_handlep); 1053 #endif /* DDI_MAP_DEBUG */ 1054 1055 /* 1056 * I/O or memory mapping 1057 * 1058 * <bustype=0, addr=x, len=x>: memory 1059 * <bustype=1, addr=x, len=x>: i/o 1060 * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1061 */ 1062 1063 if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) { 1064 cmn_err(CE_WARN, "rootnex: invalid register spec" 1065 " <0x%" PRIx64 ", 0x%" PRIx64", 0x%" PRIx64">", 1066 rp->regspec_bustype, rp->regspec_addr, rp->regspec_size); 1067 return (DDI_FAILURE); 1068 } 1069 1070 if (rp->regspec_bustype != 0) { 1071 /* 1072 * I/O space - needs a handle. 1073 */ 1074 if (hp == NULL) { 1075 return (DDI_FAILURE); 1076 } 1077 ap = (ddi_acc_impl_t *)hp->ah_platform_private; 1078 ap->ahi_acc_attr |= DDI_ACCATTR_IO_SPACE; 1079 impl_acc_hdl_init(hp); 1080 1081 if (mp->map_flags & DDI_MF_DEVICE_MAPPING) { 1082 #ifdef DDI_MAP_DEBUG 1083 ddi_map_debug("rootnex_map_regspec: mmap() " 1084 "to I/O space is not supported.\n"); 1085 #endif /* DDI_MAP_DEBUG */ 1086 return (DDI_ME_INVAL); 1087 } else { 1088 /* 1089 * 1275-compliant vs. compatibility i/o mapping 1090 */ 1091 *vaddrp = 1092 (rp->regspec_bustype > 1 && rp->regspec_addr == 0) ? 1093 ((caddr_t)(uintptr_t)rp->regspec_bustype) : 1094 ((caddr_t)(uintptr_t)rp->regspec_addr); 1095 #ifdef __xpv 1096 if (DOMAIN_IS_INITDOMAIN(xen_info)) { 1097 hp->ah_pfn = xen_assign_pfn( 1098 mmu_btop((ulong_t)rp->regspec_addr & 1099 MMU_PAGEMASK)); 1100 } else { 1101 hp->ah_pfn = mmu_btop( 1102 (ulong_t)rp->regspec_addr & MMU_PAGEMASK); 1103 } 1104 #else 1105 hp->ah_pfn = mmu_btop((ulong_t)rp->regspec_addr & 1106 MMU_PAGEMASK); 1107 #endif 1108 hp->ah_pnum = mmu_btopr(rp->regspec_size + 1109 (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET); 1110 } 1111 1112 #ifdef DDI_MAP_DEBUG 1113 ddi_map_debug( 1114 "rootnex_map_regspec: \"Mapping\" %d bytes I/O space at 0x%x\n", 1115 rp->regspec_size, *vaddrp); 1116 #endif /* DDI_MAP_DEBUG */ 1117 return (DDI_SUCCESS); 1118 } 1119 1120 /* 1121 * Memory space 1122 */ 1123 1124 if (hp != NULL) { 1125 /* 1126 * hat layer ignores 1127 * hp->ah_acc.devacc_attr_endian_flags. 1128 */ 1129 switch (hp->ah_acc.devacc_attr_dataorder) { 1130 case DDI_STRICTORDER_ACC: 1131 hat_acc_flags = HAT_STRICTORDER; 1132 break; 1133 case DDI_UNORDERED_OK_ACC: 1134 hat_acc_flags = HAT_UNORDERED_OK; 1135 break; 1136 case DDI_MERGING_OK_ACC: 1137 hat_acc_flags = HAT_MERGING_OK; 1138 break; 1139 case DDI_LOADCACHING_OK_ACC: 1140 hat_acc_flags = HAT_LOADCACHING_OK; 1141 break; 1142 case DDI_STORECACHING_OK_ACC: 1143 hat_acc_flags = HAT_STORECACHING_OK; 1144 break; 1145 } 1146 ap = (ddi_acc_impl_t *)hp->ah_platform_private; 1147 ap->ahi_acc_attr |= DDI_ACCATTR_CPU_VADDR; 1148 impl_acc_hdl_init(hp); 1149 hp->ah_hat_flags = hat_acc_flags; 1150 } else { 1151 hat_acc_flags = HAT_STRICTORDER; 1152 } 1153 1154 rbase = (rootnex_addr_t)(rp->regspec_addr & MMU_PAGEMASK); 1155 #ifdef __xpv 1156 /* 1157 * If we're dom0, we're using a real device so we need to translate 1158 * the MA to a PA. 1159 */ 1160 if (DOMAIN_IS_INITDOMAIN(xen_info)) { 1161 pbase = pfn_to_pa(xen_assign_pfn(mmu_btop(rbase))); 1162 } else { 1163 pbase = rbase; 1164 } 1165 #else 1166 pbase = rbase; 1167 #endif 1168 pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET; 1169 1170 if (rp->regspec_size == 0) { 1171 #ifdef DDI_MAP_DEBUG 1172 ddi_map_debug("rootnex_map_regspec: zero regspec_size\n"); 1173 #endif /* DDI_MAP_DEBUG */ 1174 return (DDI_ME_INVAL); 1175 } 1176 1177 if (mp->map_flags & DDI_MF_DEVICE_MAPPING) { 1178 /* extra cast to make gcc happy */ 1179 *vaddrp = (caddr_t)((uintptr_t)mmu_btop(pbase)); 1180 } else { 1181 npages = mmu_btopr(rp->regspec_size + pgoffset); 1182 1183 #ifdef DDI_MAP_DEBUG 1184 ddi_map_debug("rootnex_map_regspec: Mapping %d pages " 1185 "physical %llx", npages, pbase); 1186 #endif /* DDI_MAP_DEBUG */ 1187 1188 cvaddr = device_arena_alloc(ptob(npages), VM_NOSLEEP); 1189 if (cvaddr == NULL) 1190 return (DDI_ME_NORESOURCES); 1191 1192 /* 1193 * Now map in the pages we've allocated... 1194 */ 1195 hat_devload(kas.a_hat, cvaddr, mmu_ptob(npages), 1196 mmu_btop(pbase), mp->map_prot | hat_acc_flags, 1197 HAT_LOAD_LOCK); 1198 *vaddrp = (caddr_t)cvaddr + pgoffset; 1199 1200 /* save away pfn and npages for FMA */ 1201 hp = mp->map_handlep; 1202 if (hp) { 1203 hp->ah_pfn = mmu_btop(pbase); 1204 hp->ah_pnum = npages; 1205 } 1206 } 1207 1208 #ifdef DDI_MAP_DEBUG 1209 ddi_map_debug("at virtual 0x%x\n", *vaddrp); 1210 #endif /* DDI_MAP_DEBUG */ 1211 return (DDI_SUCCESS); 1212 } 1213 1214 1215 static int 1216 rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp) 1217 { 1218 caddr_t addr = (caddr_t)*vaddrp; 1219 uint64_t npages, pgoffset; 1220 struct regspec64 *rp; 1221 1222 if (mp->map_flags & DDI_MF_DEVICE_MAPPING) 1223 return (0); 1224 1225 ASSERT(mp->map_flags & DDI_MF_EXT_REGSPEC); 1226 rp = (struct regspec64 *)mp->map_obj.rp; 1227 1228 if (rp->regspec_size == 0) { 1229 #ifdef DDI_MAP_DEBUG 1230 ddi_map_debug("rootnex_unmap_regspec: zero regspec_size\n"); 1231 #endif /* DDI_MAP_DEBUG */ 1232 return (DDI_ME_INVAL); 1233 } 1234 1235 /* 1236 * I/O or memory mapping: 1237 * 1238 * <bustype=0, addr=x, len=x>: memory 1239 * <bustype=1, addr=x, len=x>: i/o 1240 * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1241 */ 1242 if (rp->regspec_bustype != 0) { 1243 /* 1244 * This is I/O space, which requires no particular 1245 * processing on unmap since it isn't mapped in the 1246 * first place. 1247 */ 1248 return (DDI_SUCCESS); 1249 } 1250 1251 /* 1252 * Memory space 1253 */ 1254 pgoffset = (uintptr_t)addr & MMU_PAGEOFFSET; 1255 npages = mmu_btopr(rp->regspec_size + pgoffset); 1256 hat_unload(kas.a_hat, addr - pgoffset, ptob(npages), HAT_UNLOAD_UNLOCK); 1257 device_arena_free(addr - pgoffset, ptob(npages)); 1258 1259 /* 1260 * Destroy the pointer - the mapping has logically gone 1261 */ 1262 *vaddrp = NULL; 1263 1264 return (DDI_SUCCESS); 1265 } 1266 1267 static int 1268 rootnex_map_handle(ddi_map_req_t *mp) 1269 { 1270 rootnex_addr_t rbase; 1271 ddi_acc_hdl_t *hp; 1272 uint64_t pgoffset; 1273 struct regspec64 *rp; 1274 paddr_t pbase; 1275 1276 rp = (struct regspec64 *)mp->map_obj.rp; 1277 1278 #ifdef DDI_MAP_DEBUG 1279 ddi_map_debug( 1280 "rootnex_map_handle: <0x%x 0x%x 0x%x> handle 0x%x\n", 1281 rp->regspec_bustype, rp->regspec_addr, 1282 rp->regspec_size, mp->map_handlep); 1283 #endif /* DDI_MAP_DEBUG */ 1284 1285 /* 1286 * I/O or memory mapping: 1287 * 1288 * <bustype=0, addr=x, len=x>: memory 1289 * <bustype=1, addr=x, len=x>: i/o 1290 * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1291 */ 1292 if (rp->regspec_bustype != 0) { 1293 /* 1294 * This refers to I/O space, and we don't support "mapping" 1295 * I/O space to a user. 1296 */ 1297 return (DDI_FAILURE); 1298 } 1299 1300 /* 1301 * Set up the hat_flags for the mapping. 1302 */ 1303 hp = mp->map_handlep; 1304 1305 switch (hp->ah_acc.devacc_attr_endian_flags) { 1306 case DDI_NEVERSWAP_ACC: 1307 hp->ah_hat_flags = HAT_NEVERSWAP | HAT_STRICTORDER; 1308 break; 1309 case DDI_STRUCTURE_LE_ACC: 1310 hp->ah_hat_flags = HAT_STRUCTURE_LE; 1311 break; 1312 case DDI_STRUCTURE_BE_ACC: 1313 return (DDI_FAILURE); 1314 default: 1315 return (DDI_REGS_ACC_CONFLICT); 1316 } 1317 1318 switch (hp->ah_acc.devacc_attr_dataorder) { 1319 case DDI_STRICTORDER_ACC: 1320 break; 1321 case DDI_UNORDERED_OK_ACC: 1322 hp->ah_hat_flags |= HAT_UNORDERED_OK; 1323 break; 1324 case DDI_MERGING_OK_ACC: 1325 hp->ah_hat_flags |= HAT_MERGING_OK; 1326 break; 1327 case DDI_LOADCACHING_OK_ACC: 1328 hp->ah_hat_flags |= HAT_LOADCACHING_OK; 1329 break; 1330 case DDI_STORECACHING_OK_ACC: 1331 hp->ah_hat_flags |= HAT_STORECACHING_OK; 1332 break; 1333 default: 1334 return (DDI_FAILURE); 1335 } 1336 1337 rbase = (rootnex_addr_t)rp->regspec_addr & 1338 (~(rootnex_addr_t)MMU_PAGEOFFSET); 1339 pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET; 1340 1341 if (rp->regspec_size == 0) 1342 return (DDI_ME_INVAL); 1343 1344 #ifdef __xpv 1345 /* 1346 * If we're dom0, we're using a real device so we need to translate 1347 * the MA to a PA. 1348 */ 1349 if (DOMAIN_IS_INITDOMAIN(xen_info)) { 1350 pbase = pfn_to_pa(xen_assign_pfn(mmu_btop(rbase))) | 1351 (rbase & MMU_PAGEOFFSET); 1352 } else { 1353 pbase = rbase; 1354 } 1355 #else 1356 pbase = rbase; 1357 #endif 1358 1359 hp->ah_pfn = mmu_btop(pbase); 1360 hp->ah_pnum = mmu_btopr(rp->regspec_size + pgoffset); 1361 1362 return (DDI_SUCCESS); 1363 } 1364 1365 1366 1367 /* 1368 * ************************ 1369 * interrupt related code 1370 * ************************ 1371 */ 1372 1373 /* 1374 * rootnex_intr_ops() 1375 * bus_intr_op() function for interrupt support 1376 */ 1377 /* ARGSUSED */ 1378 static int 1379 rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip, ddi_intr_op_t intr_op, 1380 ddi_intr_handle_impl_t *hdlp, void *result) 1381 { 1382 struct intrspec *ispec; 1383 1384 DDI_INTR_NEXDBG((CE_CONT, 1385 "rootnex_intr_ops: pdip = %p, rdip = %p, intr_op = %x, hdlp = %p\n", 1386 (void *)pdip, (void *)rdip, intr_op, (void *)hdlp)); 1387 1388 /* Process the interrupt operation */ 1389 switch (intr_op) { 1390 case DDI_INTROP_GETCAP: 1391 /* First check with pcplusmp */ 1392 if (psm_intr_ops == NULL) 1393 return (DDI_FAILURE); 1394 1395 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_CAP, result)) { 1396 *(int *)result = 0; 1397 return (DDI_FAILURE); 1398 } 1399 break; 1400 case DDI_INTROP_SETCAP: 1401 if (psm_intr_ops == NULL) 1402 return (DDI_FAILURE); 1403 1404 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_CAP, result)) 1405 return (DDI_FAILURE); 1406 break; 1407 case DDI_INTROP_ALLOC: 1408 ASSERT(hdlp->ih_type == DDI_INTR_TYPE_FIXED); 1409 return (rootnex_alloc_intr_fixed(rdip, hdlp, result)); 1410 case DDI_INTROP_FREE: 1411 ASSERT(hdlp->ih_type == DDI_INTR_TYPE_FIXED); 1412 return (rootnex_free_intr_fixed(rdip, hdlp)); 1413 case DDI_INTROP_GETPRI: 1414 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 1415 return (DDI_FAILURE); 1416 *(int *)result = ispec->intrspec_pri; 1417 break; 1418 case DDI_INTROP_SETPRI: 1419 /* Validate the interrupt priority passed to us */ 1420 if (*(int *)result > LOCK_LEVEL) 1421 return (DDI_FAILURE); 1422 1423 /* Ensure that PSM is all initialized and ispec is ok */ 1424 if ((psm_intr_ops == NULL) || 1425 ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)) 1426 return (DDI_FAILURE); 1427 1428 /* Change the priority */ 1429 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_PRI, result) == 1430 PSM_FAILURE) 1431 return (DDI_FAILURE); 1432 1433 /* update the ispec with the new priority */ 1434 ispec->intrspec_pri = *(int *)result; 1435 break; 1436 case DDI_INTROP_ADDISR: 1437 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 1438 return (DDI_FAILURE); 1439 ispec->intrspec_func = hdlp->ih_cb_func; 1440 break; 1441 case DDI_INTROP_REMISR: 1442 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 1443 return (DDI_FAILURE); 1444 ispec->intrspec_func = (uint_t (*)()) 0; 1445 break; 1446 case DDI_INTROP_ENABLE: 1447 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 1448 return (DDI_FAILURE); 1449 1450 /* Call psmi to translate irq with the dip */ 1451 if (psm_intr_ops == NULL) 1452 return (DDI_FAILURE); 1453 1454 ((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec; 1455 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_XLATE_VECTOR, 1456 (int *)&hdlp->ih_vector) == PSM_FAILURE) 1457 return (DDI_FAILURE); 1458 1459 /* Add the interrupt handler */ 1460 if (!add_avintr((void *)hdlp, ispec->intrspec_pri, 1461 hdlp->ih_cb_func, DEVI(rdip)->devi_name, hdlp->ih_vector, 1462 hdlp->ih_cb_arg1, hdlp->ih_cb_arg2, NULL, rdip)) 1463 return (DDI_FAILURE); 1464 break; 1465 case DDI_INTROP_DISABLE: 1466 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 1467 return (DDI_FAILURE); 1468 1469 /* Call psm_ops() to translate irq with the dip */ 1470 if (psm_intr_ops == NULL) 1471 return (DDI_FAILURE); 1472 1473 ((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec; 1474 (void) (*psm_intr_ops)(rdip, hdlp, 1475 PSM_INTR_OP_XLATE_VECTOR, (int *)&hdlp->ih_vector); 1476 1477 /* Remove the interrupt handler */ 1478 rem_avintr((void *)hdlp, ispec->intrspec_pri, 1479 hdlp->ih_cb_func, hdlp->ih_vector); 1480 break; 1481 case DDI_INTROP_SETMASK: 1482 if (psm_intr_ops == NULL) 1483 return (DDI_FAILURE); 1484 1485 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_MASK, NULL)) 1486 return (DDI_FAILURE); 1487 break; 1488 case DDI_INTROP_CLRMASK: 1489 if (psm_intr_ops == NULL) 1490 return (DDI_FAILURE); 1491 1492 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_CLEAR_MASK, NULL)) 1493 return (DDI_FAILURE); 1494 break; 1495 case DDI_INTROP_GETPENDING: 1496 if (psm_intr_ops == NULL) 1497 return (DDI_FAILURE); 1498 1499 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_PENDING, 1500 result)) { 1501 *(int *)result = 0; 1502 return (DDI_FAILURE); 1503 } 1504 break; 1505 case DDI_INTROP_NAVAIL: 1506 case DDI_INTROP_NINTRS: 1507 *(int *)result = i_ddi_get_intx_nintrs(rdip); 1508 if (*(int *)result == 0) { 1509 /* 1510 * Special case for 'pcic' driver' only. This driver 1511 * driver is a child of 'isa' and 'rootnex' drivers. 1512 * 1513 * See detailed comments on this in the function 1514 * rootnex_get_ispec(). 1515 * 1516 * Children of 'pcic' send 'NINITR' request all the 1517 * way to rootnex driver. But, the 'pdp->par_nintr' 1518 * field may not initialized. So, we fake it here 1519 * to return 1 (a la what PCMCIA nexus does). 1520 */ 1521 if (strcmp(ddi_get_name(rdip), "pcic") == 0) 1522 *(int *)result = 1; 1523 else 1524 return (DDI_FAILURE); 1525 } 1526 break; 1527 case DDI_INTROP_SUPPORTED_TYPES: 1528 *(int *)result = DDI_INTR_TYPE_FIXED; /* Always ... */ 1529 break; 1530 default: 1531 return (DDI_FAILURE); 1532 } 1533 1534 return (DDI_SUCCESS); 1535 } 1536 1537 1538 /* 1539 * rootnex_get_ispec() 1540 * convert an interrupt number to an interrupt specification. 1541 * The interrupt number determines which interrupt spec will be 1542 * returned if more than one exists. 1543 * 1544 * Look into the parent private data area of the 'rdip' to find out 1545 * the interrupt specification. First check to make sure there is 1546 * one that matchs "inumber" and then return a pointer to it. 1547 * 1548 * Return NULL if one could not be found. 1549 * 1550 * NOTE: This is needed for rootnex_intr_ops() 1551 */ 1552 static struct intrspec * 1553 rootnex_get_ispec(dev_info_t *rdip, int inum) 1554 { 1555 struct ddi_parent_private_data *pdp = ddi_get_parent_data(rdip); 1556 1557 /* 1558 * Special case handling for drivers that provide their own 1559 * intrspec structures instead of relying on the DDI framework. 1560 * 1561 * A broken hardware driver in ON could potentially provide its 1562 * own intrspec structure, instead of relying on the hardware. 1563 * If these drivers are children of 'rootnex' then we need to 1564 * continue to provide backward compatibility to them here. 1565 * 1566 * Following check is a special case for 'pcic' driver which 1567 * was found to have broken hardwre andby provides its own intrspec. 1568 * 1569 * Verbatim comments from this driver are shown here: 1570 * "Don't use the ddi_add_intr since we don't have a 1571 * default intrspec in all cases." 1572 * 1573 * Since an 'ispec' may not be always created for it, 1574 * check for that and create one if so. 1575 * 1576 * NOTE: Currently 'pcic' is the only driver found to do this. 1577 */ 1578 if (!pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) { 1579 pdp->par_nintr = 1; 1580 pdp->par_intr = kmem_zalloc(sizeof (struct intrspec) * 1581 pdp->par_nintr, KM_SLEEP); 1582 } 1583 1584 /* Validate the interrupt number */ 1585 if (inum >= pdp->par_nintr) 1586 return (NULL); 1587 1588 /* Get the interrupt structure pointer and return that */ 1589 return ((struct intrspec *)&pdp->par_intr[inum]); 1590 } 1591 1592 /* 1593 * Allocate interrupt vector for FIXED (legacy) type. 1594 */ 1595 static int 1596 rootnex_alloc_intr_fixed(dev_info_t *rdip, ddi_intr_handle_impl_t *hdlp, 1597 void *result) 1598 { 1599 struct intrspec *ispec; 1600 ddi_intr_handle_impl_t info_hdl; 1601 int ret; 1602 int free_phdl = 0; 1603 apic_get_type_t type_info; 1604 1605 if (psm_intr_ops == NULL) 1606 return (DDI_FAILURE); 1607 1608 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 1609 return (DDI_FAILURE); 1610 1611 /* 1612 * If the PSM module is "APIX" then pass the request for it 1613 * to allocate the vector now. 1614 */ 1615 bzero(&info_hdl, sizeof (ddi_intr_handle_impl_t)); 1616 info_hdl.ih_private = &type_info; 1617 if ((*psm_intr_ops)(NULL, &info_hdl, PSM_INTR_OP_APIC_TYPE, NULL) == 1618 PSM_SUCCESS && strcmp(type_info.avgi_type, APIC_APIX_NAME) == 0) { 1619 if (hdlp->ih_private == NULL) { /* allocate phdl structure */ 1620 free_phdl = 1; 1621 i_ddi_alloc_intr_phdl(hdlp); 1622 } 1623 ((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec; 1624 ret = (*psm_intr_ops)(rdip, hdlp, 1625 PSM_INTR_OP_ALLOC_VECTORS, result); 1626 if (free_phdl) { /* free up the phdl structure */ 1627 free_phdl = 0; 1628 i_ddi_free_intr_phdl(hdlp); 1629 hdlp->ih_private = NULL; 1630 } 1631 } else { 1632 /* 1633 * No APIX module; fall back to the old scheme where the 1634 * interrupt vector is allocated during ddi_enable_intr() call. 1635 */ 1636 hdlp->ih_pri = ispec->intrspec_pri; 1637 *(int *)result = hdlp->ih_scratch1; 1638 ret = DDI_SUCCESS; 1639 } 1640 1641 return (ret); 1642 } 1643 1644 /* 1645 * Free up interrupt vector for FIXED (legacy) type. 1646 */ 1647 static int 1648 rootnex_free_intr_fixed(dev_info_t *rdip, ddi_intr_handle_impl_t *hdlp) 1649 { 1650 struct intrspec *ispec; 1651 struct ddi_parent_private_data *pdp; 1652 ddi_intr_handle_impl_t info_hdl; 1653 int ret; 1654 apic_get_type_t type_info; 1655 1656 if (psm_intr_ops == NULL) 1657 return (DDI_FAILURE); 1658 1659 /* 1660 * If the PSM module is "APIX" then pass the request for it 1661 * to free up the vector now. 1662 */ 1663 bzero(&info_hdl, sizeof (ddi_intr_handle_impl_t)); 1664 info_hdl.ih_private = &type_info; 1665 if ((*psm_intr_ops)(NULL, &info_hdl, PSM_INTR_OP_APIC_TYPE, NULL) == 1666 PSM_SUCCESS && strcmp(type_info.avgi_type, APIC_APIX_NAME) == 0) { 1667 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 1668 return (DDI_FAILURE); 1669 ((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec; 1670 ret = (*psm_intr_ops)(rdip, hdlp, 1671 PSM_INTR_OP_FREE_VECTORS, NULL); 1672 } else { 1673 /* 1674 * No APIX module; fall back to the old scheme where 1675 * the interrupt vector was already freed during 1676 * ddi_disable_intr() call. 1677 */ 1678 ret = DDI_SUCCESS; 1679 } 1680 1681 pdp = ddi_get_parent_data(rdip); 1682 1683 /* 1684 * Special case for 'pcic' driver' only. 1685 * If an intrspec was created for it, clean it up here 1686 * See detailed comments on this in the function 1687 * rootnex_get_ispec(). 1688 */ 1689 if (pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) { 1690 kmem_free(pdp->par_intr, sizeof (struct intrspec) * 1691 pdp->par_nintr); 1692 /* 1693 * Set it to zero; so that 1694 * DDI framework doesn't free it again 1695 */ 1696 pdp->par_intr = NULL; 1697 pdp->par_nintr = 0; 1698 } 1699 1700 return (ret); 1701 } 1702 1703 1704 /* 1705 * ****************** 1706 * dma related code 1707 * ****************** 1708 */ 1709 1710 /*ARGSUSED*/ 1711 static int 1712 rootnex_coredma_allochdl(dev_info_t *dip, dev_info_t *rdip, 1713 ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg, 1714 ddi_dma_handle_t *handlep) 1715 { 1716 uint64_t maxsegmentsize_ll; 1717 uint_t maxsegmentsize; 1718 ddi_dma_impl_t *hp; 1719 rootnex_dma_t *dma; 1720 uint64_t count_max; 1721 uint64_t seg; 1722 int kmflag; 1723 int e; 1724 1725 1726 /* convert our sleep flags */ 1727 if (waitfp == DDI_DMA_SLEEP) { 1728 kmflag = KM_SLEEP; 1729 } else { 1730 kmflag = KM_NOSLEEP; 1731 } 1732 1733 /* 1734 * We try to do only one memory allocation here. We'll do a little 1735 * pointer manipulation later. If the bind ends up taking more than 1736 * our prealloc's space, we'll have to allocate more memory in the 1737 * bind operation. Not great, but much better than before and the 1738 * best we can do with the current bind interfaces. 1739 */ 1740 hp = kmem_cache_alloc(rootnex_state->r_dmahdl_cache, kmflag); 1741 if (hp == NULL) 1742 return (DDI_DMA_NORESOURCES); 1743 1744 /* Do our pointer manipulation now, align the structures */ 1745 hp->dmai_private = (void *)(((uintptr_t)hp + 1746 (uintptr_t)sizeof (ddi_dma_impl_t) + 0x7) & ~0x7); 1747 dma = (rootnex_dma_t *)hp->dmai_private; 1748 dma->dp_prealloc_buffer = (uchar_t *)(((uintptr_t)dma + 1749 sizeof (rootnex_dma_t) + 0x7) & ~0x7); 1750 1751 /* setup the handle */ 1752 rootnex_clean_dmahdl(hp); 1753 hp->dmai_error.err_fep = NULL; 1754 hp->dmai_error.err_cf = NULL; 1755 dma->dp_dip = rdip; 1756 dma->dp_sglinfo.si_flags = attr->dma_attr_flags; 1757 dma->dp_sglinfo.si_min_addr = attr->dma_attr_addr_lo; 1758 1759 /* 1760 * The BOUNCE_ON_SEG workaround is not needed when an IOMMU 1761 * is being used. Set the upper limit to the seg value. 1762 * There will be enough DVMA space to always get addresses 1763 * that will match the constraints. 1764 */ 1765 if (IOMMU_USED(rdip) && 1766 (attr->dma_attr_flags & _DDI_DMA_BOUNCE_ON_SEG)) { 1767 dma->dp_sglinfo.si_max_addr = attr->dma_attr_seg; 1768 dma->dp_sglinfo.si_flags &= ~_DDI_DMA_BOUNCE_ON_SEG; 1769 } else 1770 dma->dp_sglinfo.si_max_addr = attr->dma_attr_addr_hi; 1771 1772 hp->dmai_minxfer = attr->dma_attr_minxfer; 1773 hp->dmai_burstsizes = attr->dma_attr_burstsizes; 1774 hp->dmai_rdip = rdip; 1775 hp->dmai_attr = *attr; 1776 1777 if (attr->dma_attr_seg >= dma->dp_sglinfo.si_max_addr) 1778 dma->dp_sglinfo.si_cancross = B_FALSE; 1779 else 1780 dma->dp_sglinfo.si_cancross = B_TRUE; 1781 1782 /* we don't need to worry about the SPL since we do a tryenter */ 1783 mutex_init(&dma->dp_mutex, NULL, MUTEX_DRIVER, NULL); 1784 1785 /* 1786 * Figure out our maximum segment size. If the segment size is greater 1787 * than 4G, we will limit it to (4G - 1) since the max size of a dma 1788 * object (ddi_dma_obj_t.dmao_size) is 32 bits. dma_attr_seg and 1789 * dma_attr_count_max are size-1 type values. 1790 * 1791 * Maximum segment size is the largest physically contiguous chunk of 1792 * memory that we can return from a bind (i.e. the maximum size of a 1793 * single cookie). 1794 */ 1795 1796 /* handle the rollover cases */ 1797 seg = attr->dma_attr_seg + 1; 1798 if (seg < attr->dma_attr_seg) { 1799 seg = attr->dma_attr_seg; 1800 } 1801 count_max = attr->dma_attr_count_max + 1; 1802 if (count_max < attr->dma_attr_count_max) { 1803 count_max = attr->dma_attr_count_max; 1804 } 1805 1806 /* 1807 * granularity may or may not be a power of two. If it isn't, we can't 1808 * use a simple mask. 1809 */ 1810 if (!ISP2(attr->dma_attr_granular)) { 1811 dma->dp_granularity_power_2 = B_FALSE; 1812 } else { 1813 dma->dp_granularity_power_2 = B_TRUE; 1814 } 1815 1816 /* 1817 * maxxfer should be a whole multiple of granularity. If we're going to 1818 * break up a window because we're greater than maxxfer, we might as 1819 * well make sure it's maxxfer is a whole multiple so we don't have to 1820 * worry about triming the window later on for this case. 1821 */ 1822 if (attr->dma_attr_granular > 1) { 1823 if (dma->dp_granularity_power_2) { 1824 dma->dp_maxxfer = attr->dma_attr_maxxfer - 1825 (attr->dma_attr_maxxfer & 1826 (attr->dma_attr_granular - 1)); 1827 } else { 1828 dma->dp_maxxfer = attr->dma_attr_maxxfer - 1829 (attr->dma_attr_maxxfer % attr->dma_attr_granular); 1830 } 1831 } else { 1832 dma->dp_maxxfer = attr->dma_attr_maxxfer; 1833 } 1834 1835 maxsegmentsize_ll = MIN(seg, dma->dp_maxxfer); 1836 maxsegmentsize_ll = MIN(maxsegmentsize_ll, count_max); 1837 if (maxsegmentsize_ll == 0 || (maxsegmentsize_ll > 0xFFFFFFFF)) { 1838 maxsegmentsize = 0xFFFFFFFF; 1839 } else { 1840 maxsegmentsize = maxsegmentsize_ll; 1841 } 1842 dma->dp_sglinfo.si_max_cookie_size = maxsegmentsize; 1843 dma->dp_sglinfo.si_segmask = attr->dma_attr_seg; 1844 1845 /* check the ddi_dma_attr arg to make sure it makes a little sense */ 1846 if (rootnex_alloc_check_parms) { 1847 e = rootnex_valid_alloc_parms(attr, maxsegmentsize); 1848 if (e != DDI_SUCCESS) { 1849 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_ALLOC_FAIL]); 1850 (void) rootnex_dma_freehdl(dip, rdip, 1851 (ddi_dma_handle_t)hp); 1852 return (e); 1853 } 1854 } 1855 1856 *handlep = (ddi_dma_handle_t)hp; 1857 1858 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1859 ROOTNEX_DPROBE1(rootnex__alloc__handle, uint64_t, 1860 rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1861 1862 return (DDI_SUCCESS); 1863 } 1864 1865 1866 /* 1867 * rootnex_dma_allochdl() 1868 * called from ddi_dma_alloc_handle(). 1869 */ 1870 static int 1871 rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_attr_t *attr, 1872 int (*waitfp)(caddr_t), caddr_t arg, ddi_dma_handle_t *handlep) 1873 { 1874 int retval = DDI_SUCCESS; 1875 #if defined(__amd64) && !defined(__xpv) 1876 1877 if (IOMMU_UNITIALIZED(rdip)) { 1878 retval = iommulib_nex_open(dip, rdip); 1879 1880 if (retval != DDI_SUCCESS && retval != DDI_ENOTSUP) 1881 return (retval); 1882 } 1883 1884 if (IOMMU_UNUSED(rdip)) { 1885 retval = rootnex_coredma_allochdl(dip, rdip, attr, waitfp, arg, 1886 handlep); 1887 } else { 1888 retval = iommulib_nexdma_allochdl(dip, rdip, attr, 1889 waitfp, arg, handlep); 1890 } 1891 #else 1892 retval = rootnex_coredma_allochdl(dip, rdip, attr, waitfp, arg, 1893 handlep); 1894 #endif 1895 switch (retval) { 1896 case DDI_DMA_NORESOURCES: 1897 if (waitfp != DDI_DMA_DONTWAIT) { 1898 ddi_set_callback(waitfp, arg, 1899 &rootnex_state->r_dvma_call_list_id); 1900 } 1901 break; 1902 case DDI_SUCCESS: 1903 ndi_fmc_insert(rdip, DMA_HANDLE, *handlep, NULL); 1904 break; 1905 default: 1906 break; 1907 } 1908 return (retval); 1909 } 1910 1911 /*ARGSUSED*/ 1912 static int 1913 rootnex_coredma_freehdl(dev_info_t *dip, dev_info_t *rdip, 1914 ddi_dma_handle_t handle) 1915 { 1916 ddi_dma_impl_t *hp; 1917 rootnex_dma_t *dma; 1918 1919 1920 hp = (ddi_dma_impl_t *)handle; 1921 dma = (rootnex_dma_t *)hp->dmai_private; 1922 1923 /* unbind should have been called first */ 1924 ASSERT(!dma->dp_inuse); 1925 1926 mutex_destroy(&dma->dp_mutex); 1927 kmem_cache_free(rootnex_state->r_dmahdl_cache, hp); 1928 1929 ROOTNEX_DPROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1930 ROOTNEX_DPROBE1(rootnex__free__handle, uint64_t, 1931 rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1932 1933 return (DDI_SUCCESS); 1934 } 1935 1936 /* 1937 * rootnex_dma_freehdl() 1938 * called from ddi_dma_free_handle(). 1939 */ 1940 static int 1941 rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle) 1942 { 1943 int ret; 1944 1945 ndi_fmc_remove(rdip, DMA_HANDLE, handle); 1946 #if defined(__amd64) && !defined(__xpv) 1947 if (IOMMU_USED(rdip)) 1948 ret = iommulib_nexdma_freehdl(dip, rdip, handle); 1949 else 1950 #endif 1951 ret = rootnex_coredma_freehdl(dip, rdip, handle); 1952 1953 if (rootnex_state->r_dvma_call_list_id) 1954 ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 1955 1956 return (ret); 1957 } 1958 1959 /*ARGSUSED*/ 1960 static int 1961 rootnex_coredma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 1962 ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 1963 ddi_dma_cookie_t *cookiep, uint_t *ccountp) 1964 { 1965 rootnex_sglinfo_t *sinfo; 1966 ddi_dma_obj_t *dmao; 1967 #if defined(__amd64) && !defined(__xpv) 1968 struct dvmaseg *dvs; 1969 ddi_dma_cookie_t *cookie; 1970 #endif 1971 ddi_dma_attr_t *attr; 1972 ddi_dma_impl_t *hp; 1973 rootnex_dma_t *dma; 1974 int kmflag; 1975 int e; 1976 uint_t ncookies; 1977 1978 hp = (ddi_dma_impl_t *)handle; 1979 dma = (rootnex_dma_t *)hp->dmai_private; 1980 dmao = &dma->dp_dma; 1981 sinfo = &dma->dp_sglinfo; 1982 attr = &hp->dmai_attr; 1983 1984 /* convert the sleep flags */ 1985 if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 1986 dma->dp_sleep_flags = kmflag = KM_SLEEP; 1987 } else { 1988 dma->dp_sleep_flags = kmflag = KM_NOSLEEP; 1989 } 1990 1991 hp->dmai_rflags = dmareq->dmar_flags & DMP_DDIFLAGS; 1992 1993 /* 1994 * This is useful for debugging a driver. Not as useful in a production 1995 * system. The only time this will fail is if you have a driver bug. 1996 */ 1997 if (rootnex_bind_check_inuse) { 1998 /* 1999 * No one else should ever have this lock unless someone else 2000 * is trying to use this handle. So contention on the lock 2001 * is the same as inuse being set. 2002 */ 2003 e = mutex_tryenter(&dma->dp_mutex); 2004 if (e == 0) { 2005 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 2006 return (DDI_DMA_INUSE); 2007 } 2008 if (dma->dp_inuse) { 2009 mutex_exit(&dma->dp_mutex); 2010 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 2011 return (DDI_DMA_INUSE); 2012 } 2013 dma->dp_inuse = B_TRUE; 2014 mutex_exit(&dma->dp_mutex); 2015 } 2016 2017 /* check the ddi_dma_attr arg to make sure it makes a little sense */ 2018 if (rootnex_bind_check_parms) { 2019 e = rootnex_valid_bind_parms(dmareq, attr); 2020 if (e != DDI_SUCCESS) { 2021 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 2022 rootnex_clean_dmahdl(hp); 2023 return (e); 2024 } 2025 } 2026 2027 /* save away the original bind info */ 2028 dma->dp_dma = dmareq->dmar_object; 2029 2030 #if defined(__amd64) && !defined(__xpv) 2031 if (IOMMU_USED(rdip)) { 2032 dmao = &dma->dp_dvma; 2033 e = iommulib_nexdma_mapobject(dip, rdip, handle, dmareq, dmao); 2034 switch (e) { 2035 case DDI_SUCCESS: 2036 if (sinfo->si_cancross || 2037 dmao->dmao_obj.dvma_obj.dv_nseg != 1 || 2038 dmao->dmao_size > sinfo->si_max_cookie_size) { 2039 dma->dp_dvma_used = B_TRUE; 2040 break; 2041 } 2042 sinfo->si_sgl_size = 1; 2043 hp->dmai_rflags |= DMP_NOSYNC; 2044 2045 dma->dp_dvma_used = B_TRUE; 2046 dma->dp_need_to_free_cookie = B_FALSE; 2047 2048 dvs = &dmao->dmao_obj.dvma_obj.dv_seg[0]; 2049 cookie = hp->dmai_cookie = dma->dp_cookies = 2050 (ddi_dma_cookie_t *)dma->dp_prealloc_buffer; 2051 cookie->dmac_laddress = dvs->dvs_start + 2052 dmao->dmao_obj.dvma_obj.dv_off; 2053 cookie->dmac_size = dvs->dvs_len; 2054 cookie->dmac_type = 0; 2055 2056 ROOTNEX_DPROBE1(rootnex__bind__dvmafast, dev_info_t *, 2057 rdip); 2058 goto fast; 2059 case DDI_ENOTSUP: 2060 break; 2061 default: 2062 rootnex_clean_dmahdl(hp); 2063 return (e); 2064 } 2065 } 2066 #endif 2067 2068 /* 2069 * Figure out a rough estimate of what maximum number of pages 2070 * this buffer could use (a high estimate of course). 2071 */ 2072 sinfo->si_max_pages = mmu_btopr(dma->dp_dma.dmao_size) + 1; 2073 2074 if (dma->dp_dvma_used) { 2075 /* 2076 * The number of physical pages is the worst case. 2077 * 2078 * For DVMA, the worst case is the length divided 2079 * by the maximum cookie length, plus 1. Add to that 2080 * the number of segment boundaries potentially crossed, and 2081 * the additional number of DVMA segments that was returned. 2082 * 2083 * In the normal case, for modern devices, si_cancross will 2084 * be false, and dv_nseg will be 1, and the fast path will 2085 * have been taken above. 2086 */ 2087 ncookies = (dma->dp_dma.dmao_size / sinfo->si_max_cookie_size) 2088 + 1; 2089 if (sinfo->si_cancross) 2090 ncookies += 2091 (dma->dp_dma.dmao_size / attr->dma_attr_seg) + 1; 2092 ncookies += (dmao->dmao_obj.dvma_obj.dv_nseg - 1); 2093 2094 sinfo->si_max_pages = MIN(sinfo->si_max_pages, ncookies); 2095 } 2096 2097 /* 2098 * We'll use the pre-allocated cookies for any bind that will *always* 2099 * fit (more important to be consistent, we don't want to create 2100 * additional degenerate cases). 2101 */ 2102 if (sinfo->si_max_pages <= rootnex_state->r_prealloc_cookies) { 2103 dma->dp_cookies = (ddi_dma_cookie_t *)dma->dp_prealloc_buffer; 2104 dma->dp_need_to_free_cookie = B_FALSE; 2105 ROOTNEX_DPROBE2(rootnex__bind__prealloc, dev_info_t *, rdip, 2106 uint_t, sinfo->si_max_pages); 2107 2108 /* 2109 * For anything larger than that, we'll go ahead and allocate the 2110 * maximum number of pages we expect to see. Hopefuly, we won't be 2111 * seeing this path in the fast path for high performance devices very 2112 * frequently. 2113 * 2114 * a ddi bind interface that allowed the driver to provide storage to 2115 * the bind interface would speed this case up. 2116 */ 2117 } else { 2118 /* 2119 * Save away how much memory we allocated. If we're doing a 2120 * nosleep, the alloc could fail... 2121 */ 2122 dma->dp_cookie_size = sinfo->si_max_pages * 2123 sizeof (ddi_dma_cookie_t); 2124 dma->dp_cookies = kmem_alloc(dma->dp_cookie_size, kmflag); 2125 if (dma->dp_cookies == NULL) { 2126 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 2127 rootnex_clean_dmahdl(hp); 2128 return (DDI_DMA_NORESOURCES); 2129 } 2130 dma->dp_need_to_free_cookie = B_TRUE; 2131 ROOTNEX_DPROBE2(rootnex__bind__alloc, dev_info_t *, rdip, 2132 uint_t, sinfo->si_max_pages); 2133 } 2134 hp->dmai_cookie = dma->dp_cookies; 2135 2136 /* 2137 * Get the real sgl. rootnex_get_sgl will fill in cookie array while 2138 * looking at the constraints in the dma structure. It will then put 2139 * some additional state about the sgl in the dma struct (i.e. is 2140 * the sgl clean, or do we need to do some munging; how many pages 2141 * need to be copied, etc.) 2142 */ 2143 if (dma->dp_dvma_used) 2144 rootnex_dvma_get_sgl(dmao, dma->dp_cookies, &dma->dp_sglinfo); 2145 else 2146 rootnex_get_sgl(dmao, dma->dp_cookies, &dma->dp_sglinfo); 2147 2148 out: 2149 ASSERT(sinfo->si_sgl_size <= sinfo->si_max_pages); 2150 /* if we don't need a copy buffer, we don't need to sync */ 2151 if (sinfo->si_copybuf_req == 0) { 2152 hp->dmai_rflags |= DMP_NOSYNC; 2153 } 2154 2155 /* 2156 * if we don't need the copybuf and we don't need to do a partial, we 2157 * hit the fast path. All the high performance devices should be trying 2158 * to hit this path. To hit this path, a device should be able to reach 2159 * all of memory, shouldn't try to bind more than it can transfer, and 2160 * the buffer shouldn't require more cookies than the driver/device can 2161 * handle [sgllen]). 2162 * 2163 * Note that negative values of dma_attr_sgllen are supposed 2164 * to mean unlimited, but we just cast them to mean a 2165 * "ridiculous large limit". This saves some extra checks on 2166 * hot paths. 2167 */ 2168 if ((sinfo->si_copybuf_req == 0) && 2169 (sinfo->si_sgl_size <= (unsigned)attr->dma_attr_sgllen) && 2170 (dmao->dmao_size <= dma->dp_maxxfer)) { 2171 fast: 2172 /* 2173 * If the driver supports FMA, insert the handle in the FMA DMA 2174 * handle cache. 2175 */ 2176 if (attr->dma_attr_flags & DDI_DMA_FLAGERR) 2177 hp->dmai_error.err_cf = rootnex_dma_check; 2178 2179 /* 2180 * copy out the first cookie and ccountp, set the cookie 2181 * pointer to the second cookie. The first cookie is passed 2182 * back on the stack. Additional cookies are accessed via 2183 * ddi_dma_nextcookie() 2184 */ 2185 *cookiep = dma->dp_cookies[0]; 2186 *ccountp = sinfo->si_sgl_size; 2187 hp->dmai_cookie++; 2188 hp->dmai_rflags &= ~DDI_DMA_PARTIAL; 2189 hp->dmai_ncookies = *ccountp; 2190 hp->dmai_curcookie = 1; 2191 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2192 ROOTNEX_DPROBE4(rootnex__bind__fast, dev_info_t *, rdip, 2193 uint64_t, rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS], 2194 uint_t, dmao->dmao_size, uint_t, *ccountp); 2195 2196 2197 return (DDI_DMA_MAPPED); 2198 } 2199 2200 /* 2201 * go to the slow path, we may need to alloc more memory, create 2202 * multiple windows, and munge up a sgl to make the device happy. 2203 */ 2204 2205 /* 2206 * With the IOMMU mapobject method used, we should never hit 2207 * the slow path. If we do, something is seriously wrong. 2208 * Clean up and return an error. 2209 */ 2210 2211 #if defined(__amd64) && !defined(__xpv) 2212 2213 if (dma->dp_dvma_used) { 2214 (void) iommulib_nexdma_unmapobject(dip, rdip, handle, 2215 &dma->dp_dvma); 2216 e = DDI_DMA_NOMAPPING; 2217 } else { 2218 #endif 2219 e = rootnex_bind_slowpath(hp, dmareq, dma, attr, &dma->dp_dma, 2220 kmflag); 2221 #if defined(__amd64) && !defined(__xpv) 2222 } 2223 #endif 2224 if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) { 2225 if (dma->dp_need_to_free_cookie) { 2226 kmem_free(dma->dp_cookies, dma->dp_cookie_size); 2227 } 2228 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 2229 rootnex_clean_dmahdl(hp); /* must be after free cookie */ 2230 return (e); 2231 } 2232 2233 /* 2234 * If the driver supports FMA, insert the handle in the FMA DMA handle 2235 * cache. 2236 */ 2237 if (attr->dma_attr_flags & DDI_DMA_FLAGERR) 2238 hp->dmai_error.err_cf = rootnex_dma_check; 2239 2240 /* if the first window uses the copy buffer, sync it for the device */ 2241 if ((dma->dp_window[dma->dp_current_win].wd_dosync) && 2242 (hp->dmai_rflags & DDI_DMA_WRITE)) { 2243 (void) rootnex_coredma_sync(dip, rdip, handle, 0, 0, 2244 DDI_DMA_SYNC_FORDEV); 2245 } 2246 2247 /* 2248 * copy out the first cookie and ccountp, set the cookie pointer to the 2249 * second cookie. Make sure the partial flag is set/cleared correctly. 2250 * If we have a partial map (i.e. multiple windows), the number of 2251 * cookies we return is the number of cookies in the first window. 2252 */ 2253 if (e == DDI_DMA_MAPPED) { 2254 hp->dmai_rflags &= ~DDI_DMA_PARTIAL; 2255 *ccountp = sinfo->si_sgl_size; 2256 hp->dmai_nwin = 1; 2257 } else { 2258 hp->dmai_rflags |= DDI_DMA_PARTIAL; 2259 *ccountp = dma->dp_window[dma->dp_current_win].wd_cookie_cnt; 2260 ASSERT(hp->dmai_nwin <= dma->dp_max_win); 2261 } 2262 *cookiep = dma->dp_cookies[0]; 2263 hp->dmai_cookie++; 2264 hp->dmai_ncookies = *ccountp; 2265 hp->dmai_curcookie = 1; 2266 2267 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2268 ROOTNEX_DPROBE4(rootnex__bind__slow, dev_info_t *, rdip, uint64_t, 2269 rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS], uint_t, 2270 dmao->dmao_size, uint_t, *ccountp); 2271 return (e); 2272 } 2273 2274 /* 2275 * rootnex_dma_bindhdl() 2276 * called from ddi_dma_addr_bind_handle() and ddi_dma_buf_bind_handle(). 2277 */ 2278 static int 2279 rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 2280 ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 2281 ddi_dma_cookie_t *cookiep, uint_t *ccountp) 2282 { 2283 int ret; 2284 #if defined(__amd64) && !defined(__xpv) 2285 if (IOMMU_USED(rdip)) 2286 ret = iommulib_nexdma_bindhdl(dip, rdip, handle, dmareq, 2287 cookiep, ccountp); 2288 else 2289 #endif 2290 ret = rootnex_coredma_bindhdl(dip, rdip, handle, dmareq, 2291 cookiep, ccountp); 2292 2293 if (ret == DDI_DMA_NORESOURCES && dmareq->dmar_fp != DDI_DMA_DONTWAIT) { 2294 ddi_set_callback(dmareq->dmar_fp, dmareq->dmar_arg, 2295 &rootnex_state->r_dvma_call_list_id); 2296 } 2297 2298 return (ret); 2299 } 2300 2301 2302 2303 /*ARGSUSED*/ 2304 static int 2305 rootnex_coredma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 2306 ddi_dma_handle_t handle) 2307 { 2308 ddi_dma_impl_t *hp; 2309 rootnex_dma_t *dma; 2310 int e; 2311 2312 hp = (ddi_dma_impl_t *)handle; 2313 dma = (rootnex_dma_t *)hp->dmai_private; 2314 2315 /* make sure the buffer wasn't free'd before calling unbind */ 2316 if (rootnex_unbind_verify_buffer) { 2317 e = rootnex_verify_buffer(dma); 2318 if (e != DDI_SUCCESS) { 2319 ASSERT(0); 2320 return (DDI_FAILURE); 2321 } 2322 } 2323 2324 /* sync the current window before unbinding the buffer */ 2325 if (dma->dp_window && dma->dp_window[dma->dp_current_win].wd_dosync && 2326 (hp->dmai_rflags & DDI_DMA_READ)) { 2327 (void) rootnex_coredma_sync(dip, rdip, handle, 0, 0, 2328 DDI_DMA_SYNC_FORCPU); 2329 } 2330 2331 /* 2332 * cleanup and copy buffer or window state. if we didn't use the copy 2333 * buffer or windows, there won't be much to do :-) 2334 */ 2335 rootnex_teardown_copybuf(dma); 2336 rootnex_teardown_windows(dma); 2337 2338 #if defined(__amd64) && !defined(__xpv) 2339 if (IOMMU_USED(rdip) && dma->dp_dvma_used) 2340 (void) iommulib_nexdma_unmapobject(dip, rdip, handle, 2341 &dma->dp_dvma); 2342 #endif 2343 2344 /* 2345 * If we had to allocate space to for the worse case sgl (it didn't 2346 * fit into our pre-allocate buffer), free that up now 2347 */ 2348 if (dma->dp_need_to_free_cookie) { 2349 kmem_free(dma->dp_cookies, dma->dp_cookie_size); 2350 } 2351 2352 /* 2353 * clean up the handle so it's ready for the next bind (i.e. if the 2354 * handle is reused). 2355 */ 2356 rootnex_clean_dmahdl(hp); 2357 hp->dmai_error.err_cf = NULL; 2358 2359 ROOTNEX_DPROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2360 ROOTNEX_DPROBE1(rootnex__unbind, uint64_t, 2361 rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2362 2363 return (DDI_SUCCESS); 2364 } 2365 2366 /* 2367 * rootnex_dma_unbindhdl() 2368 * called from ddi_dma_unbind_handle() 2369 */ 2370 /*ARGSUSED*/ 2371 static int 2372 rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 2373 ddi_dma_handle_t handle) 2374 { 2375 int ret; 2376 2377 #if defined(__amd64) && !defined(__xpv) 2378 if (IOMMU_USED(rdip)) 2379 ret = iommulib_nexdma_unbindhdl(dip, rdip, handle); 2380 else 2381 #endif 2382 ret = rootnex_coredma_unbindhdl(dip, rdip, handle); 2383 2384 if (rootnex_state->r_dvma_call_list_id) 2385 ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 2386 2387 return (ret); 2388 } 2389 2390 #if defined(__amd64) && !defined(__xpv) 2391 2392 static int 2393 rootnex_coredma_get_sleep_flags(ddi_dma_handle_t handle) 2394 { 2395 ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 2396 rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 2397 2398 if (dma->dp_sleep_flags != KM_SLEEP && 2399 dma->dp_sleep_flags != KM_NOSLEEP) 2400 cmn_err(CE_PANIC, "kmem sleep flags not set in DMA handle"); 2401 return (dma->dp_sleep_flags); 2402 } 2403 /*ARGSUSED*/ 2404 static void 2405 rootnex_coredma_reset_cookies(dev_info_t *dip, ddi_dma_handle_t handle) 2406 { 2407 ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 2408 rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 2409 rootnex_window_t *window; 2410 2411 if (dma->dp_window) { 2412 window = &dma->dp_window[dma->dp_current_win]; 2413 hp->dmai_cookie = window->wd_first_cookie; 2414 } else { 2415 hp->dmai_cookie = dma->dp_cookies; 2416 } 2417 hp->dmai_cookie++; 2418 hp->dmai_curcookie = 1; 2419 } 2420 2421 /*ARGSUSED*/ 2422 static int 2423 rootnex_coredma_get_cookies(dev_info_t *dip, ddi_dma_handle_t handle, 2424 ddi_dma_cookie_t **cookiepp, uint_t *ccountp) 2425 { 2426 int i; 2427 int km_flags; 2428 ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 2429 rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 2430 rootnex_window_t *window; 2431 ddi_dma_cookie_t *cp; 2432 ddi_dma_cookie_t *cookie; 2433 2434 ASSERT(*cookiepp == NULL); 2435 ASSERT(*ccountp == 0); 2436 2437 if (dma->dp_window) { 2438 window = &dma->dp_window[dma->dp_current_win]; 2439 cp = window->wd_first_cookie; 2440 *ccountp = window->wd_cookie_cnt; 2441 } else { 2442 cp = dma->dp_cookies; 2443 *ccountp = dma->dp_sglinfo.si_sgl_size; 2444 } 2445 2446 km_flags = rootnex_coredma_get_sleep_flags(handle); 2447 cookie = kmem_zalloc(sizeof (ddi_dma_cookie_t) * (*ccountp), km_flags); 2448 if (cookie == NULL) { 2449 return (DDI_DMA_NORESOURCES); 2450 } 2451 2452 for (i = 0; i < *ccountp; i++) { 2453 cookie[i].dmac_notused = cp[i].dmac_notused; 2454 cookie[i].dmac_type = cp[i].dmac_type; 2455 cookie[i].dmac_address = cp[i].dmac_address; 2456 cookie[i].dmac_size = cp[i].dmac_size; 2457 } 2458 2459 *cookiepp = cookie; 2460 2461 return (DDI_SUCCESS); 2462 } 2463 2464 /*ARGSUSED*/ 2465 static int 2466 rootnex_coredma_set_cookies(dev_info_t *dip, ddi_dma_handle_t handle, 2467 ddi_dma_cookie_t *cookiep, uint_t ccount) 2468 { 2469 ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 2470 rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 2471 rootnex_window_t *window; 2472 ddi_dma_cookie_t *cur_cookiep; 2473 2474 ASSERT(cookiep); 2475 ASSERT(ccount != 0); 2476 ASSERT(dma->dp_need_to_switch_cookies == B_FALSE); 2477 2478 if (dma->dp_window) { 2479 window = &dma->dp_window[dma->dp_current_win]; 2480 dma->dp_saved_cookies = window->wd_first_cookie; 2481 window->wd_first_cookie = cookiep; 2482 ASSERT(ccount == window->wd_cookie_cnt); 2483 cur_cookiep = (hp->dmai_cookie - dma->dp_saved_cookies) 2484 + window->wd_first_cookie; 2485 } else { 2486 dma->dp_saved_cookies = dma->dp_cookies; 2487 dma->dp_cookies = cookiep; 2488 ASSERT(ccount == dma->dp_sglinfo.si_sgl_size); 2489 cur_cookiep = (hp->dmai_cookie - dma->dp_saved_cookies) 2490 + dma->dp_cookies; 2491 } 2492 2493 dma->dp_need_to_switch_cookies = B_TRUE; 2494 hp->dmai_cookie = cur_cookiep; 2495 2496 return (DDI_SUCCESS); 2497 } 2498 2499 /*ARGSUSED*/ 2500 static int 2501 rootnex_coredma_clear_cookies(dev_info_t *dip, ddi_dma_handle_t handle) 2502 { 2503 ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 2504 rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 2505 rootnex_window_t *window; 2506 ddi_dma_cookie_t *cur_cookiep; 2507 ddi_dma_cookie_t *cookie_array; 2508 uint_t ccount; 2509 2510 /* check if cookies have not been switched */ 2511 if (dma->dp_need_to_switch_cookies == B_FALSE) 2512 return (DDI_SUCCESS); 2513 2514 ASSERT(dma->dp_saved_cookies); 2515 2516 if (dma->dp_window) { 2517 window = &dma->dp_window[dma->dp_current_win]; 2518 cookie_array = window->wd_first_cookie; 2519 window->wd_first_cookie = dma->dp_saved_cookies; 2520 dma->dp_saved_cookies = NULL; 2521 ccount = window->wd_cookie_cnt; 2522 cur_cookiep = (hp->dmai_cookie - cookie_array) 2523 + window->wd_first_cookie; 2524 } else { 2525 cookie_array = dma->dp_cookies; 2526 dma->dp_cookies = dma->dp_saved_cookies; 2527 dma->dp_saved_cookies = NULL; 2528 ccount = dma->dp_sglinfo.si_sgl_size; 2529 cur_cookiep = (hp->dmai_cookie - cookie_array) 2530 + dma->dp_cookies; 2531 } 2532 2533 kmem_free(cookie_array, sizeof (ddi_dma_cookie_t) * ccount); 2534 2535 hp->dmai_cookie = cur_cookiep; 2536 2537 dma->dp_need_to_switch_cookies = B_FALSE; 2538 2539 return (DDI_SUCCESS); 2540 } 2541 2542 #endif 2543 2544 static struct as * 2545 rootnex_get_as(ddi_dma_obj_t *dmao) 2546 { 2547 struct as *asp; 2548 2549 switch (dmao->dmao_type) { 2550 case DMA_OTYP_VADDR: 2551 case DMA_OTYP_BUFVADDR: 2552 asp = dmao->dmao_obj.virt_obj.v_as; 2553 if (asp == NULL) 2554 asp = &kas; 2555 break; 2556 default: 2557 asp = NULL; 2558 break; 2559 } 2560 return (asp); 2561 } 2562 2563 /* 2564 * rootnex_verify_buffer() 2565 * verify buffer wasn't free'd 2566 */ 2567 static int 2568 rootnex_verify_buffer(rootnex_dma_t *dma) 2569 { 2570 page_t **pplist; 2571 caddr_t vaddr; 2572 uint_t pcnt; 2573 uint_t poff; 2574 page_t *pp; 2575 char b; 2576 int i; 2577 2578 /* Figure out how many pages this buffer occupies */ 2579 if (dma->dp_dma.dmao_type == DMA_OTYP_PAGES) { 2580 poff = dma->dp_dma.dmao_obj.pp_obj.pp_offset & MMU_PAGEOFFSET; 2581 } else { 2582 vaddr = dma->dp_dma.dmao_obj.virt_obj.v_addr; 2583 poff = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2584 } 2585 pcnt = mmu_btopr(dma->dp_dma.dmao_size + poff); 2586 2587 switch (dma->dp_dma.dmao_type) { 2588 case DMA_OTYP_PAGES: 2589 /* 2590 * for a linked list of pp's walk through them to make sure 2591 * they're locked and not free. 2592 */ 2593 pp = dma->dp_dma.dmao_obj.pp_obj.pp_pp; 2594 for (i = 0; i < pcnt; i++) { 2595 if (PP_ISFREE(pp) || !PAGE_LOCKED(pp)) { 2596 return (DDI_FAILURE); 2597 } 2598 pp = pp->p_next; 2599 } 2600 break; 2601 2602 case DMA_OTYP_VADDR: 2603 case DMA_OTYP_BUFVADDR: 2604 pplist = dma->dp_dma.dmao_obj.virt_obj.v_priv; 2605 /* 2606 * for an array of pp's walk through them to make sure they're 2607 * not free. It's possible that they may not be locked. 2608 */ 2609 if (pplist) { 2610 for (i = 0; i < pcnt; i++) { 2611 if (PP_ISFREE(pplist[i])) { 2612 return (DDI_FAILURE); 2613 } 2614 } 2615 2616 /* For a virtual address, try to peek at each page */ 2617 } else { 2618 if (rootnex_get_as(&dma->dp_dma) == &kas) { 2619 for (i = 0; i < pcnt; i++) { 2620 if (ddi_peek8(NULL, vaddr, &b) == 2621 DDI_FAILURE) 2622 return (DDI_FAILURE); 2623 vaddr += MMU_PAGESIZE; 2624 } 2625 } 2626 } 2627 break; 2628 2629 default: 2630 cmn_err(CE_PANIC, "rootnex_verify_buffer: bad DMA object"); 2631 break; 2632 } 2633 2634 return (DDI_SUCCESS); 2635 } 2636 2637 2638 /* 2639 * rootnex_clean_dmahdl() 2640 * Clean the dma handle. This should be called on a handle alloc and an 2641 * unbind handle. Set the handle state to the default settings. 2642 */ 2643 static void 2644 rootnex_clean_dmahdl(ddi_dma_impl_t *hp) 2645 { 2646 rootnex_dma_t *dma; 2647 2648 2649 dma = (rootnex_dma_t *)hp->dmai_private; 2650 2651 hp->dmai_nwin = 0; 2652 dma->dp_current_cookie = 0; 2653 dma->dp_copybuf_size = 0; 2654 dma->dp_window = NULL; 2655 dma->dp_cbaddr = NULL; 2656 dma->dp_inuse = B_FALSE; 2657 dma->dp_dvma_used = B_FALSE; 2658 dma->dp_need_to_free_cookie = B_FALSE; 2659 dma->dp_need_to_switch_cookies = B_FALSE; 2660 dma->dp_saved_cookies = NULL; 2661 dma->dp_sleep_flags = KM_PANIC; 2662 dma->dp_need_to_free_window = B_FALSE; 2663 dma->dp_partial_required = B_FALSE; 2664 dma->dp_trim_required = B_FALSE; 2665 dma->dp_sglinfo.si_copybuf_req = 0; 2666 #if !defined(__amd64) 2667 dma->dp_cb_remaping = B_FALSE; 2668 dma->dp_kva = NULL; 2669 #endif 2670 2671 /* FMA related initialization */ 2672 hp->dmai_fault = 0; 2673 hp->dmai_fault_check = NULL; 2674 hp->dmai_fault_notify = NULL; 2675 hp->dmai_error.err_ena = 0; 2676 hp->dmai_error.err_status = DDI_FM_OK; 2677 hp->dmai_error.err_expected = DDI_FM_ERR_UNEXPECTED; 2678 hp->dmai_error.err_ontrap = NULL; 2679 2680 /* Cookie tracking */ 2681 hp->dmai_ncookies = 0; 2682 hp->dmai_curcookie = 0; 2683 } 2684 2685 2686 /* 2687 * rootnex_valid_alloc_parms() 2688 * Called in ddi_dma_alloc_handle path to validate its parameters. 2689 */ 2690 static int 2691 rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegmentsize) 2692 { 2693 if ((attr->dma_attr_seg < MMU_PAGEOFFSET) || 2694 (attr->dma_attr_count_max < MMU_PAGEOFFSET) || 2695 (attr->dma_attr_granular > MMU_PAGESIZE) || 2696 (attr->dma_attr_maxxfer < MMU_PAGESIZE)) { 2697 return (DDI_DMA_BADATTR); 2698 } 2699 2700 if (attr->dma_attr_addr_hi <= attr->dma_attr_addr_lo) { 2701 return (DDI_DMA_BADATTR); 2702 } 2703 2704 if ((attr->dma_attr_seg & MMU_PAGEOFFSET) != MMU_PAGEOFFSET || 2705 MMU_PAGESIZE & (attr->dma_attr_granular - 1) || 2706 attr->dma_attr_sgllen == 0) { 2707 return (DDI_DMA_BADATTR); 2708 } 2709 2710 /* We should be able to DMA into every byte offset in a page */ 2711 if (maxsegmentsize < MMU_PAGESIZE) { 2712 return (DDI_DMA_BADATTR); 2713 } 2714 2715 /* if we're bouncing on seg, seg must be <= addr_hi */ 2716 if ((attr->dma_attr_flags & _DDI_DMA_BOUNCE_ON_SEG) && 2717 (attr->dma_attr_seg > attr->dma_attr_addr_hi)) { 2718 return (DDI_DMA_BADATTR); 2719 } 2720 return (DDI_SUCCESS); 2721 } 2722 2723 /* 2724 * rootnex_valid_bind_parms() 2725 * Called in ddi_dma_*_bind_handle path to validate its parameters. 2726 */ 2727 /* ARGSUSED */ 2728 static int 2729 rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, ddi_dma_attr_t *attr) 2730 { 2731 #if !defined(__amd64) 2732 /* 2733 * we only support up to a 2G-1 transfer size on 32-bit kernels so 2734 * we can track the offset for the obsoleted interfaces. 2735 */ 2736 if (dmareq->dmar_object.dmao_size > 0x7FFFFFFF) { 2737 return (DDI_DMA_TOOBIG); 2738 } 2739 #endif 2740 2741 return (DDI_SUCCESS); 2742 } 2743 2744 2745 /* 2746 * rootnex_need_bounce_seg() 2747 * check to see if the buffer lives on both side of the seg. 2748 */ 2749 static boolean_t 2750 rootnex_need_bounce_seg(ddi_dma_obj_t *dmar_object, rootnex_sglinfo_t *sglinfo) 2751 { 2752 ddi_dma_atyp_t buftype; 2753 rootnex_addr_t raddr; 2754 boolean_t lower_addr; 2755 boolean_t upper_addr; 2756 uint64_t offset; 2757 page_t **pplist; 2758 uint64_t paddr; 2759 uint32_t psize; 2760 uint32_t size; 2761 caddr_t vaddr; 2762 uint_t pcnt; 2763 page_t *pp; 2764 2765 2766 /* shortcuts */ 2767 pplist = dmar_object->dmao_obj.virt_obj.v_priv; 2768 vaddr = dmar_object->dmao_obj.virt_obj.v_addr; 2769 buftype = dmar_object->dmao_type; 2770 size = dmar_object->dmao_size; 2771 2772 lower_addr = B_FALSE; 2773 upper_addr = B_FALSE; 2774 pcnt = 0; 2775 2776 /* 2777 * Process the first page to handle the initial offset of the buffer. 2778 * We'll use the base address we get later when we loop through all 2779 * the pages. 2780 */ 2781 if (buftype == DMA_OTYP_PAGES) { 2782 pp = dmar_object->dmao_obj.pp_obj.pp_pp; 2783 offset = dmar_object->dmao_obj.pp_obj.pp_offset & 2784 MMU_PAGEOFFSET; 2785 paddr = pfn_to_pa(pp->p_pagenum) + offset; 2786 psize = MIN(size, (MMU_PAGESIZE - offset)); 2787 pp = pp->p_next; 2788 sglinfo->si_asp = NULL; 2789 } else if (pplist != NULL) { 2790 offset = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2791 sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as; 2792 if (sglinfo->si_asp == NULL) { 2793 sglinfo->si_asp = &kas; 2794 } 2795 paddr = pfn_to_pa(pplist[pcnt]->p_pagenum); 2796 paddr += offset; 2797 psize = MIN(size, (MMU_PAGESIZE - offset)); 2798 pcnt++; 2799 } else { 2800 offset = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2801 sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as; 2802 if (sglinfo->si_asp == NULL) { 2803 sglinfo->si_asp = &kas; 2804 } 2805 paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat, vaddr)); 2806 paddr += offset; 2807 psize = MIN(size, (MMU_PAGESIZE - offset)); 2808 vaddr += psize; 2809 } 2810 2811 raddr = ROOTNEX_PADDR_TO_RBASE(paddr); 2812 2813 if ((raddr + psize) > sglinfo->si_segmask) { 2814 upper_addr = B_TRUE; 2815 } else { 2816 lower_addr = B_TRUE; 2817 } 2818 size -= psize; 2819 2820 /* 2821 * Walk through the rest of the pages in the buffer. Track to see 2822 * if we have pages on both sides of the segment boundary. 2823 */ 2824 while (size > 0) { 2825 /* partial or full page */ 2826 psize = MIN(size, MMU_PAGESIZE); 2827 2828 if (buftype == DMA_OTYP_PAGES) { 2829 /* get the paddr from the page_t */ 2830 ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp)); 2831 paddr = pfn_to_pa(pp->p_pagenum); 2832 pp = pp->p_next; 2833 } else if (pplist != NULL) { 2834 /* index into the array of page_t's to get the paddr */ 2835 ASSERT(!PP_ISFREE(pplist[pcnt])); 2836 paddr = pfn_to_pa(pplist[pcnt]->p_pagenum); 2837 pcnt++; 2838 } else { 2839 /* call into the VM to get the paddr */ 2840 paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat, 2841 vaddr)); 2842 vaddr += psize; 2843 } 2844 2845 raddr = ROOTNEX_PADDR_TO_RBASE(paddr); 2846 2847 if ((raddr + psize) > sglinfo->si_segmask) { 2848 upper_addr = B_TRUE; 2849 } else { 2850 lower_addr = B_TRUE; 2851 } 2852 /* 2853 * if the buffer lives both above and below the segment 2854 * boundary, or the current page is the page immediately 2855 * after the segment, we will use a copy/bounce buffer for 2856 * all pages > seg. 2857 */ 2858 if ((lower_addr && upper_addr) || 2859 (raddr == (sglinfo->si_segmask + 1))) { 2860 return (B_TRUE); 2861 } 2862 2863 size -= psize; 2864 } 2865 2866 return (B_FALSE); 2867 } 2868 2869 /* 2870 * rootnex_get_sgl() 2871 * Called in bind fastpath to get the sgl. Most of this will be replaced 2872 * with a call to the vm layer when vm2.0 comes around... 2873 */ 2874 static void 2875 rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl, 2876 rootnex_sglinfo_t *sglinfo) 2877 { 2878 ddi_dma_atyp_t buftype; 2879 rootnex_addr_t raddr; 2880 uint64_t last_page; 2881 uint64_t offset; 2882 uint64_t addrhi; 2883 uint64_t addrlo; 2884 uint64_t maxseg; 2885 page_t **pplist; 2886 uint64_t paddr; 2887 uint32_t psize; 2888 uint32_t size; 2889 caddr_t vaddr; 2890 uint_t pcnt; 2891 page_t *pp; 2892 uint_t cnt; 2893 2894 2895 /* shortcuts */ 2896 pplist = dmar_object->dmao_obj.virt_obj.v_priv; 2897 vaddr = dmar_object->dmao_obj.virt_obj.v_addr; 2898 maxseg = sglinfo->si_max_cookie_size; 2899 buftype = dmar_object->dmao_type; 2900 addrhi = sglinfo->si_max_addr; 2901 addrlo = sglinfo->si_min_addr; 2902 size = dmar_object->dmao_size; 2903 2904 pcnt = 0; 2905 cnt = 0; 2906 2907 2908 /* 2909 * check to see if we need to use the copy buffer for pages over 2910 * the segment attr. 2911 */ 2912 sglinfo->si_bounce_on_seg = B_FALSE; 2913 if (sglinfo->si_flags & _DDI_DMA_BOUNCE_ON_SEG) { 2914 sglinfo->si_bounce_on_seg = rootnex_need_bounce_seg( 2915 dmar_object, sglinfo); 2916 } 2917 2918 /* 2919 * if we were passed down a linked list of pages, i.e. pointer to 2920 * page_t, use this to get our physical address and buf offset. 2921 */ 2922 if (buftype == DMA_OTYP_PAGES) { 2923 pp = dmar_object->dmao_obj.pp_obj.pp_pp; 2924 ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp)); 2925 offset = dmar_object->dmao_obj.pp_obj.pp_offset & 2926 MMU_PAGEOFFSET; 2927 paddr = pfn_to_pa(pp->p_pagenum) + offset; 2928 psize = MIN(size, (MMU_PAGESIZE - offset)); 2929 pp = pp->p_next; 2930 sglinfo->si_asp = NULL; 2931 2932 /* 2933 * We weren't passed down a linked list of pages, but if we were passed 2934 * down an array of pages, use this to get our physical address and buf 2935 * offset. 2936 */ 2937 } else if (pplist != NULL) { 2938 ASSERT((buftype == DMA_OTYP_VADDR) || 2939 (buftype == DMA_OTYP_BUFVADDR)); 2940 2941 offset = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2942 sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as; 2943 if (sglinfo->si_asp == NULL) { 2944 sglinfo->si_asp = &kas; 2945 } 2946 2947 ASSERT(!PP_ISFREE(pplist[pcnt])); 2948 paddr = pfn_to_pa(pplist[pcnt]->p_pagenum); 2949 paddr += offset; 2950 psize = MIN(size, (MMU_PAGESIZE - offset)); 2951 pcnt++; 2952 2953 /* 2954 * All we have is a virtual address, we'll need to call into the VM 2955 * to get the physical address. 2956 */ 2957 } else { 2958 ASSERT((buftype == DMA_OTYP_VADDR) || 2959 (buftype == DMA_OTYP_BUFVADDR)); 2960 2961 offset = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2962 sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as; 2963 if (sglinfo->si_asp == NULL) { 2964 sglinfo->si_asp = &kas; 2965 } 2966 2967 paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat, vaddr)); 2968 paddr += offset; 2969 psize = MIN(size, (MMU_PAGESIZE - offset)); 2970 vaddr += psize; 2971 } 2972 2973 raddr = ROOTNEX_PADDR_TO_RBASE(paddr); 2974 2975 /* 2976 * Setup the first cookie with the physical address of the page and the 2977 * size of the page (which takes into account the initial offset into 2978 * the page. 2979 */ 2980 sgl[cnt].dmac_laddress = raddr; 2981 sgl[cnt].dmac_size = psize; 2982 sgl[cnt].dmac_type = 0; 2983 2984 /* 2985 * Save away the buffer offset into the page. We'll need this later in 2986 * the copy buffer code to help figure out the page index within the 2987 * buffer and the offset into the current page. 2988 */ 2989 sglinfo->si_buf_offset = offset; 2990 2991 /* 2992 * If we are using the copy buffer for anything over the segment 2993 * boundary, and this page is over the segment boundary. 2994 * OR 2995 * if the DMA engine can't reach the physical address. 2996 */ 2997 if (((sglinfo->si_bounce_on_seg) && 2998 ((raddr + psize) > sglinfo->si_segmask)) || 2999 ((raddr < addrlo) || ((raddr + psize) > addrhi))) { 3000 /* 3001 * Increase how much copy buffer we use. We always increase by 3002 * pagesize so we don't have to worry about converting offsets. 3003 * Set a flag in the cookies dmac_type to indicate that it uses 3004 * the copy buffer. If this isn't the last cookie, go to the 3005 * next cookie (since we separate each page which uses the copy 3006 * buffer in case the copy buffer is not physically contiguous. 3007 */ 3008 sglinfo->si_copybuf_req += MMU_PAGESIZE; 3009 sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF; 3010 if ((cnt + 1) < sglinfo->si_max_pages) { 3011 cnt++; 3012 sgl[cnt].dmac_laddress = 0; 3013 sgl[cnt].dmac_size = 0; 3014 sgl[cnt].dmac_type = 0; 3015 } 3016 } 3017 3018 /* 3019 * save this page's physical address so we can figure out if the next 3020 * page is physically contiguous. Keep decrementing size until we are 3021 * done with the buffer. 3022 */ 3023 last_page = raddr & MMU_PAGEMASK; 3024 size -= psize; 3025 3026 while (size > 0) { 3027 /* Get the size for this page (i.e. partial or full page) */ 3028 psize = MIN(size, MMU_PAGESIZE); 3029 3030 if (buftype == DMA_OTYP_PAGES) { 3031 /* get the paddr from the page_t */ 3032 ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp)); 3033 paddr = pfn_to_pa(pp->p_pagenum); 3034 pp = pp->p_next; 3035 } else if (pplist != NULL) { 3036 /* index into the array of page_t's to get the paddr */ 3037 ASSERT(!PP_ISFREE(pplist[pcnt])); 3038 paddr = pfn_to_pa(pplist[pcnt]->p_pagenum); 3039 pcnt++; 3040 } else { 3041 /* call into the VM to get the paddr */ 3042 paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat, 3043 vaddr)); 3044 vaddr += psize; 3045 } 3046 3047 raddr = ROOTNEX_PADDR_TO_RBASE(paddr); 3048 3049 /* 3050 * If we are using the copy buffer for anything over the 3051 * segment boundary, and this page is over the segment 3052 * boundary. 3053 * OR 3054 * if the DMA engine can't reach the physical address. 3055 */ 3056 if (((sglinfo->si_bounce_on_seg) && 3057 ((raddr + psize) > sglinfo->si_segmask)) || 3058 ((raddr < addrlo) || ((raddr + psize) > addrhi))) { 3059 3060 sglinfo->si_copybuf_req += MMU_PAGESIZE; 3061 3062 /* 3063 * if there is something in the current cookie, go to 3064 * the next one. We only want one page in a cookie which 3065 * uses the copybuf since the copybuf doesn't have to 3066 * be physically contiguous. 3067 */ 3068 if (sgl[cnt].dmac_size != 0) { 3069 cnt++; 3070 } 3071 sgl[cnt].dmac_laddress = raddr; 3072 sgl[cnt].dmac_size = psize; 3073 #if defined(__amd64) 3074 sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF; 3075 #else 3076 /* 3077 * save the buf offset for 32-bit kernel. used in the 3078 * obsoleted interfaces. 3079 */ 3080 sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF | 3081 (dmar_object->dmao_size - size); 3082 #endif 3083 /* if this isn't the last cookie, go to the next one */ 3084 if ((cnt + 1) < sglinfo->si_max_pages) { 3085 cnt++; 3086 sgl[cnt].dmac_laddress = 0; 3087 sgl[cnt].dmac_size = 0; 3088 sgl[cnt].dmac_type = 0; 3089 } 3090 3091 /* 3092 * this page didn't need the copy buffer, if it's not physically 3093 * contiguous, or it would put us over a segment boundary, or it 3094 * puts us over the max cookie size, or the current sgl doesn't 3095 * have anything in it. 3096 */ 3097 } else if (((last_page + MMU_PAGESIZE) != raddr) || 3098 !(raddr & sglinfo->si_segmask) || 3099 ((sgl[cnt].dmac_size + psize) > maxseg) || 3100 (sgl[cnt].dmac_size == 0)) { 3101 /* 3102 * if we're not already in a new cookie, go to the next 3103 * cookie. 3104 */ 3105 if (sgl[cnt].dmac_size != 0) { 3106 cnt++; 3107 } 3108 3109 /* save the cookie information */ 3110 sgl[cnt].dmac_laddress = raddr; 3111 sgl[cnt].dmac_size = psize; 3112 #if defined(__amd64) 3113 sgl[cnt].dmac_type = 0; 3114 #else 3115 /* 3116 * save the buf offset for 32-bit kernel. used in the 3117 * obsoleted interfaces. 3118 */ 3119 sgl[cnt].dmac_type = dmar_object->dmao_size - size; 3120 #endif 3121 3122 /* 3123 * this page didn't need the copy buffer, it is physically 3124 * contiguous with the last page, and it's <= the max cookie 3125 * size. 3126 */ 3127 } else { 3128 sgl[cnt].dmac_size += psize; 3129 3130 /* 3131 * if this exactly == the maximum cookie size, and 3132 * it isn't the last cookie, go to the next cookie. 3133 */ 3134 if (((sgl[cnt].dmac_size + psize) == maxseg) && 3135 ((cnt + 1) < sglinfo->si_max_pages)) { 3136 cnt++; 3137 sgl[cnt].dmac_laddress = 0; 3138 sgl[cnt].dmac_size = 0; 3139 sgl[cnt].dmac_type = 0; 3140 } 3141 } 3142 3143 /* 3144 * save this page's physical address so we can figure out if the 3145 * next page is physically contiguous. Keep decrementing size 3146 * until we are done with the buffer. 3147 */ 3148 last_page = raddr; 3149 size -= psize; 3150 } 3151 3152 /* we're done, save away how many cookies the sgl has */ 3153 if (sgl[cnt].dmac_size == 0) { 3154 ASSERT(cnt < sglinfo->si_max_pages); 3155 sglinfo->si_sgl_size = cnt; 3156 } else { 3157 sglinfo->si_sgl_size = cnt + 1; 3158 } 3159 } 3160 3161 static void 3162 rootnex_dvma_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl, 3163 rootnex_sglinfo_t *sglinfo) 3164 { 3165 uint64_t offset; 3166 uint64_t maxseg; 3167 uint64_t dvaddr; 3168 struct dvmaseg *dvs; 3169 uint64_t paddr; 3170 uint32_t psize, ssize; 3171 uint32_t size; 3172 uint_t cnt; 3173 int physcontig; 3174 3175 ASSERT(dmar_object->dmao_type == DMA_OTYP_DVADDR); 3176 3177 /* shortcuts */ 3178 maxseg = sglinfo->si_max_cookie_size; 3179 size = dmar_object->dmao_size; 3180 3181 cnt = 0; 3182 sglinfo->si_bounce_on_seg = B_FALSE; 3183 3184 dvs = dmar_object->dmao_obj.dvma_obj.dv_seg; 3185 offset = dmar_object->dmao_obj.dvma_obj.dv_off; 3186 ssize = dvs->dvs_len; 3187 paddr = dvs->dvs_start; 3188 paddr += offset; 3189 psize = MIN(ssize, (maxseg - offset)); 3190 dvaddr = paddr + psize; 3191 ssize -= psize; 3192 3193 sgl[cnt].dmac_laddress = paddr; 3194 sgl[cnt].dmac_size = psize; 3195 sgl[cnt].dmac_type = 0; 3196 3197 size -= psize; 3198 while (size > 0) { 3199 if (ssize == 0) { 3200 dvs++; 3201 ssize = dvs->dvs_len; 3202 dvaddr = dvs->dvs_start; 3203 physcontig = 0; 3204 } else 3205 physcontig = 1; 3206 3207 paddr = dvaddr; 3208 psize = MIN(ssize, maxseg); 3209 dvaddr += psize; 3210 ssize -= psize; 3211 3212 if (!physcontig || !(paddr & sglinfo->si_segmask) || 3213 ((sgl[cnt].dmac_size + psize) > maxseg) || 3214 (sgl[cnt].dmac_size == 0)) { 3215 /* 3216 * if we're not already in a new cookie, go to the next 3217 * cookie. 3218 */ 3219 if (sgl[cnt].dmac_size != 0) { 3220 cnt++; 3221 } 3222 3223 /* save the cookie information */ 3224 sgl[cnt].dmac_laddress = paddr; 3225 sgl[cnt].dmac_size = psize; 3226 sgl[cnt].dmac_type = 0; 3227 } else { 3228 sgl[cnt].dmac_size += psize; 3229 3230 /* 3231 * if this exactly == the maximum cookie size, and 3232 * it isn't the last cookie, go to the next cookie. 3233 */ 3234 if (((sgl[cnt].dmac_size + psize) == maxseg) && 3235 ((cnt + 1) < sglinfo->si_max_pages)) { 3236 cnt++; 3237 sgl[cnt].dmac_laddress = 0; 3238 sgl[cnt].dmac_size = 0; 3239 sgl[cnt].dmac_type = 0; 3240 } 3241 } 3242 size -= psize; 3243 } 3244 3245 /* we're done, save away how many cookies the sgl has */ 3246 if (sgl[cnt].dmac_size == 0) { 3247 sglinfo->si_sgl_size = cnt; 3248 } else { 3249 sglinfo->si_sgl_size = cnt + 1; 3250 } 3251 } 3252 3253 /* 3254 * rootnex_bind_slowpath() 3255 * Call in the bind path if the calling driver can't use the sgl without 3256 * modifying it. We either need to use the copy buffer and/or we will end up 3257 * with a partial bind. 3258 */ 3259 static int 3260 rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 3261 rootnex_dma_t *dma, ddi_dma_attr_t *attr, ddi_dma_obj_t *dmao, int kmflag) 3262 { 3263 rootnex_sglinfo_t *sinfo; 3264 rootnex_window_t *window; 3265 ddi_dma_cookie_t *cookie; 3266 size_t copybuf_used; 3267 size_t dmac_size; 3268 boolean_t partial; 3269 off_t cur_offset; 3270 page_t *cur_pp; 3271 major_t mnum; 3272 int e; 3273 int i; 3274 3275 3276 sinfo = &dma->dp_sglinfo; 3277 copybuf_used = 0; 3278 partial = B_FALSE; 3279 3280 /* 3281 * If we're using the copybuf, set the copybuf state in dma struct. 3282 * Needs to be first since it sets the copy buffer size. 3283 */ 3284 if (sinfo->si_copybuf_req != 0) { 3285 e = rootnex_setup_copybuf(hp, dmareq, dma, attr); 3286 if (e != DDI_SUCCESS) { 3287 return (e); 3288 } 3289 } else { 3290 dma->dp_copybuf_size = 0; 3291 } 3292 3293 /* 3294 * Figure out if we need to do a partial mapping. If so, figure out 3295 * if we need to trim the buffers when we munge the sgl. 3296 */ 3297 if ((dma->dp_copybuf_size < sinfo->si_copybuf_req) || 3298 (dmao->dmao_size > dma->dp_maxxfer) || 3299 ((unsigned)attr->dma_attr_sgllen < sinfo->si_sgl_size)) { 3300 dma->dp_partial_required = B_TRUE; 3301 if (attr->dma_attr_granular != 1) { 3302 dma->dp_trim_required = B_TRUE; 3303 } 3304 } else { 3305 dma->dp_partial_required = B_FALSE; 3306 dma->dp_trim_required = B_FALSE; 3307 } 3308 3309 /* If we need to do a partial bind, make sure the driver supports it */ 3310 if (dma->dp_partial_required && 3311 !(dmareq->dmar_flags & DDI_DMA_PARTIAL)) { 3312 3313 mnum = ddi_driver_major(dma->dp_dip); 3314 /* 3315 * patchable which allows us to print one warning per major 3316 * number. 3317 */ 3318 if ((rootnex_bind_warn) && 3319 ((rootnex_warn_list[mnum] & ROOTNEX_BIND_WARNING) == 0)) { 3320 rootnex_warn_list[mnum] |= ROOTNEX_BIND_WARNING; 3321 cmn_err(CE_WARN, "!%s: coding error detected, the " 3322 "driver is using ddi_dma_attr(9S) incorrectly. " 3323 "There is a small risk of data corruption in " 3324 "particular with large I/Os. The driver should be " 3325 "replaced with a corrected version for proper " 3326 "system operation. To disable this warning, add " 3327 "'set rootnex:rootnex_bind_warn=0' to " 3328 "/etc/system(4).", ddi_driver_name(dma->dp_dip)); 3329 } 3330 return (DDI_DMA_TOOBIG); 3331 } 3332 3333 /* 3334 * we might need multiple windows, setup state to handle them. In this 3335 * code path, we will have at least one window. 3336 */ 3337 e = rootnex_setup_windows(hp, dma, attr, dmao, kmflag); 3338 if (e != DDI_SUCCESS) { 3339 rootnex_teardown_copybuf(dma); 3340 return (e); 3341 } 3342 3343 window = &dma->dp_window[0]; 3344 cookie = &dma->dp_cookies[0]; 3345 cur_offset = 0; 3346 rootnex_init_win(hp, dma, window, cookie, cur_offset); 3347 if (dmao->dmao_type == DMA_OTYP_PAGES) { 3348 cur_pp = dmareq->dmar_object.dmao_obj.pp_obj.pp_pp; 3349 } 3350 3351 /* loop though all the cookies we got back from get_sgl() */ 3352 for (i = 0; i < sinfo->si_sgl_size; i++) { 3353 /* 3354 * If we're using the copy buffer, check this cookie and setup 3355 * its associated copy buffer state. If this cookie uses the 3356 * copy buffer, make sure we sync this window during dma_sync. 3357 */ 3358 if (dma->dp_copybuf_size > 0) { 3359 rootnex_setup_cookie(dmao, dma, cookie, 3360 cur_offset, ©buf_used, &cur_pp); 3361 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3362 window->wd_dosync = B_TRUE; 3363 } 3364 } 3365 3366 /* 3367 * save away the cookie size, since it could be modified in 3368 * the windowing code. 3369 */ 3370 dmac_size = cookie->dmac_size; 3371 3372 /* if we went over max copybuf size */ 3373 if (dma->dp_copybuf_size && 3374 (copybuf_used > dma->dp_copybuf_size)) { 3375 partial = B_TRUE; 3376 e = rootnex_copybuf_window_boundary(hp, dma, &window, 3377 cookie, cur_offset, ©buf_used); 3378 if (e != DDI_SUCCESS) { 3379 rootnex_teardown_copybuf(dma); 3380 rootnex_teardown_windows(dma); 3381 return (e); 3382 } 3383 3384 /* 3385 * if the coookie uses the copy buffer, make sure the 3386 * new window we just moved to is set to sync. 3387 */ 3388 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3389 window->wd_dosync = B_TRUE; 3390 } 3391 ROOTNEX_DPROBE1(rootnex__copybuf__window, dev_info_t *, 3392 dma->dp_dip); 3393 3394 /* if the cookie cnt == max sgllen, move to the next window */ 3395 } else if (window->wd_cookie_cnt >= 3396 (unsigned)attr->dma_attr_sgllen) { 3397 partial = B_TRUE; 3398 ASSERT(window->wd_cookie_cnt == attr->dma_attr_sgllen); 3399 e = rootnex_sgllen_window_boundary(hp, dma, &window, 3400 cookie, attr, cur_offset); 3401 if (e != DDI_SUCCESS) { 3402 rootnex_teardown_copybuf(dma); 3403 rootnex_teardown_windows(dma); 3404 return (e); 3405 } 3406 3407 /* 3408 * if the coookie uses the copy buffer, make sure the 3409 * new window we just moved to is set to sync. 3410 */ 3411 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3412 window->wd_dosync = B_TRUE; 3413 } 3414 ROOTNEX_DPROBE1(rootnex__sgllen__window, dev_info_t *, 3415 dma->dp_dip); 3416 3417 /* else if we will be over maxxfer */ 3418 } else if ((window->wd_size + dmac_size) > 3419 dma->dp_maxxfer) { 3420 partial = B_TRUE; 3421 e = rootnex_maxxfer_window_boundary(hp, dma, &window, 3422 cookie); 3423 if (e != DDI_SUCCESS) { 3424 rootnex_teardown_copybuf(dma); 3425 rootnex_teardown_windows(dma); 3426 return (e); 3427 } 3428 3429 /* 3430 * if the coookie uses the copy buffer, make sure the 3431 * new window we just moved to is set to sync. 3432 */ 3433 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3434 window->wd_dosync = B_TRUE; 3435 } 3436 ROOTNEX_DPROBE1(rootnex__maxxfer__window, dev_info_t *, 3437 dma->dp_dip); 3438 3439 /* else this cookie fits in the current window */ 3440 } else { 3441 window->wd_cookie_cnt++; 3442 window->wd_size += dmac_size; 3443 } 3444 3445 /* track our offset into the buffer, go to the next cookie */ 3446 ASSERT(dmac_size <= dmao->dmao_size); 3447 ASSERT(cookie->dmac_size <= dmac_size); 3448 cur_offset += dmac_size; 3449 cookie++; 3450 } 3451 3452 /* if we ended up with a zero sized window in the end, clean it up */ 3453 if (window->wd_size == 0) { 3454 hp->dmai_nwin--; 3455 window--; 3456 } 3457 3458 ASSERT(window->wd_trim.tr_trim_last == B_FALSE); 3459 3460 if (!partial) { 3461 return (DDI_DMA_MAPPED); 3462 } 3463 3464 ASSERT(dma->dp_partial_required); 3465 return (DDI_DMA_PARTIAL_MAP); 3466 } 3467 3468 /* 3469 * rootnex_setup_copybuf() 3470 * Called in bind slowpath. Figures out if we're going to use the copy 3471 * buffer, and if we do, sets up the basic state to handle it. 3472 */ 3473 static int 3474 rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 3475 rootnex_dma_t *dma, ddi_dma_attr_t *attr) 3476 { 3477 rootnex_sglinfo_t *sinfo; 3478 ddi_dma_attr_t lattr; 3479 size_t max_copybuf; 3480 int cansleep; 3481 int e; 3482 #if !defined(__amd64) 3483 int vmflag; 3484 #endif 3485 3486 ASSERT(!dma->dp_dvma_used); 3487 3488 sinfo = &dma->dp_sglinfo; 3489 3490 /* read this first so it's consistent through the routine */ 3491 max_copybuf = i_ddi_copybuf_size() & MMU_PAGEMASK; 3492 3493 /* We need to call into the rootnex on ddi_dma_sync() */ 3494 hp->dmai_rflags &= ~DMP_NOSYNC; 3495 3496 /* make sure the copybuf size <= the max size */ 3497 dma->dp_copybuf_size = MIN(sinfo->si_copybuf_req, max_copybuf); 3498 ASSERT((dma->dp_copybuf_size & MMU_PAGEOFFSET) == 0); 3499 3500 #if !defined(__amd64) 3501 /* 3502 * if we don't have kva space to copy to/from, allocate the KVA space 3503 * now. We only do this for the 32-bit kernel. We use seg kpm space for 3504 * the 64-bit kernel. 3505 */ 3506 if ((dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) || 3507 (dmareq->dmar_object.dmao_obj.virt_obj.v_as != NULL)) { 3508 3509 /* convert the sleep flags */ 3510 if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 3511 vmflag = VM_SLEEP; 3512 } else { 3513 vmflag = VM_NOSLEEP; 3514 } 3515 3516 /* allocate Kernel VA space that we can bcopy to/from */ 3517 dma->dp_kva = vmem_alloc(heap_arena, dma->dp_copybuf_size, 3518 vmflag); 3519 if (dma->dp_kva == NULL) { 3520 return (DDI_DMA_NORESOURCES); 3521 } 3522 } 3523 #endif 3524 3525 /* convert the sleep flags */ 3526 if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 3527 cansleep = 1; 3528 } else { 3529 cansleep = 0; 3530 } 3531 3532 /* 3533 * Allocate the actual copy buffer. This needs to fit within the DMA 3534 * engine limits, so we can't use kmem_alloc... We don't need 3535 * contiguous memory (sgllen) since we will be forcing windows on 3536 * sgllen anyway. 3537 */ 3538 lattr = *attr; 3539 lattr.dma_attr_align = MMU_PAGESIZE; 3540 lattr.dma_attr_sgllen = -1; /* no limit */ 3541 /* 3542 * if we're using the copy buffer because of seg, use that for our 3543 * upper address limit. 3544 */ 3545 if (sinfo->si_bounce_on_seg) { 3546 lattr.dma_attr_addr_hi = lattr.dma_attr_seg; 3547 } 3548 e = i_ddi_mem_alloc(dma->dp_dip, &lattr, dma->dp_copybuf_size, cansleep, 3549 0, NULL, &dma->dp_cbaddr, &dma->dp_cbsize, NULL); 3550 if (e != DDI_SUCCESS) { 3551 #if !defined(__amd64) 3552 if (dma->dp_kva != NULL) { 3553 vmem_free(heap_arena, dma->dp_kva, 3554 dma->dp_copybuf_size); 3555 } 3556 #endif 3557 return (DDI_DMA_NORESOURCES); 3558 } 3559 3560 ROOTNEX_DPROBE2(rootnex__alloc__copybuf, dev_info_t *, dma->dp_dip, 3561 size_t, dma->dp_copybuf_size); 3562 3563 return (DDI_SUCCESS); 3564 } 3565 3566 3567 /* 3568 * rootnex_setup_windows() 3569 * Called in bind slowpath to setup the window state. We always have windows 3570 * in the slowpath. Even if the window count = 1. 3571 */ 3572 static int 3573 rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3574 ddi_dma_attr_t *attr, ddi_dma_obj_t *dmao, int kmflag) 3575 { 3576 rootnex_window_t *windowp; 3577 rootnex_sglinfo_t *sinfo; 3578 size_t copy_state_size; 3579 size_t win_state_size; 3580 size_t state_available; 3581 size_t space_needed; 3582 uint_t copybuf_win; 3583 uint_t maxxfer_win; 3584 size_t space_used; 3585 uint_t sglwin; 3586 3587 3588 sinfo = &dma->dp_sglinfo; 3589 3590 dma->dp_current_win = 0; 3591 hp->dmai_nwin = 0; 3592 3593 /* If we don't need to do a partial, we only have one window */ 3594 if (!dma->dp_partial_required) { 3595 dma->dp_max_win = 1; 3596 3597 /* 3598 * we need multiple windows, need to figure out the worse case number 3599 * of windows. 3600 */ 3601 } else { 3602 /* 3603 * if we need windows because we need more copy buffer that 3604 * we allow, the worse case number of windows we could need 3605 * here would be (copybuf space required / copybuf space that 3606 * we have) plus one for remainder, and plus 2 to handle the 3607 * extra pages on the trim for the first and last pages of the 3608 * buffer (a page is the minimum window size so under the right 3609 * attr settings, you could have a window for each page). 3610 * The last page will only be hit here if the size is not a 3611 * multiple of the granularity (which theoretically shouldn't 3612 * be the case but never has been enforced, so we could have 3613 * broken things without it). 3614 */ 3615 if (sinfo->si_copybuf_req > dma->dp_copybuf_size) { 3616 ASSERT(dma->dp_copybuf_size > 0); 3617 copybuf_win = (sinfo->si_copybuf_req / 3618 dma->dp_copybuf_size) + 1 + 2; 3619 } else { 3620 copybuf_win = 0; 3621 } 3622 3623 /* 3624 * if we need windows because we have more cookies than the H/W 3625 * can handle, the number of windows we would need here would 3626 * be (cookie count / cookies count H/W supports minus 1[for 3627 * trim]) plus one for remainder. 3628 */ 3629 if ((unsigned)attr->dma_attr_sgllen < sinfo->si_sgl_size) { 3630 sglwin = (sinfo->si_sgl_size / 3631 (attr->dma_attr_sgllen - 1)) + 1; 3632 } else { 3633 sglwin = 0; 3634 } 3635 3636 /* 3637 * if we need windows because we're binding more memory than the 3638 * H/W can transfer at once, the number of windows we would need 3639 * here would be (xfer count / max xfer H/W supports) plus one 3640 * for remainder, and plus 2 to handle the extra pages on the 3641 * trim (see above comment about trim) 3642 */ 3643 if (dmao->dmao_size > dma->dp_maxxfer) { 3644 maxxfer_win = (dmao->dmao_size / 3645 dma->dp_maxxfer) + 1 + 2; 3646 } else { 3647 maxxfer_win = 0; 3648 } 3649 dma->dp_max_win = copybuf_win + sglwin + maxxfer_win; 3650 ASSERT(dma->dp_max_win > 0); 3651 } 3652 win_state_size = dma->dp_max_win * sizeof (rootnex_window_t); 3653 3654 /* 3655 * Get space for window and potential copy buffer state. Before we 3656 * go and allocate memory, see if we can get away with using what's 3657 * left in the pre-allocted state or the dynamically allocated sgl. 3658 */ 3659 space_used = (uintptr_t)(sinfo->si_sgl_size * 3660 sizeof (ddi_dma_cookie_t)); 3661 3662 /* if we dynamically allocated space for the cookies */ 3663 if (dma->dp_need_to_free_cookie) { 3664 /* if we have more space in the pre-allocted buffer, use it */ 3665 ASSERT(space_used <= dma->dp_cookie_size); 3666 if ((dma->dp_cookie_size - space_used) <= 3667 rootnex_state->r_prealloc_size) { 3668 state_available = rootnex_state->r_prealloc_size; 3669 windowp = (rootnex_window_t *)dma->dp_prealloc_buffer; 3670 3671 /* 3672 * else, we have more free space in the dynamically allocated 3673 * buffer, i.e. the buffer wasn't worse case fragmented so we 3674 * didn't need a lot of cookies. 3675 */ 3676 } else { 3677 state_available = dma->dp_cookie_size - space_used; 3678 windowp = (rootnex_window_t *) 3679 &dma->dp_cookies[sinfo->si_sgl_size]; 3680 } 3681 3682 /* we used the pre-alloced buffer */ 3683 } else { 3684 ASSERT(space_used <= rootnex_state->r_prealloc_size); 3685 state_available = rootnex_state->r_prealloc_size - space_used; 3686 windowp = (rootnex_window_t *) 3687 &dma->dp_cookies[sinfo->si_sgl_size]; 3688 } 3689 3690 /* 3691 * figure out how much state we need to track the copy buffer. Add an 3692 * addition 8 bytes for pointer alignemnt later. 3693 */ 3694 if (dma->dp_copybuf_size > 0) { 3695 copy_state_size = sinfo->si_max_pages * 3696 sizeof (rootnex_pgmap_t); 3697 } else { 3698 copy_state_size = 0; 3699 } 3700 /* add an additional 8 bytes for pointer alignment */ 3701 space_needed = win_state_size + copy_state_size + 0x8; 3702 3703 /* if we have enough space already, use it */ 3704 if (state_available >= space_needed) { 3705 dma->dp_window = windowp; 3706 dma->dp_need_to_free_window = B_FALSE; 3707 3708 /* not enough space, need to allocate more. */ 3709 } else { 3710 dma->dp_window = kmem_alloc(space_needed, kmflag); 3711 if (dma->dp_window == NULL) { 3712 return (DDI_DMA_NORESOURCES); 3713 } 3714 dma->dp_need_to_free_window = B_TRUE; 3715 dma->dp_window_size = space_needed; 3716 ROOTNEX_DPROBE2(rootnex__bind__sp__alloc, dev_info_t *, 3717 dma->dp_dip, size_t, space_needed); 3718 } 3719 3720 /* 3721 * we allocate copy buffer state and window state at the same time. 3722 * setup our copy buffer state pointers. Make sure it's aligned. 3723 */ 3724 if (dma->dp_copybuf_size > 0) { 3725 dma->dp_pgmap = (rootnex_pgmap_t *)(((uintptr_t) 3726 &dma->dp_window[dma->dp_max_win] + 0x7) & ~0x7); 3727 3728 #if !defined(__amd64) 3729 /* 3730 * make sure all pm_mapped, pm_vaddr, and pm_pp are set to 3731 * false/NULL. Should be quicker to bzero vs loop and set. 3732 */ 3733 bzero(dma->dp_pgmap, copy_state_size); 3734 #endif 3735 } else { 3736 dma->dp_pgmap = NULL; 3737 } 3738 3739 return (DDI_SUCCESS); 3740 } 3741 3742 3743 /* 3744 * rootnex_teardown_copybuf() 3745 * cleans up after rootnex_setup_copybuf() 3746 */ 3747 static void 3748 rootnex_teardown_copybuf(rootnex_dma_t *dma) 3749 { 3750 #if !defined(__amd64) 3751 int i; 3752 3753 /* 3754 * if we allocated kernel heap VMEM space, go through all the pages and 3755 * map out any of the ones that we're mapped into the kernel heap VMEM 3756 * arena. Then free the VMEM space. 3757 */ 3758 if (dma->dp_kva != NULL) { 3759 for (i = 0; i < dma->dp_sglinfo.si_max_pages; i++) { 3760 if (dma->dp_pgmap[i].pm_mapped) { 3761 hat_unload(kas.a_hat, dma->dp_pgmap[i].pm_kaddr, 3762 MMU_PAGESIZE, HAT_UNLOAD); 3763 dma->dp_pgmap[i].pm_mapped = B_FALSE; 3764 } 3765 } 3766 3767 vmem_free(heap_arena, dma->dp_kva, dma->dp_copybuf_size); 3768 } 3769 3770 #endif 3771 3772 /* if we allocated a copy buffer, free it */ 3773 if (dma->dp_cbaddr != NULL) { 3774 i_ddi_mem_free(dma->dp_cbaddr, NULL); 3775 } 3776 } 3777 3778 3779 /* 3780 * rootnex_teardown_windows() 3781 * cleans up after rootnex_setup_windows() 3782 */ 3783 static void 3784 rootnex_teardown_windows(rootnex_dma_t *dma) 3785 { 3786 /* 3787 * if we had to allocate window state on the last bind (because we 3788 * didn't have enough pre-allocated space in the handle), free it. 3789 */ 3790 if (dma->dp_need_to_free_window) { 3791 kmem_free(dma->dp_window, dma->dp_window_size); 3792 } 3793 } 3794 3795 3796 /* 3797 * rootnex_init_win() 3798 * Called in bind slow path during creation of a new window. Initializes 3799 * window state to default values. 3800 */ 3801 /*ARGSUSED*/ 3802 static void 3803 rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3804 rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset) 3805 { 3806 hp->dmai_nwin++; 3807 window->wd_dosync = B_FALSE; 3808 window->wd_offset = cur_offset; 3809 window->wd_size = 0; 3810 window->wd_first_cookie = cookie; 3811 window->wd_cookie_cnt = 0; 3812 window->wd_trim.tr_trim_first = B_FALSE; 3813 window->wd_trim.tr_trim_last = B_FALSE; 3814 window->wd_trim.tr_first_copybuf_win = B_FALSE; 3815 window->wd_trim.tr_last_copybuf_win = B_FALSE; 3816 #if !defined(__amd64) 3817 window->wd_remap_copybuf = dma->dp_cb_remaping; 3818 #endif 3819 } 3820 3821 3822 /* 3823 * rootnex_setup_cookie() 3824 * Called in the bind slow path when the sgl uses the copy buffer. If any of 3825 * the sgl uses the copy buffer, we need to go through each cookie, figure 3826 * out if it uses the copy buffer, and if it does, save away everything we'll 3827 * need during sync. 3828 */ 3829 static void 3830 rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, rootnex_dma_t *dma, 3831 ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used, 3832 page_t **cur_pp) 3833 { 3834 boolean_t copybuf_sz_power_2; 3835 rootnex_sglinfo_t *sinfo; 3836 paddr_t paddr; 3837 uint_t pidx; 3838 uint_t pcnt; 3839 off_t poff; 3840 #if defined(__amd64) 3841 pfn_t pfn; 3842 #else 3843 page_t **pplist; 3844 #endif 3845 3846 ASSERT(dmar_object->dmao_type != DMA_OTYP_DVADDR); 3847 3848 sinfo = &dma->dp_sglinfo; 3849 3850 /* 3851 * Calculate the page index relative to the start of the buffer. The 3852 * index to the current page for our buffer is the offset into the 3853 * first page of the buffer plus our current offset into the buffer 3854 * itself, shifted of course... 3855 */ 3856 pidx = (sinfo->si_buf_offset + cur_offset) >> MMU_PAGESHIFT; 3857 ASSERT(pidx < sinfo->si_max_pages); 3858 3859 /* if this cookie uses the copy buffer */ 3860 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3861 /* 3862 * NOTE: we know that since this cookie uses the copy buffer, it 3863 * is <= MMU_PAGESIZE. 3864 */ 3865 3866 /* 3867 * get the offset into the page. For the 64-bit kernel, get the 3868 * pfn which we'll use with seg kpm. 3869 */ 3870 poff = cookie->dmac_laddress & MMU_PAGEOFFSET; 3871 #if defined(__amd64) 3872 /* mfn_to_pfn() is a NOP on i86pc */ 3873 pfn = mfn_to_pfn(cookie->dmac_laddress >> MMU_PAGESHIFT); 3874 #endif /* __amd64 */ 3875 3876 /* figure out if the copybuf size is a power of 2 */ 3877 if (!ISP2(dma->dp_copybuf_size)) { 3878 copybuf_sz_power_2 = B_FALSE; 3879 } else { 3880 copybuf_sz_power_2 = B_TRUE; 3881 } 3882 3883 /* This page uses the copy buffer */ 3884 dma->dp_pgmap[pidx].pm_uses_copybuf = B_TRUE; 3885 3886 /* 3887 * save the copy buffer KVA that we'll use with this page. 3888 * if we still fit within the copybuf, it's a simple add. 3889 * otherwise, we need to wrap over using & or % accordingly. 3890 */ 3891 if ((*copybuf_used + MMU_PAGESIZE) <= dma->dp_copybuf_size) { 3892 dma->dp_pgmap[pidx].pm_cbaddr = dma->dp_cbaddr + 3893 *copybuf_used; 3894 } else { 3895 if (copybuf_sz_power_2) { 3896 dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)( 3897 (uintptr_t)dma->dp_cbaddr + 3898 (*copybuf_used & 3899 (dma->dp_copybuf_size - 1))); 3900 } else { 3901 dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)( 3902 (uintptr_t)dma->dp_cbaddr + 3903 (*copybuf_used % dma->dp_copybuf_size)); 3904 } 3905 } 3906 3907 /* 3908 * over write the cookie physical address with the address of 3909 * the physical address of the copy buffer page that we will 3910 * use. 3911 */ 3912 paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, 3913 dma->dp_pgmap[pidx].pm_cbaddr)) + poff; 3914 3915 cookie->dmac_laddress = ROOTNEX_PADDR_TO_RBASE(paddr); 3916 3917 /* if we have a kernel VA, it's easy, just save that address */ 3918 if ((dmar_object->dmao_type != DMA_OTYP_PAGES) && 3919 (sinfo->si_asp == &kas)) { 3920 /* 3921 * save away the page aligned virtual address of the 3922 * driver buffer. Offsets are handled in the sync code. 3923 */ 3924 dma->dp_pgmap[pidx].pm_kaddr = (caddr_t)(((uintptr_t) 3925 dmar_object->dmao_obj.virt_obj.v_addr + cur_offset) 3926 & MMU_PAGEMASK); 3927 #if !defined(__amd64) 3928 /* 3929 * we didn't need to, and will never need to map this 3930 * page. 3931 */ 3932 dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 3933 #endif 3934 3935 /* we don't have a kernel VA. We need one for the bcopy. */ 3936 } else { 3937 #if defined(__amd64) 3938 /* 3939 * for the 64-bit kernel, it's easy. We use seg kpm to 3940 * get a Kernel VA for the corresponding pfn. 3941 */ 3942 dma->dp_pgmap[pidx].pm_kaddr = hat_kpm_pfn2va(pfn); 3943 #else 3944 /* 3945 * for the 32-bit kernel, this is a pain. First we'll 3946 * save away the page_t or user VA for this page. This 3947 * is needed in rootnex_dma_win() when we switch to a 3948 * new window which requires us to re-map the copy 3949 * buffer. 3950 */ 3951 pplist = dmar_object->dmao_obj.virt_obj.v_priv; 3952 if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 3953 dma->dp_pgmap[pidx].pm_pp = *cur_pp; 3954 dma->dp_pgmap[pidx].pm_vaddr = NULL; 3955 } else if (pplist != NULL) { 3956 dma->dp_pgmap[pidx].pm_pp = pplist[pidx]; 3957 dma->dp_pgmap[pidx].pm_vaddr = NULL; 3958 } else { 3959 dma->dp_pgmap[pidx].pm_pp = NULL; 3960 dma->dp_pgmap[pidx].pm_vaddr = (caddr_t) 3961 (((uintptr_t) 3962 dmar_object->dmao_obj.virt_obj.v_addr + 3963 cur_offset) & MMU_PAGEMASK); 3964 } 3965 3966 /* 3967 * save away the page aligned virtual address which was 3968 * allocated from the kernel heap arena (taking into 3969 * account if we need more copy buffer than we alloced 3970 * and use multiple windows to handle this, i.e. &,%). 3971 * NOTE: there isn't and physical memory backing up this 3972 * virtual address space currently. 3973 */ 3974 if ((*copybuf_used + MMU_PAGESIZE) <= 3975 dma->dp_copybuf_size) { 3976 dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3977 (((uintptr_t)dma->dp_kva + *copybuf_used) & 3978 MMU_PAGEMASK); 3979 } else { 3980 if (copybuf_sz_power_2) { 3981 dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3982 (((uintptr_t)dma->dp_kva + 3983 (*copybuf_used & 3984 (dma->dp_copybuf_size - 1))) & 3985 MMU_PAGEMASK); 3986 } else { 3987 dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3988 (((uintptr_t)dma->dp_kva + 3989 (*copybuf_used % 3990 dma->dp_copybuf_size)) & 3991 MMU_PAGEMASK); 3992 } 3993 } 3994 3995 /* 3996 * if we haven't used up the available copy buffer yet, 3997 * map the kva to the physical page. 3998 */ 3999 if (!dma->dp_cb_remaping && ((*copybuf_used + 4000 MMU_PAGESIZE) <= dma->dp_copybuf_size)) { 4001 dma->dp_pgmap[pidx].pm_mapped = B_TRUE; 4002 if (dma->dp_pgmap[pidx].pm_pp != NULL) { 4003 i86_pp_map(dma->dp_pgmap[pidx].pm_pp, 4004 dma->dp_pgmap[pidx].pm_kaddr); 4005 } else { 4006 i86_va_map(dma->dp_pgmap[pidx].pm_vaddr, 4007 sinfo->si_asp, 4008 dma->dp_pgmap[pidx].pm_kaddr); 4009 } 4010 4011 /* 4012 * we've used up the available copy buffer, this page 4013 * will have to be mapped during rootnex_dma_win() when 4014 * we switch to a new window which requires a re-map 4015 * the copy buffer. (32-bit kernel only) 4016 */ 4017 } else { 4018 dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 4019 } 4020 #endif 4021 /* go to the next page_t */ 4022 if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 4023 *cur_pp = (*cur_pp)->p_next; 4024 } 4025 } 4026 4027 /* add to the copy buffer count */ 4028 *copybuf_used += MMU_PAGESIZE; 4029 4030 /* 4031 * This cookie doesn't use the copy buffer. Walk through the pages this 4032 * cookie occupies to reflect this. 4033 */ 4034 } else { 4035 /* 4036 * figure out how many pages the cookie occupies. We need to 4037 * use the original page offset of the buffer and the cookies 4038 * offset in the buffer to do this. 4039 */ 4040 poff = (sinfo->si_buf_offset + cur_offset) & MMU_PAGEOFFSET; 4041 pcnt = mmu_btopr(cookie->dmac_size + poff); 4042 4043 while (pcnt > 0) { 4044 #if !defined(__amd64) 4045 /* 4046 * the 32-bit kernel doesn't have seg kpm, so we need 4047 * to map in the driver buffer (if it didn't come down 4048 * with a kernel VA) on the fly. Since this page doesn't 4049 * use the copy buffer, it's not, or will it ever, have 4050 * to be mapped in. 4051 */ 4052 dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 4053 #endif 4054 dma->dp_pgmap[pidx].pm_uses_copybuf = B_FALSE; 4055 4056 /* 4057 * we need to update pidx and cur_pp or we'll loose 4058 * track of where we are. 4059 */ 4060 if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 4061 *cur_pp = (*cur_pp)->p_next; 4062 } 4063 pidx++; 4064 pcnt--; 4065 } 4066 } 4067 } 4068 4069 4070 /* 4071 * rootnex_sgllen_window_boundary() 4072 * Called in the bind slow path when the next cookie causes us to exceed (in 4073 * this case == since we start at 0 and sgllen starts at 1) the maximum sgl 4074 * length supported by the DMA H/W. 4075 */ 4076 static int 4077 rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 4078 rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, ddi_dma_attr_t *attr, 4079 off_t cur_offset) 4080 { 4081 off_t new_offset; 4082 size_t trim_sz; 4083 off_t coffset; 4084 4085 4086 /* 4087 * if we know we'll never have to trim, it's pretty easy. Just move to 4088 * the next window and init it. We're done. 4089 */ 4090 if (!dma->dp_trim_required) { 4091 (*windowp)++; 4092 rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 4093 (*windowp)->wd_cookie_cnt++; 4094 (*windowp)->wd_size = cookie->dmac_size; 4095 return (DDI_SUCCESS); 4096 } 4097 4098 /* figure out how much we need to trim from the window */ 4099 ASSERT(attr->dma_attr_granular != 0); 4100 if (dma->dp_granularity_power_2) { 4101 trim_sz = (*windowp)->wd_size & (attr->dma_attr_granular - 1); 4102 } else { 4103 trim_sz = (*windowp)->wd_size % attr->dma_attr_granular; 4104 } 4105 4106 /* The window's a whole multiple of granularity. We're done */ 4107 if (trim_sz == 0) { 4108 (*windowp)++; 4109 rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 4110 (*windowp)->wd_cookie_cnt++; 4111 (*windowp)->wd_size = cookie->dmac_size; 4112 return (DDI_SUCCESS); 4113 } 4114 4115 /* 4116 * The window's not a whole multiple of granularity, since we know this 4117 * is due to the sgllen, we need to go back to the last cookie and trim 4118 * that one, add the left over part of the old cookie into the new 4119 * window, and then add in the new cookie into the new window. 4120 */ 4121 4122 /* 4123 * make sure the driver isn't making us do something bad... Trimming and 4124 * sgllen == 1 don't go together. 4125 */ 4126 if (attr->dma_attr_sgllen == 1) { 4127 return (DDI_DMA_NOMAPPING); 4128 } 4129 4130 /* 4131 * first, setup the current window to account for the trim. Need to go 4132 * back to the last cookie for this. 4133 */ 4134 cookie--; 4135 (*windowp)->wd_trim.tr_trim_last = B_TRUE; 4136 (*windowp)->wd_trim.tr_last_cookie = cookie; 4137 (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 4138 ASSERT(cookie->dmac_size > trim_sz); 4139 (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 4140 (*windowp)->wd_size -= trim_sz; 4141 4142 /* save the buffer offsets for the next window */ 4143 coffset = cookie->dmac_size - trim_sz; 4144 new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 4145 4146 /* 4147 * set this now in case this is the first window. all other cases are 4148 * set in dma_win() 4149 */ 4150 cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 4151 4152 /* 4153 * initialize the next window using what's left over in the previous 4154 * cookie. 4155 */ 4156 (*windowp)++; 4157 rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 4158 (*windowp)->wd_cookie_cnt++; 4159 (*windowp)->wd_trim.tr_trim_first = B_TRUE; 4160 (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + coffset; 4161 (*windowp)->wd_trim.tr_first_size = trim_sz; 4162 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 4163 (*windowp)->wd_dosync = B_TRUE; 4164 } 4165 4166 /* 4167 * now go back to the current cookie and add it to the new window. set 4168 * the new window size to the what was left over from the previous 4169 * cookie and what's in the current cookie. 4170 */ 4171 cookie++; 4172 (*windowp)->wd_cookie_cnt++; 4173 (*windowp)->wd_size = trim_sz + cookie->dmac_size; 4174 4175 /* 4176 * trim plus the next cookie could put us over maxxfer (a cookie can be 4177 * a max size of maxxfer). Handle that case. 4178 */ 4179 if ((*windowp)->wd_size > dma->dp_maxxfer) { 4180 /* 4181 * maxxfer is already a whole multiple of granularity, and this 4182 * trim will be <= the previous trim (since a cookie can't be 4183 * larger than maxxfer). Make things simple here. 4184 */ 4185 trim_sz = (*windowp)->wd_size - dma->dp_maxxfer; 4186 (*windowp)->wd_trim.tr_trim_last = B_TRUE; 4187 (*windowp)->wd_trim.tr_last_cookie = cookie; 4188 (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 4189 (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 4190 (*windowp)->wd_size -= trim_sz; 4191 ASSERT((*windowp)->wd_size == dma->dp_maxxfer); 4192 4193 /* save the buffer offsets for the next window */ 4194 coffset = cookie->dmac_size - trim_sz; 4195 new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 4196 4197 /* setup the next window */ 4198 (*windowp)++; 4199 rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 4200 (*windowp)->wd_cookie_cnt++; 4201 (*windowp)->wd_trim.tr_trim_first = B_TRUE; 4202 (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + 4203 coffset; 4204 (*windowp)->wd_trim.tr_first_size = trim_sz; 4205 } 4206 4207 return (DDI_SUCCESS); 4208 } 4209 4210 4211 /* 4212 * rootnex_copybuf_window_boundary() 4213 * Called in bind slowpath when we get to a window boundary because we used 4214 * up all the copy buffer that we have. 4215 */ 4216 static int 4217 rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 4218 rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, off_t cur_offset, 4219 size_t *copybuf_used) 4220 { 4221 rootnex_sglinfo_t *sinfo; 4222 off_t new_offset; 4223 size_t trim_sz; 4224 paddr_t paddr; 4225 off_t coffset; 4226 uint_t pidx; 4227 off_t poff; 4228 4229 4230 sinfo = &dma->dp_sglinfo; 4231 4232 /* 4233 * the copy buffer should be a whole multiple of page size. We know that 4234 * this cookie is <= MMU_PAGESIZE. 4235 */ 4236 ASSERT(cookie->dmac_size <= MMU_PAGESIZE); 4237 4238 /* 4239 * from now on, all new windows in this bind need to be re-mapped during 4240 * ddi_dma_getwin() (32-bit kernel only). i.e. we ran out out copybuf 4241 * space... 4242 */ 4243 #if !defined(__amd64) 4244 dma->dp_cb_remaping = B_TRUE; 4245 #endif 4246 4247 /* reset copybuf used */ 4248 *copybuf_used = 0; 4249 4250 /* 4251 * if we don't have to trim (since granularity is set to 1), go to the 4252 * next window and add the current cookie to it. We know the current 4253 * cookie uses the copy buffer since we're in this code path. 4254 */ 4255 if (!dma->dp_trim_required) { 4256 (*windowp)++; 4257 rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 4258 4259 /* Add this cookie to the new window */ 4260 (*windowp)->wd_cookie_cnt++; 4261 (*windowp)->wd_size += cookie->dmac_size; 4262 *copybuf_used += MMU_PAGESIZE; 4263 return (DDI_SUCCESS); 4264 } 4265 4266 /* 4267 * *** may need to trim, figure it out. 4268 */ 4269 4270 /* figure out how much we need to trim from the window */ 4271 if (dma->dp_granularity_power_2) { 4272 trim_sz = (*windowp)->wd_size & 4273 (hp->dmai_attr.dma_attr_granular - 1); 4274 } else { 4275 trim_sz = (*windowp)->wd_size % hp->dmai_attr.dma_attr_granular; 4276 } 4277 4278 /* 4279 * if the window's a whole multiple of granularity, go to the next 4280 * window, init it, then add in the current cookie. We know the current 4281 * cookie uses the copy buffer since we're in this code path. 4282 */ 4283 if (trim_sz == 0) { 4284 (*windowp)++; 4285 rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 4286 4287 /* Add this cookie to the new window */ 4288 (*windowp)->wd_cookie_cnt++; 4289 (*windowp)->wd_size += cookie->dmac_size; 4290 *copybuf_used += MMU_PAGESIZE; 4291 return (DDI_SUCCESS); 4292 } 4293 4294 /* 4295 * *** We figured it out, we definitly need to trim 4296 */ 4297 4298 /* 4299 * make sure the driver isn't making us do something bad... 4300 * Trimming and sgllen == 1 don't go together. 4301 */ 4302 if (hp->dmai_attr.dma_attr_sgllen == 1) { 4303 return (DDI_DMA_NOMAPPING); 4304 } 4305 4306 /* 4307 * first, setup the current window to account for the trim. Need to go 4308 * back to the last cookie for this. Some of the last cookie will be in 4309 * the current window, and some of the last cookie will be in the new 4310 * window. All of the current cookie will be in the new window. 4311 */ 4312 cookie--; 4313 (*windowp)->wd_trim.tr_trim_last = B_TRUE; 4314 (*windowp)->wd_trim.tr_last_cookie = cookie; 4315 (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 4316 ASSERT(cookie->dmac_size > trim_sz); 4317 (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 4318 (*windowp)->wd_size -= trim_sz; 4319 4320 /* 4321 * we're trimming the last cookie (not the current cookie). So that 4322 * last cookie may have or may not have been using the copy buffer ( 4323 * we know the cookie passed in uses the copy buffer since we're in 4324 * this code path). 4325 * 4326 * If the last cookie doesn't use the copy buffer, nothing special to 4327 * do. However, if it does uses the copy buffer, it will be both the 4328 * last page in the current window and the first page in the next 4329 * window. Since we are reusing the copy buffer (and KVA space on the 4330 * 32-bit kernel), this page will use the end of the copy buffer in the 4331 * current window, and the start of the copy buffer in the next window. 4332 * Track that info... The cookie physical address was already set to 4333 * the copy buffer physical address in setup_cookie.. 4334 */ 4335 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 4336 pidx = (sinfo->si_buf_offset + (*windowp)->wd_offset + 4337 (*windowp)->wd_size) >> MMU_PAGESHIFT; 4338 (*windowp)->wd_trim.tr_last_copybuf_win = B_TRUE; 4339 (*windowp)->wd_trim.tr_last_pidx = pidx; 4340 (*windowp)->wd_trim.tr_last_cbaddr = 4341 dma->dp_pgmap[pidx].pm_cbaddr; 4342 #if !defined(__amd64) 4343 (*windowp)->wd_trim.tr_last_kaddr = 4344 dma->dp_pgmap[pidx].pm_kaddr; 4345 #endif 4346 } 4347 4348 /* save the buffer offsets for the next window */ 4349 coffset = cookie->dmac_size - trim_sz; 4350 new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 4351 4352 /* 4353 * set this now in case this is the first window. all other cases are 4354 * set in dma_win() 4355 */ 4356 cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 4357 4358 /* 4359 * initialize the next window using what's left over in the previous 4360 * cookie. 4361 */ 4362 (*windowp)++; 4363 rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 4364 (*windowp)->wd_cookie_cnt++; 4365 (*windowp)->wd_trim.tr_trim_first = B_TRUE; 4366 (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + coffset; 4367 (*windowp)->wd_trim.tr_first_size = trim_sz; 4368 4369 /* 4370 * again, we're tracking if the last cookie uses the copy buffer. 4371 * read the comment above for more info on why we need to track 4372 * additional state. 4373 * 4374 * For the first cookie in the new window, we need reset the physical 4375 * address to DMA into to the start of the copy buffer plus any 4376 * initial page offset which may be present. 4377 */ 4378 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 4379 (*windowp)->wd_dosync = B_TRUE; 4380 (*windowp)->wd_trim.tr_first_copybuf_win = B_TRUE; 4381 (*windowp)->wd_trim.tr_first_pidx = pidx; 4382 (*windowp)->wd_trim.tr_first_cbaddr = dma->dp_cbaddr; 4383 poff = (*windowp)->wd_trim.tr_first_paddr & MMU_PAGEOFFSET; 4384 4385 paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, dma->dp_cbaddr)) + 4386 poff; 4387 (*windowp)->wd_trim.tr_first_paddr = 4388 ROOTNEX_PADDR_TO_RBASE(paddr); 4389 4390 #if !defined(__amd64) 4391 (*windowp)->wd_trim.tr_first_kaddr = dma->dp_kva; 4392 #endif 4393 /* account for the cookie copybuf usage in the new window */ 4394 *copybuf_used += MMU_PAGESIZE; 4395 4396 /* 4397 * every piece of code has to have a hack, and here is this 4398 * ones :-) 4399 * 4400 * There is a complex interaction between setup_cookie and the 4401 * copybuf window boundary. The complexity had to be in either 4402 * the maxxfer window, or the copybuf window, and I chose the 4403 * copybuf code. 4404 * 4405 * So in this code path, we have taken the last cookie, 4406 * virtually broken it in half due to the trim, and it happens 4407 * to use the copybuf which further complicates life. At the 4408 * same time, we have already setup the current cookie, which 4409 * is now wrong. More background info: the current cookie uses 4410 * the copybuf, so it is only a page long max. So we need to 4411 * fix the current cookies copy buffer address, physical 4412 * address, and kva for the 32-bit kernel. We due this by 4413 * bumping them by page size (of course, we can't due this on 4414 * the physical address since the copy buffer may not be 4415 * physically contiguous). 4416 */ 4417 cookie++; 4418 dma->dp_pgmap[pidx + 1].pm_cbaddr += MMU_PAGESIZE; 4419 poff = cookie->dmac_laddress & MMU_PAGEOFFSET; 4420 4421 paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, 4422 dma->dp_pgmap[pidx + 1].pm_cbaddr)) + poff; 4423 cookie->dmac_laddress = ROOTNEX_PADDR_TO_RBASE(paddr); 4424 4425 #if !defined(__amd64) 4426 ASSERT(dma->dp_pgmap[pidx + 1].pm_mapped == B_FALSE); 4427 dma->dp_pgmap[pidx + 1].pm_kaddr += MMU_PAGESIZE; 4428 #endif 4429 } else { 4430 /* go back to the current cookie */ 4431 cookie++; 4432 } 4433 4434 /* 4435 * add the current cookie to the new window. set the new window size to 4436 * the what was left over from the previous cookie and what's in the 4437 * current cookie. 4438 */ 4439 (*windowp)->wd_cookie_cnt++; 4440 (*windowp)->wd_size = trim_sz + cookie->dmac_size; 4441 ASSERT((*windowp)->wd_size < dma->dp_maxxfer); 4442 4443 /* 4444 * we know that the cookie passed in always uses the copy buffer. We 4445 * wouldn't be here if it didn't. 4446 */ 4447 *copybuf_used += MMU_PAGESIZE; 4448 4449 return (DDI_SUCCESS); 4450 } 4451 4452 4453 /* 4454 * rootnex_maxxfer_window_boundary() 4455 * Called in bind slowpath when we get to a window boundary because we will 4456 * go over maxxfer. 4457 */ 4458 static int 4459 rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 4460 rootnex_window_t **windowp, ddi_dma_cookie_t *cookie) 4461 { 4462 size_t dmac_size; 4463 off_t new_offset; 4464 size_t trim_sz; 4465 off_t coffset; 4466 4467 4468 /* 4469 * calculate how much we have to trim off of the current cookie to equal 4470 * maxxfer. We don't have to account for granularity here since our 4471 * maxxfer already takes that into account. 4472 */ 4473 trim_sz = ((*windowp)->wd_size + cookie->dmac_size) - dma->dp_maxxfer; 4474 ASSERT(trim_sz <= cookie->dmac_size); 4475 ASSERT(trim_sz <= dma->dp_maxxfer); 4476 4477 /* save cookie size since we need it later and we might change it */ 4478 dmac_size = cookie->dmac_size; 4479 4480 /* 4481 * if we're not trimming the entire cookie, setup the current window to 4482 * account for the trim. 4483 */ 4484 if (trim_sz < cookie->dmac_size) { 4485 (*windowp)->wd_cookie_cnt++; 4486 (*windowp)->wd_trim.tr_trim_last = B_TRUE; 4487 (*windowp)->wd_trim.tr_last_cookie = cookie; 4488 (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 4489 (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 4490 (*windowp)->wd_size = dma->dp_maxxfer; 4491 4492 /* 4493 * set the adjusted cookie size now in case this is the first 4494 * window. All other windows are taken care of in get win 4495 */ 4496 cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 4497 } 4498 4499 /* 4500 * coffset is the current offset within the cookie, new_offset is the 4501 * current offset with the entire buffer. 4502 */ 4503 coffset = dmac_size - trim_sz; 4504 new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 4505 4506 /* initialize the next window */ 4507 (*windowp)++; 4508 rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 4509 (*windowp)->wd_cookie_cnt++; 4510 (*windowp)->wd_size = trim_sz; 4511 if (trim_sz < dmac_size) { 4512 (*windowp)->wd_trim.tr_trim_first = B_TRUE; 4513 (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + 4514 coffset; 4515 (*windowp)->wd_trim.tr_first_size = trim_sz; 4516 } 4517 4518 return (DDI_SUCCESS); 4519 } 4520 4521 4522 /*ARGSUSED*/ 4523 static int 4524 rootnex_coredma_sync(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 4525 off_t off, size_t len, uint_t cache_flags) 4526 { 4527 rootnex_sglinfo_t *sinfo; 4528 rootnex_pgmap_t *cbpage; 4529 rootnex_window_t *win; 4530 ddi_dma_impl_t *hp; 4531 rootnex_dma_t *dma; 4532 caddr_t fromaddr; 4533 caddr_t toaddr; 4534 uint_t psize; 4535 off_t offset; 4536 uint_t pidx; 4537 size_t size; 4538 off_t poff; 4539 int e; 4540 4541 4542 hp = (ddi_dma_impl_t *)handle; 4543 dma = (rootnex_dma_t *)hp->dmai_private; 4544 sinfo = &dma->dp_sglinfo; 4545 4546 /* 4547 * if we don't have any windows, we don't need to sync. A copybuf 4548 * will cause us to have at least one window. 4549 */ 4550 if (dma->dp_window == NULL) { 4551 return (DDI_SUCCESS); 4552 } 4553 4554 /* This window may not need to be sync'd */ 4555 win = &dma->dp_window[dma->dp_current_win]; 4556 if (!win->wd_dosync) { 4557 return (DDI_SUCCESS); 4558 } 4559 4560 /* handle off and len special cases */ 4561 if ((off == 0) || (rootnex_sync_ignore_params)) { 4562 offset = win->wd_offset; 4563 } else { 4564 offset = off; 4565 } 4566 if ((len == 0) || (rootnex_sync_ignore_params)) { 4567 size = win->wd_size; 4568 } else { 4569 size = len; 4570 } 4571 4572 /* check the sync args to make sure they make a little sense */ 4573 if (rootnex_sync_check_parms) { 4574 e = rootnex_valid_sync_parms(hp, win, offset, size, 4575 cache_flags); 4576 if (e != DDI_SUCCESS) { 4577 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_SYNC_FAIL]); 4578 return (DDI_FAILURE); 4579 } 4580 } 4581 4582 /* 4583 * special case the first page to handle the offset into the page. The 4584 * offset to the current page for our buffer is the offset into the 4585 * first page of the buffer plus our current offset into the buffer 4586 * itself, masked of course. 4587 */ 4588 poff = (sinfo->si_buf_offset + offset) & MMU_PAGEOFFSET; 4589 psize = MIN((MMU_PAGESIZE - poff), size); 4590 4591 /* go through all the pages that we want to sync */ 4592 while (size > 0) { 4593 /* 4594 * Calculate the page index relative to the start of the buffer. 4595 * The index to the current page for our buffer is the offset 4596 * into the first page of the buffer plus our current offset 4597 * into the buffer itself, shifted of course... 4598 */ 4599 pidx = (sinfo->si_buf_offset + offset) >> MMU_PAGESHIFT; 4600 ASSERT(pidx < sinfo->si_max_pages); 4601 4602 /* 4603 * if this page uses the copy buffer, we need to sync it, 4604 * otherwise, go on to the next page. 4605 */ 4606 cbpage = &dma->dp_pgmap[pidx]; 4607 ASSERT((cbpage->pm_uses_copybuf == B_TRUE) || 4608 (cbpage->pm_uses_copybuf == B_FALSE)); 4609 if (cbpage->pm_uses_copybuf) { 4610 /* cbaddr and kaddr should be page aligned */ 4611 ASSERT(((uintptr_t)cbpage->pm_cbaddr & 4612 MMU_PAGEOFFSET) == 0); 4613 ASSERT(((uintptr_t)cbpage->pm_kaddr & 4614 MMU_PAGEOFFSET) == 0); 4615 4616 /* 4617 * if we're copying for the device, we are going to 4618 * copy from the drivers buffer and to the rootnex 4619 * allocated copy buffer. 4620 */ 4621 if (cache_flags == DDI_DMA_SYNC_FORDEV) { 4622 fromaddr = cbpage->pm_kaddr + poff; 4623 toaddr = cbpage->pm_cbaddr + poff; 4624 ROOTNEX_DPROBE2(rootnex__sync__dev, 4625 dev_info_t *, dma->dp_dip, size_t, psize); 4626 4627 /* 4628 * if we're copying for the cpu/kernel, we are going to 4629 * copy from the rootnex allocated copy buffer to the 4630 * drivers buffer. 4631 */ 4632 } else { 4633 fromaddr = cbpage->pm_cbaddr + poff; 4634 toaddr = cbpage->pm_kaddr + poff; 4635 ROOTNEX_DPROBE2(rootnex__sync__cpu, 4636 dev_info_t *, dma->dp_dip, size_t, psize); 4637 } 4638 4639 bcopy(fromaddr, toaddr, psize); 4640 } 4641 4642 /* 4643 * decrement size until we're done, update our offset into the 4644 * buffer, and get the next page size. 4645 */ 4646 size -= psize; 4647 offset += psize; 4648 psize = MIN(MMU_PAGESIZE, size); 4649 4650 /* page offset is zero for the rest of this loop */ 4651 poff = 0; 4652 } 4653 4654 return (DDI_SUCCESS); 4655 } 4656 4657 /* 4658 * rootnex_dma_sync() 4659 * called from ddi_dma_sync() if DMP_NOSYNC is not set in hp->dmai_rflags. 4660 * We set DMP_NOSYNC if we're not using the copy buffer. If DMP_NOSYNC 4661 * is set, ddi_dma_sync() returns immediately passing back success. 4662 */ 4663 /*ARGSUSED*/ 4664 static int 4665 rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 4666 off_t off, size_t len, uint_t cache_flags) 4667 { 4668 #if defined(__amd64) && !defined(__xpv) 4669 if (IOMMU_USED(rdip)) { 4670 return (iommulib_nexdma_sync(dip, rdip, handle, off, len, 4671 cache_flags)); 4672 } 4673 #endif 4674 return (rootnex_coredma_sync(dip, rdip, handle, off, len, 4675 cache_flags)); 4676 } 4677 4678 /* 4679 * rootnex_valid_sync_parms() 4680 * checks the parameters passed to sync to verify they are correct. 4681 */ 4682 static int 4683 rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win, 4684 off_t offset, size_t size, uint_t cache_flags) 4685 { 4686 off_t woffset; 4687 4688 4689 /* 4690 * the first part of the test to make sure the offset passed in is 4691 * within the window. 4692 */ 4693 if (offset < win->wd_offset) { 4694 return (DDI_FAILURE); 4695 } 4696 4697 /* 4698 * second and last part of the test to make sure the offset and length 4699 * passed in is within the window. 4700 */ 4701 woffset = offset - win->wd_offset; 4702 if ((woffset + size) > win->wd_size) { 4703 return (DDI_FAILURE); 4704 } 4705 4706 /* 4707 * if we are sync'ing for the device, the DDI_DMA_WRITE flag should 4708 * be set too. 4709 */ 4710 if ((cache_flags == DDI_DMA_SYNC_FORDEV) && 4711 (hp->dmai_rflags & DDI_DMA_WRITE)) { 4712 return (DDI_SUCCESS); 4713 } 4714 4715 /* 4716 * at this point, either DDI_DMA_SYNC_FORCPU or DDI_DMA_SYNC_FORKERNEL 4717 * should be set. Also DDI_DMA_READ should be set in the flags. 4718 */ 4719 if (((cache_flags == DDI_DMA_SYNC_FORCPU) || 4720 (cache_flags == DDI_DMA_SYNC_FORKERNEL)) && 4721 (hp->dmai_rflags & DDI_DMA_READ)) { 4722 return (DDI_SUCCESS); 4723 } 4724 4725 return (DDI_FAILURE); 4726 } 4727 4728 4729 /*ARGSUSED*/ 4730 static int 4731 rootnex_coredma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 4732 uint_t win, off_t *offp, size_t *lenp, ddi_dma_cookie_t *cookiep, 4733 uint_t *ccountp) 4734 { 4735 rootnex_window_t *window; 4736 rootnex_trim_t *trim; 4737 ddi_dma_impl_t *hp; 4738 rootnex_dma_t *dma; 4739 ddi_dma_obj_t *dmao; 4740 #if !defined(__amd64) 4741 rootnex_sglinfo_t *sinfo; 4742 rootnex_pgmap_t *pmap; 4743 uint_t pidx; 4744 uint_t pcnt; 4745 off_t poff; 4746 int i; 4747 #endif 4748 4749 4750 hp = (ddi_dma_impl_t *)handle; 4751 dma = (rootnex_dma_t *)hp->dmai_private; 4752 #if !defined(__amd64) 4753 sinfo = &dma->dp_sglinfo; 4754 #endif 4755 4756 /* If we try and get a window which doesn't exist, return failure */ 4757 if (win >= hp->dmai_nwin) { 4758 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]); 4759 return (DDI_FAILURE); 4760 } 4761 4762 dmao = dma->dp_dvma_used ? &dma->dp_dvma : &dma->dp_dma; 4763 4764 /* 4765 * if we don't have any windows, and they're asking for the first 4766 * window, setup the cookie pointer to the first cookie in the bind. 4767 * setup our return values, then increment the cookie since we return 4768 * the first cookie on the stack. 4769 */ 4770 if (dma->dp_window == NULL) { 4771 if (win != 0) { 4772 ROOTNEX_DPROF_INC( 4773 &rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]); 4774 return (DDI_FAILURE); 4775 } 4776 hp->dmai_cookie = dma->dp_cookies; 4777 *offp = 0; 4778 *lenp = dmao->dmao_size; 4779 *ccountp = dma->dp_sglinfo.si_sgl_size; 4780 *cookiep = hp->dmai_cookie[0]; 4781 hp->dmai_cookie++; 4782 hp->dmai_ncookies = *ccountp; 4783 hp->dmai_curcookie = 1; 4784 return (DDI_SUCCESS); 4785 } 4786 4787 /* sync the old window before moving on to the new one */ 4788 window = &dma->dp_window[dma->dp_current_win]; 4789 if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_READ)) { 4790 (void) rootnex_coredma_sync(dip, rdip, handle, 0, 0, 4791 DDI_DMA_SYNC_FORCPU); 4792 } 4793 4794 #if !defined(__amd64) 4795 /* 4796 * before we move to the next window, if we need to re-map, unmap all 4797 * the pages in this window. 4798 */ 4799 if (dma->dp_cb_remaping) { 4800 /* 4801 * If we switch to this window again, we'll need to map in 4802 * on the fly next time. 4803 */ 4804 window->wd_remap_copybuf = B_TRUE; 4805 4806 /* 4807 * calculate the page index into the buffer where this window 4808 * starts, and the number of pages this window takes up. 4809 */ 4810 pidx = (sinfo->si_buf_offset + window->wd_offset) >> 4811 MMU_PAGESHIFT; 4812 poff = (sinfo->si_buf_offset + window->wd_offset) & 4813 MMU_PAGEOFFSET; 4814 pcnt = mmu_btopr(window->wd_size + poff); 4815 ASSERT((pidx + pcnt) <= sinfo->si_max_pages); 4816 4817 /* unmap pages which are currently mapped in this window */ 4818 for (i = 0; i < pcnt; i++) { 4819 if (dma->dp_pgmap[pidx].pm_mapped) { 4820 hat_unload(kas.a_hat, 4821 dma->dp_pgmap[pidx].pm_kaddr, MMU_PAGESIZE, 4822 HAT_UNLOAD); 4823 dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 4824 } 4825 pidx++; 4826 } 4827 } 4828 #endif 4829 4830 /* 4831 * Move to the new window. 4832 * NOTE: current_win must be set for sync to work right 4833 */ 4834 dma->dp_current_win = win; 4835 window = &dma->dp_window[win]; 4836 4837 /* if needed, adjust the first and/or last cookies for trim */ 4838 trim = &window->wd_trim; 4839 if (trim->tr_trim_first) { 4840 window->wd_first_cookie->dmac_laddress = trim->tr_first_paddr; 4841 window->wd_first_cookie->dmac_size = trim->tr_first_size; 4842 #if !defined(__amd64) 4843 window->wd_first_cookie->dmac_type = 4844 (window->wd_first_cookie->dmac_type & 4845 ROOTNEX_USES_COPYBUF) + window->wd_offset; 4846 #endif 4847 if (trim->tr_first_copybuf_win) { 4848 dma->dp_pgmap[trim->tr_first_pidx].pm_cbaddr = 4849 trim->tr_first_cbaddr; 4850 #if !defined(__amd64) 4851 dma->dp_pgmap[trim->tr_first_pidx].pm_kaddr = 4852 trim->tr_first_kaddr; 4853 #endif 4854 } 4855 } 4856 if (trim->tr_trim_last) { 4857 trim->tr_last_cookie->dmac_laddress = trim->tr_last_paddr; 4858 trim->tr_last_cookie->dmac_size = trim->tr_last_size; 4859 if (trim->tr_last_copybuf_win) { 4860 dma->dp_pgmap[trim->tr_last_pidx].pm_cbaddr = 4861 trim->tr_last_cbaddr; 4862 #if !defined(__amd64) 4863 dma->dp_pgmap[trim->tr_last_pidx].pm_kaddr = 4864 trim->tr_last_kaddr; 4865 #endif 4866 } 4867 } 4868 4869 /* 4870 * setup the cookie pointer to the first cookie in the window. setup 4871 * our return values, then increment the cookie since we return the 4872 * first cookie on the stack. 4873 */ 4874 hp->dmai_cookie = window->wd_first_cookie; 4875 *offp = window->wd_offset; 4876 *lenp = window->wd_size; 4877 *ccountp = window->wd_cookie_cnt; 4878 *cookiep = hp->dmai_cookie[0]; 4879 hp->dmai_ncookies = *ccountp; 4880 hp->dmai_curcookie = 1; 4881 hp->dmai_cookie++; 4882 4883 #if !defined(__amd64) 4884 /* re-map copybuf if required for this window */ 4885 if (dma->dp_cb_remaping) { 4886 /* 4887 * calculate the page index into the buffer where this 4888 * window starts. 4889 */ 4890 pidx = (sinfo->si_buf_offset + window->wd_offset) >> 4891 MMU_PAGESHIFT; 4892 ASSERT(pidx < sinfo->si_max_pages); 4893 4894 /* 4895 * the first page can get unmapped if it's shared with the 4896 * previous window. Even if the rest of this window is already 4897 * mapped in, we need to still check this one. 4898 */ 4899 pmap = &dma->dp_pgmap[pidx]; 4900 if ((pmap->pm_uses_copybuf) && (pmap->pm_mapped == B_FALSE)) { 4901 if (pmap->pm_pp != NULL) { 4902 pmap->pm_mapped = B_TRUE; 4903 i86_pp_map(pmap->pm_pp, pmap->pm_kaddr); 4904 } else if (pmap->pm_vaddr != NULL) { 4905 pmap->pm_mapped = B_TRUE; 4906 i86_va_map(pmap->pm_vaddr, sinfo->si_asp, 4907 pmap->pm_kaddr); 4908 } 4909 } 4910 pidx++; 4911 4912 /* map in the rest of the pages if required */ 4913 if (window->wd_remap_copybuf) { 4914 window->wd_remap_copybuf = B_FALSE; 4915 4916 /* figure out many pages this window takes up */ 4917 poff = (sinfo->si_buf_offset + window->wd_offset) & 4918 MMU_PAGEOFFSET; 4919 pcnt = mmu_btopr(window->wd_size + poff); 4920 ASSERT(((pidx - 1) + pcnt) <= sinfo->si_max_pages); 4921 4922 /* map pages which require it */ 4923 for (i = 1; i < pcnt; i++) { 4924 pmap = &dma->dp_pgmap[pidx]; 4925 if (pmap->pm_uses_copybuf) { 4926 ASSERT(pmap->pm_mapped == B_FALSE); 4927 if (pmap->pm_pp != NULL) { 4928 pmap->pm_mapped = B_TRUE; 4929 i86_pp_map(pmap->pm_pp, 4930 pmap->pm_kaddr); 4931 } else if (pmap->pm_vaddr != NULL) { 4932 pmap->pm_mapped = B_TRUE; 4933 i86_va_map(pmap->pm_vaddr, 4934 sinfo->si_asp, 4935 pmap->pm_kaddr); 4936 } 4937 } 4938 pidx++; 4939 } 4940 } 4941 } 4942 #endif 4943 4944 /* if the new window uses the copy buffer, sync it for the device */ 4945 if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_WRITE)) { 4946 (void) rootnex_coredma_sync(dip, rdip, handle, 0, 0, 4947 DDI_DMA_SYNC_FORDEV); 4948 } 4949 4950 return (DDI_SUCCESS); 4951 } 4952 4953 /* 4954 * rootnex_dma_win() 4955 * called from ddi_dma_getwin() 4956 */ 4957 /*ARGSUSED*/ 4958 static int 4959 rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 4960 uint_t win, off_t *offp, size_t *lenp, ddi_dma_cookie_t *cookiep, 4961 uint_t *ccountp) 4962 { 4963 #if defined(__amd64) && !defined(__xpv) 4964 if (IOMMU_USED(rdip)) { 4965 return (iommulib_nexdma_win(dip, rdip, handle, win, offp, lenp, 4966 cookiep, ccountp)); 4967 } 4968 #endif 4969 4970 return (rootnex_coredma_win(dip, rdip, handle, win, offp, lenp, 4971 cookiep, ccountp)); 4972 } 4973 4974 #if defined(__amd64) && !defined(__xpv) 4975 /*ARGSUSED*/ 4976 static int 4977 rootnex_coredma_hdl_setprivate(dev_info_t *dip, dev_info_t *rdip, 4978 ddi_dma_handle_t handle, void *v) 4979 { 4980 ddi_dma_impl_t *hp; 4981 rootnex_dma_t *dma; 4982 4983 hp = (ddi_dma_impl_t *)handle; 4984 dma = (rootnex_dma_t *)hp->dmai_private; 4985 dma->dp_iommu_private = v; 4986 4987 return (DDI_SUCCESS); 4988 } 4989 4990 /*ARGSUSED*/ 4991 static void * 4992 rootnex_coredma_hdl_getprivate(dev_info_t *dip, dev_info_t *rdip, 4993 ddi_dma_handle_t handle) 4994 { 4995 ddi_dma_impl_t *hp; 4996 rootnex_dma_t *dma; 4997 4998 hp = (ddi_dma_impl_t *)handle; 4999 dma = (rootnex_dma_t *)hp->dmai_private; 5000 5001 return (dma->dp_iommu_private); 5002 } 5003 #endif 5004 5005 /* 5006 * ************************ 5007 * obsoleted dma routines 5008 * ************************ 5009 */ 5010 5011 /* 5012 * rootnex_dma_mctl() 5013 * 5014 * We don't support this legacy interface any more on x86. 5015 */ 5016 /* ARGSUSED */ 5017 static int 5018 rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 5019 enum ddi_dma_ctlops request, off_t *offp, size_t *lenp, caddr_t *objpp, 5020 uint_t cache_flags) 5021 { 5022 /* 5023 * The only thing dma_mctl is usef for anymore is legacy SPARC 5024 * dvma and sbus-specific routines. 5025 */ 5026 return (DDI_FAILURE); 5027 } 5028 5029 /* 5030 * ********* 5031 * FMA Code 5032 * ********* 5033 */ 5034 5035 /* 5036 * rootnex_fm_init() 5037 * FMA init busop 5038 */ 5039 /* ARGSUSED */ 5040 static int 5041 rootnex_fm_init(dev_info_t *dip, dev_info_t *tdip, int tcap, 5042 ddi_iblock_cookie_t *ibc) 5043 { 5044 *ibc = rootnex_state->r_err_ibc; 5045 5046 return (ddi_system_fmcap); 5047 } 5048 5049 /* 5050 * rootnex_dma_check() 5051 * Function called after a dma fault occurred to find out whether the 5052 * fault address is associated with a driver that is able to handle faults 5053 * and recover from faults. 5054 */ 5055 /* ARGSUSED */ 5056 static int 5057 rootnex_dma_check(dev_info_t *dip, const void *handle, const void *addr, 5058 const void *not_used) 5059 { 5060 rootnex_window_t *window; 5061 uint64_t start_addr; 5062 uint64_t fault_addr; 5063 ddi_dma_impl_t *hp; 5064 rootnex_dma_t *dma; 5065 uint64_t end_addr; 5066 size_t csize; 5067 int i; 5068 int j; 5069 5070 5071 /* The driver has to set DDI_DMA_FLAGERR to recover from dma faults */ 5072 hp = (ddi_dma_impl_t *)handle; 5073 ASSERT(hp); 5074 5075 dma = (rootnex_dma_t *)hp->dmai_private; 5076 5077 /* Get the address that we need to search for */ 5078 fault_addr = *(uint64_t *)addr; 5079 5080 /* 5081 * if we don't have any windows, we can just walk through all the 5082 * cookies. 5083 */ 5084 if (dma->dp_window == NULL) { 5085 /* for each cookie */ 5086 for (i = 0; i < dma->dp_sglinfo.si_sgl_size; i++) { 5087 /* 5088 * if the faulted address is within the physical address 5089 * range of the cookie, return DDI_FM_NONFATAL. 5090 */ 5091 if ((fault_addr >= dma->dp_cookies[i].dmac_laddress) && 5092 (fault_addr <= (dma->dp_cookies[i].dmac_laddress + 5093 dma->dp_cookies[i].dmac_size))) { 5094 return (DDI_FM_NONFATAL); 5095 } 5096 } 5097 5098 /* fault_addr not within this DMA handle */ 5099 return (DDI_FM_UNKNOWN); 5100 } 5101 5102 /* we have mutiple windows, walk through each window */ 5103 for (i = 0; i < hp->dmai_nwin; i++) { 5104 window = &dma->dp_window[i]; 5105 5106 /* Go through all the cookies in the window */ 5107 for (j = 0; j < window->wd_cookie_cnt; j++) { 5108 5109 start_addr = window->wd_first_cookie[j].dmac_laddress; 5110 csize = window->wd_first_cookie[j].dmac_size; 5111 5112 /* 5113 * if we are trimming the first cookie in the window, 5114 * and this is the first cookie, adjust the start 5115 * address and size of the cookie to account for the 5116 * trim. 5117 */ 5118 if (window->wd_trim.tr_trim_first && (j == 0)) { 5119 start_addr = window->wd_trim.tr_first_paddr; 5120 csize = window->wd_trim.tr_first_size; 5121 } 5122 5123 /* 5124 * if we are trimming the last cookie in the window, 5125 * and this is the last cookie, adjust the start 5126 * address and size of the cookie to account for the 5127 * trim. 5128 */ 5129 if (window->wd_trim.tr_trim_last && 5130 (j == (window->wd_cookie_cnt - 1))) { 5131 start_addr = window->wd_trim.tr_last_paddr; 5132 csize = window->wd_trim.tr_last_size; 5133 } 5134 5135 end_addr = start_addr + csize; 5136 5137 /* 5138 * if the faulted address is within the physical 5139 * address of the cookie, return DDI_FM_NONFATAL. 5140 */ 5141 if ((fault_addr >= start_addr) && 5142 (fault_addr <= end_addr)) { 5143 return (DDI_FM_NONFATAL); 5144 } 5145 } 5146 } 5147 5148 /* fault_addr not within this DMA handle */ 5149 return (DDI_FM_UNKNOWN); 5150 } 5151 5152 /*ARGSUSED*/ 5153 static int 5154 rootnex_quiesce(dev_info_t *dip) 5155 { 5156 #if defined(__amd64) && !defined(__xpv) 5157 return (immu_quiesce()); 5158 #else 5159 return (DDI_SUCCESS); 5160 #endif 5161 } 5162 5163 #if defined(__xpv) 5164 void 5165 immu_init(void) 5166 { 5167 ; 5168 } 5169 5170 void 5171 immu_startup(void) 5172 { 5173 ; 5174 } 5175 /*ARGSUSED*/ 5176 void 5177 immu_physmem_update(uint64_t addr, uint64_t size) 5178 { 5179 ; 5180 } 5181 #endif 5182