1 /*
2 * This file and its contents are supplied under the terms of the
3 * Common Development and Distribution License ("CDDL"), version 1.0.
4 * You may only use this file in accordance with the terms of version
5 * 1.0 of the CDDL.
6 *
7 * A full copy of the text of the CDDL should have accompanied this
8 * source. A copy of the CDDL is also available via the Internet at
9 * http://www.illumos.org/license/CDDL.
10 */
11
12 /*
13 * Copyright 2026 Oxide Computer Company
14 */
15
16 /*
17 * Core nexus driver for I2C, SMBus, and someday I3C
18 * -------------------------------------------------
19 *
20 * The i2cnex driver is the heart of the I2C subsystem and is both a nexus
21 * driver and provides a series of character devices. This driver implements and
22 * provides:
23 *
24 * - Interfaces that our three primary driver classes plug into:
25 *
26 * 1) Controllers (<sys/i2c/controller.h>)
27 * 2) I2C Devices (<sys/i2c/client.h>)
28 * 3) Muxes (sys/i2c/mux.h>
29 *
30 * - Provides abstractions in the devices tree for the above as well as a
31 * series of minor nodes that users can interact with to add and remove
32 * devices as well as perform I/O. (<sys/i2c/ioctl.h>)
33 *
34 * - Implements the core synchronization and transaction processing on a
35 * per-I2C bus basis.
36 *
37 * ----------
38 * Background
39 * ----------
40 *
41 * I2C is a common form of two-wire bus protocol. The two wires refer to a
42 * shared data line and a separate shared clock line. To perform a transaction,
43 * an I2C controller drives the clock at a fixed frequency, and devices on the
44 * bus latch logical bits as the clock progresses based on whether the data line
45 * is a logic high or logic low. Transactions on the bus are framed in terms of
46 * a Start condition and Stop condition, which allows the controller to indicate
47 * it is taking control of the bus.
48 *
49 * I/O on the bus is generally framed as a series of 8-bit I/O segments followed
50 * by an explicit acknowledgement from the other end, which occurs by either the
51 * device (when writing) or the controller (when reading) driving the bus low.
52 * This is called an 'ack'. When there is no acknowledgement on the bus, this is
53 * called a 'nack'. Nacks can show up at different times in the protocol and
54 * have different meanings.
55 *
56 * The I2C bus is a shared bus, meaning the data and clock wires go to all
57 * devices on the bus. This requires a way for devices to distinguish
58 * themselves. This is done in I2C with a 7-bit address (though there are some
59 * extensions for 10-bit addresses). In general, addresses are not discoverable
60 * and instead you need to come with knowledge of what addresses belong to what
61 * devices on the bus. This is very different from PCIe or USB, where there is
62 * a standard way to discover what is at the other end of a connection. In
63 * addition, there are addresses that are explicitly reserved for special use
64 * cases at the beginning and end of the 7-bit address space.
65 *
66 * SMBus, or the System Management Bus, is similar to I2C and was created by
67 * Intel and Duracell in the 1990s. Originally it targeted batteries, but was
68 * gradually expanded and has been the primary interface in decades of Intel
69 * chipsets (though they do also have I2C and I3C now).
70 *
71 * SMBus is mostly compatible with I2C. It uses the same principles on the
72 * physical layer; however, SMBus has a fixed number of commands that can be
73 * sent on the wire with very explicit data payloads. Generally speaking, any
74 * SMBus transaction can be represented as an I2C transaction; however, the
75 * opposite is not true. Many SMBus controllers will only output the specific
76 * commands defined by the SMBus specification.
77 *
78 * In general, every SMBus command has a fixed command code that it includes.
79 * This is generally analogous to the register number. SMBus 2.0 is the most
80 * ubiquitous version of the standard. It defines 8-bit and 16-bit register
81 * reads and writes. It also has the notion of block reads and writes which
82 * include the number of bytes to be read or written in addition to the command
83 * register. Note, while I2C controllers can write this pattern, many devices do
84 * not support this.
85 *
86 * An example tree of devices might look something like:
87 *
88 * +------------+ +--------+ +-------------+ +-------------------+
89 * | Controller | | EEPROM | | Temp Sensor | | Voltage Regulator |
90 * +------------+ | 0x5e | | 0x48 | | 0x76 |
91 * | +--------+ +-------------+ +-------------------+
92 * | | | |
93 * +----------------+----------------+--------------------+
94 * |
95 * +-------+ +--------------------------+
96 * | 0 |---+--| DIMM A, 0x10, 0x30, 0x50 |
97 * | | | +---------------------------+
98 * | Mux | +---| DIMM B, 0x11, 0x31, 0x51 |
99 * | 0x72 | +--------------------------+
100 * | | +--------------------------+
101 * | 1 |---+--| DIMM C, 0x10, 0x30, 0x50 |
102 * +-------+ | +---------------------------+
103 * +---| DIMM D, 0x11, 0x31, 0x51 |
104 * +--------------------------+
105 *
106 * Here, we have a controller. The multiplexor (mux), EEPROM, voltage regulator
107 * (VR) temperature sensor are all on the same bus with different addresses.
108 * Downstream of the two mux ports, 0 and 1, are devices that have the same
109 * address (DIMM A and C, B and D). The mux may have either leg 0 enabled, leg 1
110 * enabled, or neither. However, it critically can't have both which helps avoid
111 * the address conflict.
112 *
113 * An important property to emphasize is that only one I/O may be going on at
114 * any time on the bus and all I/O is initiated by the controller (ignoring
115 * SMBus host notifications). This ends up playing a lot into the overall system
116 * design. If someone else tries to talk on the bus at the same time, this is
117 * considered a collision and will cause an error.
118 *
119 * ------------
120 * Key Concepts
121 * ------------
122 *
123 * This section introduces the different entities and concepts that are used
124 * thought the broader I2C framework.
125 *
126 * CONTROLLER
127 *
128 * Controllers are devices that know how to speak the I2C or SMBus
129 * protocol. Requests go through these devices to get on the wire. These
130 * are generally PCI or MMIO devices themselves. Controllers implement the
131 * I2C controller interface in <sys/i2c/controller.h>. Controllers are
132 * enumerated based upon discovering the aforementioned PCI or MMIO devices
133 * and as a result are the start of this portion of the /devices tree.
134 *
135 * In addition to the standard device node that exists for the PCI/MMIO
136 * device, there is an instance of i2cnex created under the controller,
137 * which represents the root of the I2C tree. A controller is represented
138 * by the i2c_ctrl_t structure.
139 *
140 * DEVICE
141 *
142 * A device is a target on the bus that speaks the I2C or SMBus protocol
143 * and provides some functionality. Common devices include EEPROMs,
144 * temperature sensors, GPIO controllers, power controllers, and more. Each
145 * device has a unique address. A plethora of device drivers are used to
146 * implement support for devices, which leverage the kernel’s I2C/SMBus
147 * Client interfaces. Devices are discovered and instantiated through a
148 * combination of system firmware such as Device Tree or by users manually
149 * creating them in userland. A device is represented by the i2c_dev_t.
150 *
151 * MULTIPLEXOR
152 *
153 * A multiplexor is a device that allows one to switch between multiple
154 * different downstream buses. A multiplexor must implement the kernel’s
155 * Mux APIs in <sys/i2c/mux.h>. While a mux commonly is an I2C device
156 * itself, it does not have to be. A multiplexor may have other features
157 * beyond just the mux. For example, the LTC4306 also has GPIOs. Like the
158 * controller, a device node for the mux will be created for it bound to
159 * i2cnex. A mux is represented by the i2c_nex_t structure.
160 *
161 * Multiplexors are enabled and disabled when I/O is performed by the
162 * system. Users or drivers don't need to explicitly control them.
163 *
164 * PORT
165 *
166 * Controllers and multiplexors both are devices that have a varying number
167 * of ports under them. Devices can be created or enumerated under ports.
168 * In broader I2C parlance, the top-level ports under a controller are
169 * sometimes called a bus. There is a device node created for each port. A
170 * port is represented by the i2c_port_t structure.
171 *
172 * ADDRESS
173 *
174 * An address uniquely identifies a device. An address is represented by
175 * the i2c_addr_t. The address consists of two pieces, an address type and
176 * the address itself. The current address types are 7-bit and 10-bit
177 * addresses. However, it's worth noting that only 7-bit addresses are
178 * commonly found and implemented currently.
179 *
180 * I2C ERROR
181 *
182 * Errors are currently broken into two different categories: general
183 * errors that can occur in the framework and errors specific to
184 * controllers performing I/O. These are represented by the i2c_error_t. In
185 * general, a pointer to this structure is used to collect error
186 * information. A few of the client APIs may only use the general,
187 * non-controller-specific error.
188 *
189 * The general errors are further broken into different categories. These
190 * include errors that may be relevant across multiple different types of
191 * consumers or are shared. Otherwise, each group of errors is tailored to
192 * a specific set of operations such as multiplexors, device driver
193 * clients, and userland clients, to name a few examples.
194 *
195 * NEXUS
196 *
197 * While the term nexus is overloaded, here we refer to the i2c_nexus_t,
198 * which is a type that is associated with every dev_info_t that is I2C
199 * related other than the PCIe/MMIO controller itself. Even the various
200 * I2C device nodes that we create which don't bind to this driver, still
201 * end up having an i2c_nexus_t that relates to them.
202 *
203 * In addition to the metadata about a node such as its name, bus address,
204 * and type, every nexus has a minor node which is used by libi2c to
205 * perform I/O.
206 *
207 * CLIENT
208 *
209 * When a device driver for an EEPROM, sensor, GPIO controller, etc. wants
210 * to communicate with an I2C device, it creates an i2c_client_t. The
211 * client inherently refers to a single address on the bus and our I/O
212 * operations generally target a specific client. Drivers can always get
213 * clients that refer to addresses in their reg[] property. However, there
214 * are many cases where there are shared addresses (e.g. DDR4 SPD) or a
215 * device may have more addresses than are present in the reg[] (certain
216 * EEPROMs).
217 *
218 * TRANSACTION
219 *
220 * A transaction represents the ability to perform I/O on the I2C bus and
221 * indicates that the caller has exclusive access to the bus. This is
222 * represented with the i2c_txn_t structure. A transaction is required for
223 * all I/O operations or to set properties.
224 *
225 * Certain I/O operations want to ensure that no one else intervenes on the
226 * bus while performing said I/O. For example, the DDR5 SPD driver
227 * (spd511x) has to change the page register to switch between the 8
228 * different 128 byte regions in the device. When the driver does this, it
229 * wants to ensure that no one else can get in and change the page register
230 * again before it's finished its I/O.
231 *
232 * To facilitate this, every I/O operation takes the i2c_txn_t * as its
233 * first argument. If callers don't have an active transaction and just
234 * pass NULL, the system will block and acquire one. However, if the
235 * transaction is non-NULL, then it will be used. When callers do have an
236 * active transaction, they they can use it across multiple clients.
237 * Similarly, the framework will pass the transaction to the various mux
238 * select and deselect APIs, allowing in-band based devices to get access
239 * to the transaction and simplifying those drivers design.
240 *
241 * REGISTER HANDLE
242 *
243 * Many I2C devices have a notion of registers inside of them. Each
244 * register is at a given address. The number of bytes per address can vary
245 * from device to device and even the number of bytes that make up an
246 * address can too. While many devices use a single byte address to try to
247 * fit within the constraints of an SMBus controller, several EEPROMs use a
248 * 2-byte address to minimize the number of addresses they consume on the
249 * bus.
250 *
251 * To deal with these differences and to drivers not to have to think about
252 * how to construct these types of requests, the device driver client
253 * interface has the i2c_reg_hdl_t. This takes a number of attributes at
254 * creation time and then allows callers to read or write one or more
255 * registers in one go.
256 *
257 * ROOT
258 *
259 * To facilitate the bus configuration operation of the initial controller,
260 * we have the idea of an i2c_root_t, which is basically a per-dev_info_t
261 * list of controllers.
262 *
263 * -----------
264 * Device Tree
265 * -----------
266 *
267 * To help make the representation of all of these different entities concrete,
268 * let's walk through an example I2C system and how the different device nodes
269 * end up looking:
270 *
271 * +------------+
272 * | Controller |-----------------------------------------+
273 * | pchsmbus0 | | |
274 * +------------+ v v
275 * +------------+ +------------+
276 * | 8-port mux | | 8-port mux |
277 * | pca9548 | | pca9548 |
278 * | 0x72 | | 0x73 |
279 * | | | |
280 * | 012345678 | | 012345678 |
281 * +------------+ +------------+
282 * +--------+ | | +--------+
283 * | Sensor | | | | Sensor |
284 * | tmp431 |<-----------------+ +--------->| lm75 |
285 * | 0x4c | | | 0x48 |
286 * +--------+ | +--------+
287 * | +--------+
288 * | | Sensor |
289 * +--------->| lm75 |
290 * | 0x49 |
291 * +--------+
292 *
293 * Here we have an instance of the pchsmbus I2C controller. At the top-level
294 * there are two 8-port muxes. These are the pca9548 device. Under bux 6 on the
295 * first one, there is a tmp431 sensor. Under the second one, there are a pair
296 * of lm75 temperature sensors. Here is what the device tree will look like on
297 * this system. We name each node based on its name and address and then follow
298 * up with information about the driver, instance, and I2C nexus type.
299 *
300 * i86pc (rootnex)
301 * pci@0,0 npe0
302 * pci8086,7270@1f,4 pchsmbus0
303 * i2cnex@pchsmbus0 i2cnex0 I2C_NEXUS_T_CTRL
304 * i2cnex@0 i2cnex1 I2C_NEXUS_T_PORT
305 * pca9548@0,72 pca954x0 I2C_NEXUS_T_DEV
306 * i2cnex@pca954x0 i2cnex2 I2C_NEXUS_T_MUX
307 * i2cnex@0 i2cnex3 I2C_NEXUS_T_PORT
308 * i2cnex@1 i2cnex4 I2C_NEXUS_T_PORT
309 * i2cnex@2 i2cnex5 I2C_NEXUS_T_PORT
310 * i2cnex@3 i2cnex6 I2C_NEXUS_T_PORT
311 * i2cnex@4 i2cnex7 I2C_NEXUS_T_PORT
312 * i2cnex@5 i2cnex8 I2C_NEXUS_T_PORT
313 * i2cnex@6 i2cnex9 I2C_NEXUS_T_PORT
314 * tmp431@0,4c I2C_NEXUS_T_DEV
315 * i2cnex@7 i2cnex10 I2C_NEXUS_T_PORT
316 * pca9548@0,73 pca954x1 I2C_NEXUS_T_DEV
317 * i2cnex@pca954x1 i2cnex11 I2C_NEXUS_T_MUX
318 * i2cnex@0 i2cnex12 I2C_NEXUS_T_PORT
319 * i2cnex@1 i2cnex13 I2C_NEXUS_T_PORT
320 * lm75@0,48 lm7x0 I2C_NEXUS_T_DEV
321 * lm75@0,49 lm7x1 I2C_NEXUS_T_DEV
322 * i2cnex@2 i2cnex14 I2C_NEXUS_T_PORT
323 * i2cnex@3 i2cnex15 I2C_NEXUS_T_PORT
324 * i2cnex@4 i2cnex16 I2C_NEXUS_T_PORT
325 * i2cnex@5 i2cnex17 I2C_NEXUS_T_PORT
326 * i2cnex@6 i2cnex18 I2C_NEXUS_T_PORT
327 * i2cnex@7 i2cnex19 I2C_NEXUS_T_PORT
328 *
329 * The controller is the root of the tree and we create an explicit I2C nexus to
330 * represent it. The bus addresses vary with each type. For controllers and
331 * muxes it is is the specific thing they are a child of unless they provide an
332 * alternate name during registration to allow multiple to exist. For ports, it
333 * is the name of the port itself. The pca9548 uses 0-based port names, so we
334 * end up with 0-7.
335 *
336 * We see there is a nexus per port and there is similarly a nexus to represent
337 * the start of the mux. While you may ask why is there a repetitive instance of
338 * the controller and mux, this allows us to manage the minor nodes consistently
339 * within the i2cnex driver and simplify the various providers.
340 *
341 * Devices are usually named based on the actual device that they represent.
342 * Their address is the encoded version of their primary address, aka reg[0] as
343 * a series of two hex values, the address type and value. Drivers generally
344 * have a compatible entry that represents the actual device. Unlike PCI or
345 * USB devices, most I2C devices are not self-describing. Someone needs to
346 * inform us what type of device it is. The pca954x mux driver supports muxes
347 * with a varying number of ports and there is no real way to safely determine
348 * it without user input. While there is an instance of the i2c_nexus_t that
349 * exists for each device node, we never bind the i2cnex driver to devices.
350 *
351 * ---------------------
352 * I/O and Mux Tracking
353 * --------------------
354 *
355 * To perform I/O on a given device we must walk down the tree to select any
356 * ports so that the bus can access it. First, we wake up the device tree to the
357 * root port of the controller and record all of the ports that are required to
358 * be set up. Then we walk that path back down to the leaf, activating all muxes
359 * along the way.
360 *
361 * To make this a bit more concrete, let's use the example from the prior
362 * section. To perform I/O to lm75@0,48 we need to make sure that no other muxes
363 * are active other than port 1 on pca9548@0x73. If this is already the active
364 * segment, there is nothing else to do. If you do I/O to one of the two lm75s,
365 * there's nothing to change to activate the other one. However, to send a
366 * request to the tmp431, the current mux needs to be deselected (disabled) and
367 * then the new one activated.
368 *
369 * To facilitate this, we have a pair of list_t structures on the i2c_ctrl_t. We
370 * have one that represents the current set of ports that are active on the
371 * controller. This is ordered starting from the controller's port followed by
372 * all of the mux ports required to get to the device. In the case where we were
373 * alternating between the two LM75s, this list would be the same, so there's
374 * nothing else to do.
375 *
376 * When we're switching, we first deselect muxes starting from the tail walking
377 * towards the head, aka the port on the controller. If we detect the current
378 * port that we're targeting, then we're done right there. After we have figured
379 * out what we're deselecting towards, we then build up the new plan by walking
380 * the new path up towards the controller, recording all of the ports that we
381 * encountered along the way. This enters the planning list. Once that is
382 * generated, we go back the other way, head to tail activating all of the muxes
383 * along the way on the proper port for the I/O .
384 *
385 * Right now this errs on the side of some simplicity. While we'll keep the same
386 * mux segments active until needing to change, we don't try to find the longest
387 * common subset and therefore may undo some ports that we would have to do
388 * again. However, we find the depth of these trees on the smaller side and if
389 * this proves problematic we can change it.
390 *
391 * ------------------
392 * Address Management
393 * ------------------
394 *
395 * Each port under a controller has a unique set of addresses. This is described
396 * in greater detail in i2cnex_addr.c, which implements the address tracking
397 * structures and logic.
398 *
399 * -------
400 * Locking
401 * -------
402 *
403 * By its nature I2C and related only support a single transaction going on at
404 * any given time. This reality greatly shapes the locking and synchronization
405 * design of the framework. At its core is a simple idea: only one transaction
406 * can be going on at any given time on the bus.
407 *
408 * Of course, like most things in I2C, this simple thing is much more
409 * complicated in practice. First, we extend the notion of the scope here to be
410 * much larger. In particular, we want to serial device addition and removals,
411 * address assignments and claims, and setting properties with respect to I/O.
412 * We only ever want one of these going on at any given time. You could
413 * summarize this as activities that require one to talk the device tree or
414 * modify the controller's behavior. You don't want to change the controller's
415 * clock frequency in the middle of performing an I/O!
416 *
417 * We ultimately pick each controller instance as this synchronization point.
418 * Each controller should generally be independent from one another and is a
419 * natural point to break things apart here. There is no reason an I/O can't be
420 * going on on one controller while another controller is adding a device.
421 * Before we get into the specifics of our design, let's describe some
422 * complications and design considerations.
423 *
424 * COMPLEXITY 1: The NDI
425 *
426 * The NDI is the first wrinkle here. We can have our bus_ops called at any
427 * arbitrary point with various holds potentially already in place. Therefore we
428 * establish the rule that any calls to ndi_devi_enter() must happen prior to
429 * anything that wants to enter the overall controller synchronization.
430 *
431 * The second NDI complexity comes in the fact that our general nexus bus
432 * configuration entry points can lead to recursive entry into the framework.
433 * For example, if we are performing a bus config on a controller, then we will
434 * go to create its ports, which will call the port's i2cnex attach(9E) and want
435 * to call the port naming operation. Similarly most I2C device drivers will
436 * perform some I/O in attach.
437 *
438 * The third NDI complexity is that MT-config thread can make it so other
439 * threads will need to complete activities, which could involve I2C behavior,
440 * before the parent is done. For example, if we have a thread that creates a
441 * device and calls ndi_bus_config() on it, if that device also creates its own
442 * children, then the original caller will not be finished until the
443 * grandchildren are done configuring.
444 *
445 * The fourth NDI complexity is that we can be going through a series of
446 * multiple recursive operations: a user can ask to add a device. That in turn
447 * will call into our bus operations. That can then cause a driver to attach
448 * which asks to perform a transaction.
449 *
450 * COMPLEXITY 2: Driver Exclusion
451 *
452 * There are several cases where a driver wants to have exclusive access to the
453 * bus across multiple I/O transactions. For example, one might want to change a
454 * paging register and then do a read or write and ensure that no one else can
455 * sneak in while this is going on. This isn't optional, but required for device
456 * correctness.
457 *
458 * This is further complicated by our goal to make these interfaces something
459 * that drivers don't have to think too much about. If an EEPROM driver or
460 * sensor driver has multiple threads calling into its operations, we don't want
461 * the driver to have to think too much about additional locking if it needs to
462 * perform these transactions, assuming it is across a single instance of the
463 * device.
464 *
465 * Finally, while we need to have APIs to be able to perform extended locking,
466 * even the basic I/O operations need to ultimately take a hold on the
467 * controller. If a driver doesn't need to have a coherent view across multiple
468 * transactions, then we should take care of that for them transparently.
469 *
470 * COMPLEXITY 3: MUXES
471 *
472 * Muxes cause some challenges in our model. In particular, when a device that
473 * we want to perform I/O on is under one or more muxes, we must walk from the
474 * controller down the tree to the device activating each mux segment in turn.
475 * There are a few things to call out about muxes that makes them special:
476 *
477 * 1. The <sys/i2c/mux.h> APIs are only ever called when we're in the context of
478 * performing an I/O operations. That is, the call to enable or disable a mux
479 * segment only ever happens while we're already in the context of a leaf
480 * device driver trying to do something.
481 * 2. Some muxes actually provide more facilities than just the raw I/O mux. For
482 * example the LTC4306 has not only a built-in I2C Mux, but also supports a
483 * few GPIOs. So while item (1) is still true, other threads may still be
484 * trying to perform operations here in parallel.
485 * 3. If a mux has multiple I/O operations it must perform without anyone
486 * getting in the way of it, then driver writers want to use the same bus
487 * lock client APIs.
488 *
489 * COMPLEXITY 4: Userland
490 *
491 * Userland also wants the ability to take a hold on a bus and allow that to
492 * persist across multiple calls. An important constraint of userland is that
493 * it ties something like a controller hold to an open file descriptor that can
494 * be moved around. We cannot assume that the thread that opened the file
495 * descriptor, issued a lock, issued an unlock, and closed the file descriptor
496 * will be the same at all. In particular, this means that we cannot rely on a
497 * thread to be the same across operations. Even if userland didn't have this
498 * feature, it's still worthwhile to try to avoid this so that different kernel
499 * device drivers can have their own designs. For example, something could be
500 * using timeout(9F).
501 *
502 * LOCKING DESIGN
503 *
504 * The core of the locking design here is an attempt to satisfy several of the
505 * different complexities. First and foremost because only one transaction can
506 * occur on the bus we have the i2c_txn_t. This basically represents an
507 * exclusive hold on the controller. This is designed to not be a
508 * thread-specific value, but something that can be passed around from operation
509 * to operation. Cases where this is passed around include:
510 *
511 * 1) Drivers that need to make multiple calls. They basically have a pattern
512 * that looks like:
513 *
514 * i2c_txn_t *txn = i2c_bus_lock(...);
515 * op1(txn, ...);
516 * op2(txn, ...);
517 * op3(txn, ...);
518 * i2c_bus_unlock(txn);
519 *
520 * 2) The mux I/O path. As part of the transaction being taken as part of an
521 * operation, this'll end up passed to all of the mux framework APIs. This
522 * allows us to easily distinguish a case where the mux driver has its own
523 * features (e.g. GPIOs) that are independent from this.
524 *
525 * 3) When a user wants to take a hold that is tied to their file descriptor so
526 * they can issue multiple independent transactions, then that is stored in
527 * the minor state for the fd and will move around which thread it belongs
528 * to.
529 *
530 * Effectively the i2c_txn_t is required to do any operation on the controller
531 * and is the general serialization point for all operations. This exists on a
532 * per-i2c_ctrl_t basis. There is no other lock in the controller structure at
533 * this time (though the i2c_ctrl_lock_t embeds one for synchronization and cv
534 * purposes).
535 *
536 * In general, many other parts of the system are designed under the assumption
537 * that the calling thread has an active transaction. This includes setting
538 * properties, device addition and removal, and client manipulation. For
539 * example, the i2c_client_t that device drivers use includes embedded
540 * structures and buffers. The first step in using these other structures is to
541 * have an active transaction.
542 *
543 * Transaction structures are allocated through i2c_txn_alloc() and
544 * i2c_txn_free(). All i2c_txn_t structures are tracked in a controller-specific
545 * list for debugging purposes and require the caller to specify a tag and a
546 * void * to give context as to who the owner is and the corresponding code
547 * path. These are not used otherwise as part of the locking logic. To take an
548 * actual lock, one uses the i2c_ctrl_lock() and i2c_ctrl_unlock() operations.
549 * We generally try not to have the i2c_txn_t * exposed to code outside of the
550 * nexus if it doesn't actively indicate a held controller.
551 *
552 * NDI RECURSION
553 *
554 * There are two main design pieces that we put in place to deal with the NDI.
555 *
556 * 1. When performing bus configuration we need to serialize activity in the
557 * I2C tree and bus. This requires taking a transaction. When we call into
558 * attach(9E) of our children, they also may take a transactions. We
559 * facilitate this by making the lock recursive in this scenario. During bus
560 * operations, i2cnex begins by calling i2c_txn_nexus_op_begin(). This
561 * causes us to store the current thread that entered this as the active
562 * nexus thread.
563 *
564 * If that thread was to call i2c_txn_ctrl_lock() again in a different
565 * context, we would notice both that it is the current owner and that we
566 * are in nexus mode. In this case, we would push the current owner into a
567 * stack of locks and grant the current caller the transaction. When a
568 * transaction ends, the prior holder is popped from the stack. This special
569 * mode of operation ends when someone calls i2c_txn_nexus_op_end().
570 *
571 * 2. When calling into an NDI operation, one is not allowed to hold a
572 * controller lock. A transaction may occur while within the context of a
573 * single operation; however, it cannot occur across it. In prototypes, the
574 * logic in i2c_user.c held the transaction across the initial NDI
575 * configuration call and this caused deadlocks when mux grandchildren were
576 * then trying to later attach due to the multi-threaded config logic in the
577 * kernel.
578 *
579 * OTHER LOCKS
580 *
581 * There are a few other locks in the driver to be aware of. These locks for the
582 * most part all follow the pattern where once you acquire them, no other locks
583 * are allowed to be acquired. They generally protect a specific piece of data
584 * and are designed to be held for a short time.
585 *
586 * - im_mutex in the i2cnex_minors_t. This is used to protect all of the
587 * shared minor number allocations across all nexi and all users.
588 *
589 * - cl_mutex in the i2c_ctrl_lock_t. This is only used in the implementation
590 * of the locking routines.
591 *
592 * - ic_txn_lock in the i2c_ctrl_t. This protects the per-controller list of
593 * transactions and is only used when allocating and freeing transactions.
594 *
595 * - ir_mutex in the i2c_root_t. This used to protect the list of controllers
596 * assosciated with a dev_info_t. This is only used during controller
597 * registration, deregistration, and bus configuration of the top-level
598 * controller.
599 *
600 * - iu_user in the i2c_user_t. This only protects a small amount of data in
601 * the i2c_user_t.
602 *
603 * RULE SUMMARY
604 *
605 * 1) Always start with NDI locks if required (i.e. ndi_devi_enter()).
606 * 2) The next highest priority acquisition is the overall transaction. You may
607 * acquire a transaction after performing all ndi_devi_enter() calls.
608 * However, no other i2c related locks can be held.
609 * 3) The remaining mutexes can only be held for a short term to manipulate the
610 * data they protect. No other mutexes, the controller lock, or NDI stuff may
611 * be done during this. You are allowed to already hold an NDI lock or the
612 * controller lock.
613 *
614 * Effectively this boils down to NDI before i2c_txn_t before kmutex_t.
615 */
616
617 #include <sys/modctl.h>
618 #include <sys/conf.h>
619 #include <sys/devops.h>
620 #include <sys/ddi.h>
621 #include <sys/sunndi.h>
622 #include <sys/stddef.h>
623 #include <sys/mkdev.h>
624 #include <sys/file.h>
625 #include <sys/errno.h>
626 #include <sys/open.h>
627 #include <sys/cred.h>
628 #include <sys/stat.h>
629 #include <sys/ctype.h>
630 #include <sys/fs/dv_node.h>
631
632 #include "i2cnex.h"
633
634 /*
635 * Extern declaration for pseudo-device related functions that aren't part of a
636 * header file.
637 */
638 extern int is_pseudo_device(dev_info_t *);
639
640 i2cnex_minors_t i2cnex_minors;
641
642 static i2c_root_t *
i2c_dip_to_root_common(dev_info_t * dip,bool alloc)643 i2c_dip_to_root_common(dev_info_t *dip, bool alloc)
644 {
645 mutex_enter(&i2cnex_minors.im_mutex);
646 for (i2c_root_t *r = list_head(&i2cnex_minors.im_roots); r != NULL;
647 r = list_next(&i2cnex_minors.im_roots, r)) {
648 if (r->ir_dip == dip) {
649 mutex_exit(&i2cnex_minors.im_mutex);
650 return (r);
651 }
652 }
653
654 if (!alloc) {
655 mutex_exit(&i2cnex_minors.im_mutex);
656 return (NULL);
657 }
658
659 i2c_root_t *root = kmem_zalloc(sizeof (i2c_root_t), KM_SLEEP);
660 root->ir_dip = dip;
661 list_create(&root->ir_ctrls, sizeof (i2c_ctrl_t),
662 offsetof(i2c_ctrl_t, ic_link));
663 mutex_init(&root->ir_mutex, NULL, MUTEX_DRIVER, NULL);
664
665 list_insert_tail(&i2cnex_minors.im_roots, root);
666 mutex_exit(&i2cnex_minors.im_mutex);
667
668 return (root);
669
670 }
671
672 void
i2c_root_fini(i2c_root_t * root)673 i2c_root_fini(i2c_root_t *root)
674 {
675 VERIFY(MUTEX_HELD(&i2cnex_minors.im_mutex));
676 list_remove(&i2cnex_minors.im_roots, root);
677 list_destroy(&root->ir_ctrls);
678 mutex_destroy(&root->ir_mutex);
679 kmem_free(root, sizeof (i2c_root_t));
680 }
681
682 i2c_root_t *
i2c_root_init(dev_info_t * dip)683 i2c_root_init(dev_info_t *dip)
684 {
685 return (i2c_dip_to_root_common(dip, true));
686 }
687
688 i2c_root_t *
i2c_dip_to_root(dev_info_t * dip)689 i2c_dip_to_root(dev_info_t *dip)
690 {
691 return (i2c_dip_to_root_common(dip, false));
692 }
693
694 void
i2cnex_nex_free(i2c_nexus_t * nex)695 i2cnex_nex_free(i2c_nexus_t *nex)
696 {
697 if (nex == NULL) {
698 return;
699 }
700
701 VERIFY0(nex->in_flags);
702 if (nex->in_minor > 0) {
703 id_free(i2cnex_minors.im_ids, nex->in_minor);
704 nex->in_minor = 0;
705 }
706 kmem_free(nex, sizeof (i2c_nexus_t));
707 }
708
709 i2c_nexus_t *
i2cnex_nex_alloc(i2c_nexus_type_t type,dev_info_t * pdip,i2c_nexus_t * pnex,const char * name,const char * addr,i2c_ctrl_t * ctrl)710 i2cnex_nex_alloc(i2c_nexus_type_t type, dev_info_t *pdip, i2c_nexus_t *pnex,
711 const char *name, const char *addr, i2c_ctrl_t *ctrl)
712 {
713 i2c_nexus_t *nex;
714 nex = kmem_zalloc(sizeof (i2c_nexus_t), KM_SLEEP);
715 nex->in_type = type;
716 nex->in_pnex = pnex;
717 nex->in_ctrl = ctrl;
718
719 #ifdef DEBUG
720 if (type == I2C_NEXUS_T_CTRL) {
721 ASSERT3P(pnex, ==, NULL);
722 } else {
723 ASSERT3P(pnex, !=, NULL);
724 }
725 #endif
726 nex->in_pdip = pdip;
727
728 if (name == NULL) {
729 name = "i2cnex";
730 }
731
732 if (strlcpy(nex->in_name, name, sizeof (nex->in_name)) >=
733 sizeof (nex->in_name)) {
734 i2cnex_nex_free(nex);
735 return (NULL);
736 }
737
738 if (strlcpy(nex->in_addr, addr, sizeof (nex->in_addr)) >=
739 sizeof (nex->in_addr)) {
740 i2cnex_nex_free(nex);
741 return (NULL);
742 }
743
744 nex->in_minor = id_alloc_nosleep(i2cnex_minors.im_ids);
745 if (nex->in_minor == -1) {
746 i2cnex_nex_free(nex);
747 return (NULL);
748 }
749
750 return (nex);
751 }
752
753 i2c_nexus_t *
i2c_nex_find_by_minor(minor_t m)754 i2c_nex_find_by_minor(minor_t m)
755 {
756 const i2c_nexus_t n = {
757 .in_minor = m
758 };
759 i2c_nexus_t *ret;
760
761 mutex_enter(&i2cnex_minors.im_mutex);
762 ret = avl_find(&i2cnex_minors.im_nexi, &n, NULL);
763 mutex_exit(&i2cnex_minors.im_mutex);
764
765 return (ret);
766 }
767
768 /*
769 * Common minor number based sort.
770 */
771 static int
i2c_minor_compare(minor_t left,minor_t right)772 i2c_minor_compare(minor_t left, minor_t right)
773 {
774 if (left > right)
775 return (1);
776 if (left < right)
777 return (-1);
778 return (0);
779 }
780
781 static int
i2c_nexus_compare(const void * left,const void * right)782 i2c_nexus_compare(const void *left, const void *right)
783 {
784 const i2c_nexus_t *ln = left;
785 const i2c_nexus_t *rn = right;
786
787 return (i2c_minor_compare(ln->in_minor, rn->in_minor));
788 }
789
790 static int
i2c_user_compare(const void * left,const void * right)791 i2c_user_compare(const void *left, const void *right)
792 {
793 const i2c_user_t *lu = left;
794 const i2c_user_t *ru = right;
795
796 return (i2c_minor_compare(lu->iu_minor, ru->iu_minor));
797 }
798
799
800 /*
801 * Sort devices. Device sorting first happens based on the raw address and then
802 * is disambiguated by the address type, e.g. 7-bit vs. 10-bit.
803 */
804 static int
i2c_device_compare(const void * left,const void * right)805 i2c_device_compare(const void *left, const void *right)
806 {
807 const i2c_dev_t *ld = left;
808 const i2c_dev_t *rd = right;
809
810 if (ld->id_addr.ia_addr > rd->id_addr.ia_addr) {
811 return (1);
812 }
813
814 if (ld->id_addr.ia_addr < rd->id_addr.ia_addr) {
815 return (-1);
816 }
817
818 if (ld->id_addr.ia_type > rd->id_addr.ia_type) {
819 return (1);
820 }
821
822 if (ld->id_addr.ia_type < rd->id_addr.ia_type) {
823 return (-1);
824 }
825
826 return (0);
827 }
828
829 static void
i2c_port_fini(i2c_port_t * port)830 i2c_port_fini(i2c_port_t *port)
831 {
832 i2cnex_nex_free(port->ip_nex);
833 avl_destroy(&port->ip_devices);
834 }
835
836 static bool
i2c_port_init(i2c_ctrl_t * ctrl,dev_info_t * pdip,i2c_nexus_t * pnex,i2c_port_t * port,uint32_t portno,bool (* name_f)(void *,uint32_t,char *,size_t),void * drv)837 i2c_port_init(i2c_ctrl_t *ctrl, dev_info_t *pdip, i2c_nexus_t *pnex,
838 i2c_port_t *port, uint32_t portno,
839 bool (*name_f)(void *, uint32_t, char *, size_t), void *drv)
840 {
841 char name[I2C_NAME_MAX];
842
843 port->ip_portno = portno;
844
845 avl_create(&port->ip_devices, i2c_device_compare, sizeof (i2c_dev_t),
846 offsetof(i2c_dev_t, id_link));
847 list_link_init(&port->ip_ctrl_link);
848
849 /*
850 * Ask the controller or mux for the name for this port. Right now we're
851 * not defending against duplicate names on a device. We need to do that
852 * at some point. Note, as these are calls into the driver, we want to
853 * serialize them per the general provider rules. Muxes and Controllers
854 * have the same style API for setting this.
855 */
856 bzero(name, sizeof (name));
857
858 VERIFY3P(name_f, !=, NULL);
859 if (!name_f(drv, portno, name, sizeof (name))) {
860 dev_err(pdip, CE_WARN, "failed to name child port %u", portno);
861 return (false);
862 }
863
864 if (name[0] == '\0' || name[sizeof (name) - 1] != '\0') {
865 dev_err(pdip, CE_WARN, "port %u ended up with invalid name",
866 portno);
867 return (false);
868 }
869
870 for (size_t i = 0; i < sizeof (name) && name[i] != '\0'; i++) {
871 if (!isalnum(name[i])) {
872 dev_err(pdip, CE_WARN, "port %u name %s uses invalid "
873 "character at byte %zu", portno, name, i);
874 return (false);
875 }
876 }
877
878 port->ip_nex = i2cnex_nex_alloc(I2C_NEXUS_T_PORT, pdip, pnex, NULL,
879 name, ctrl);
880 if (port->ip_nex == NULL) {
881 dev_err(pdip, CE_WARN, "failed to allocate i2c nexus for port "
882 "%u", portno);
883 return (false);
884 }
885 port->ip_nex->in_data.in_port = port;
886
887 return (true);
888 }
889
890 /*
891 * See the DDI_CTLOPS_INITCHILD case below for an explanation of why this
892 * mimicry of pseudonex_auto_assign() is here.
893 */
894 static bool
i2c_nex_assign_instance(dev_info_t * cdip)895 i2c_nex_assign_instance(dev_info_t *cdip)
896 {
897 const char *drv = ddi_driver_name(cdip);
898 major_t major = ddi_name_to_major(drv);
899
900 LOCK_DEV_OPS(&devnamesp[major].dn_lock);
901 for (int inst = 0; inst <= MAXMIN32; inst++) {
902 dev_info_t *tdip;
903 for (tdip = devnamesp[major].dn_head; tdip != NULL;
904 tdip = ddi_get_next(tdip)) {
905 if (tdip == cdip)
906 continue;
907 if (inst == ddi_get_instance(tdip)) {
908 break;
909 }
910 }
911
912 if (tdip == NULL) {
913 DEVI(cdip)->devi_instance = inst;
914 UNLOCK_DEV_OPS(&devnamesp[major].dn_lock);
915 return (true);
916 }
917 }
918
919 /*
920 * No major available, fail the initialization.
921 */
922 UNLOCK_DEV_OPS(&devnamesp[major].dn_lock);
923 return (false);
924 }
925
926 /*
927 * Unlike the other bus ops, this is shared by both the controller bus ops and
928 * the normal i2c_nex_bus_ops.
929 */
930 int
i2c_nex_bus_ctl(dev_info_t * dip,dev_info_t * rdip,ddi_ctl_enum_t ctlop,void * arg,void * result)931 i2c_nex_bus_ctl(dev_info_t *dip, dev_info_t *rdip, ddi_ctl_enum_t ctlop,
932 void *arg, void *result)
933 {
934 dev_info_t *cdip;
935 i2c_nexus_t *nex;
936 const char *type;
937
938 switch (ctlop) {
939 case DDI_CTLOPS_REPORTDEV:
940 if (rdip == NULL) {
941 return (DDI_FAILURE);
942 }
943
944 nex = ddi_get_parent_data(rdip);
945 VERIFY3P(nex, !=, NULL);
946
947 switch (nex->in_type) {
948 case I2C_NEXUS_T_CTRL:
949 type = "Controller";
950 break;
951 case I2C_NEXUS_T_PORT:
952 type = "Port";
953 break;
954 case I2C_NEXUS_T_DEV:
955 type = "Dev";
956 break;
957 case I2C_NEXUS_T_MUX:
958 type = "Mux";
959 break;
960 default:
961 type = "Unknown";
962 break;
963 }
964
965 cmn_err(CE_CONT, "I2C %s: %s@%s, %s%d\n", type,
966 ddi_node_name(rdip), ddi_get_name_addr(rdip),
967 ddi_driver_name(rdip), ddi_get_instance(rdip));
968 break;
969 case DDI_CTLOPS_INITCHILD:
970 cdip = arg;
971 if (cdip == NULL) {
972 return (DDI_FAILURE);
973 }
974
975 /*
976 * We need to check if we're a child of pseudo. If so, we won't
977 * get an instance number assigned to us due to the logic of how
978 * instance assignment works. Once something is a child of
979 * pseudo, the system expects psuedo to take charge of assigning
980 * instances. This means that we have to basically do the same
981 * thing that pseudonex_auto_assign() does. We can't really ask
982 * psuedo to do this as it would want to name our child and we
983 * can't assume that the path between us and pseudo will keep
984 * calling all the way up to pseudo. This is unfortunate, but
985 * not as unfortunate as instance -1! This uses the same logic
986 * as pseudo.
987 */
988 if (is_pseudo_device(cdip) && !i2c_nex_assign_instance(cdip)) {
989 return (NDI_FAILURE);
990 }
991
992 nex = ddi_get_parent_data(cdip);
993 VERIFY3P(nex, !=, NULL);
994 ddi_set_name_addr(cdip, nex->in_addr);
995 break;
996 case DDI_CTLOPS_UNINITCHILD:
997 cdip = arg;
998 if (cdip == NULL) {
999 return (DDI_FAILURE);
1000 }
1001
1002 ddi_set_name_addr(cdip, NULL);
1003 break;
1004 default:
1005 return (ddi_ctlops(dip, rdip, ctlop, arg, result));
1006 }
1007
1008 return (DDI_SUCCESS);
1009 }
1010
1011 void
i2c_nex_bus_config_fini(i2c_nex_bus_config_t * conf)1012 i2c_nex_bus_config_fini(i2c_nex_bus_config_t *conf)
1013 {
1014 if (conf->inbc_duplen != 0) {
1015 kmem_free(conf->inbc_dup, conf->inbc_duplen);
1016 conf->inbc_dup = NULL;
1017 conf->inbc_duplen = 0;
1018 conf->inbc_addr = NULL;
1019 }
1020 }
1021
1022 bool
i2c_nex_bus_config_init(i2c_nex_bus_config_t * conf,ddi_bus_config_op_t op,const void * arg)1023 i2c_nex_bus_config_init(i2c_nex_bus_config_t *conf, ddi_bus_config_op_t op,
1024 const void *arg)
1025 {
1026 bzero(conf, sizeof (i2c_nex_bus_config_t));
1027 conf->inbc_op = op;
1028 conf->inbc_arg = arg;
1029 conf->inbc_ret = NDI_SUCCESS;
1030
1031 if (op == BUS_CONFIG_ONE || op == BUS_UNCONFIG_ONE) {
1032 char *name, *addr;
1033
1034 conf->inbc_duplen = strlen(arg) + 1;
1035 conf->inbc_dup = kmem_alloc(conf->inbc_duplen, KM_SLEEP);
1036 bcopy(arg, conf->inbc_dup, conf->inbc_duplen);
1037
1038 i_ddi_parse_name(conf->inbc_dup, &name, &addr, NULL);
1039 if (name == NULL || addr == NULL || *addr == '\0') {
1040 i2c_nex_bus_config_fini(conf);
1041 return (false);
1042 }
1043 conf->inbc_name = name;
1044 conf->inbc_addr = addr;
1045 }
1046
1047 return (true);
1048 }
1049
1050 /*
1051 * This is used to clean up devices at different points.
1052 */
1053 void
i2c_nex_dev_cleanup(i2c_nexus_t * nex)1054 i2c_nex_dev_cleanup(i2c_nexus_t *nex)
1055 {
1056 VERIFY3U(nex->in_type, ==, I2C_NEXUS_T_DEV);
1057
1058 mutex_enter(&i2cnex_minors.im_mutex);
1059 if ((nex->in_flags & I2C_NEXUS_F_DISC) != 0) {
1060 avl_remove(&i2cnex_minors.im_nexi, nex);
1061 nex->in_flags &= ~I2C_NEXUS_F_DISC;
1062 }
1063 mutex_exit(&i2cnex_minors.im_mutex);
1064
1065 /*
1066 * We're removing this minor node outside of attach/detach context. We
1067 * must inform /devices that it must clean up and rebuild so that way it
1068 * can pick up the correct set of minors after this. You'll note that
1069 * we're traversing one directory higher in the tree. When we pass in a
1070 * dip, devfs will find the directory node for it. The devfs character
1071 * devices that correspond to a minor node are in its parent's
1072 * directory. Therefore to mark the proper thing to clean / rebuild, we
1073 * must go up to it. Let's make this clearer with an example. Consider
1074 * the following nodes:
1075 *
1076 * i2csim0 (pseudo device)
1077 * i2cnex@i2csim0 (controller i2c nexus)
1078 * i2cnex@0 (port i2c nexus)
1079 * at24c0@0,10 (i2c device)
1080 *
1081 * This code would be called as part of removing the at24c0@0,10 device
1082 * node. When our nexus creates a minor node to perform actions on the
1083 * device, it is created as i2cnex@0:0,10. Specifically device minors
1084 * are on their parent nodes. In /devices, this minor node is in the
1085 * i2cnex@i2csim0 directory. So if we did a devfs_clean() call to the
1086 * i2cnex@0 directory, we would never find this and never rebuild it.
1087 * Instead, we must call it up one parent.
1088 */
1089 ddi_remove_minor_node(nex->in_pdip, nex->in_addr);
1090 (void) devfs_clean(nex->in_pnex->in_pdip, NULL, 0);
1091 }
1092
1093 /*
1094 * Attempt to unconfigure one of our nexi. This is trickier than it might
1095 * appear. We have just called ndi_busop_bus_config(). This can result in
1096 * several different things happening:
1097 *
1098 * - If we had BUS_UNCONFIG_ONE and we had a node that was successfully bound
1099 * to a driver, then it will have been unconfigured and freed (assuming the
1100 * reference count allowed it). This means that the nex->in_dip pointer is
1101 * dangling!
1102 * - If we had a BUS_UNCONFIG_ONE and we had a node that was never bound to a
1103 * driver, then it will have failed to look up the name and address in the
1104 * NDI operation. We still want to clean this up as we can identify it.
1105 * A dev_info_t will only call the DDI_CTLOPS_INITCHILD entry point after it
1106 * has identified a major_t to bind the driver to. If it doesn't do this it
1107 * will never have an instance.
1108 * - If we were called with BUS_UNCONFIG_DRIVER or BUS_UNCONFIG_ONE then it
1109 * will have found the node and removed it, putting us in the first case.
1110 *
1111 * The moral of this story is that we can't assume nex->in_dip is valid. We
1112 * can't assume that ndi_devi_free() will succeed as we may still have a
1113 * reference count. We can't assume that the node has been detached either. So
1114 * if the node is still active and has a reference count we will return failure.
1115 */
1116 static int
i2c_nex_bus_unconfig_i2cnex(i2c_nexus_t * nex)1117 i2c_nex_bus_unconfig_i2cnex(i2c_nexus_t *nex)
1118 {
1119 /*
1120 * It's possible we're doing a sweep via a BUS_CONFIG_ALL and we've
1121 * already done our work. Don't try again.
1122 */
1123 if (nex->in_dip == NULL) {
1124 return (NDI_SUCCESS);
1125 }
1126
1127 /*
1128 * At this point we can't rely on the current nex->in_dip pointer to be
1129 * valid. See if we can find the dip or not.
1130 */
1131 dev_info_t *cdip;
1132 for (cdip = ddi_get_child(nex->in_pdip); cdip != NULL;
1133 cdip = ddi_get_next_sibling(cdip)) {
1134 if (ddi_get_parent_data(cdip) == nex) {
1135 VERIFY3P(cdip, ==, nex->in_dip);
1136 break;
1137 }
1138 }
1139
1140 /*
1141 * The kernel didn't delete the dev_info_t for whatever reason. Go
1142 * through and see if we should.
1143 */
1144 if (cdip != NULL) {
1145
1146 /*
1147 * If we have a driver attached right now or there is still a
1148 * reference count on this node, then we can't tear it down. The
1149 * former is most common for our nexus drivers. The latter is
1150 * when we have a child which is a device.
1151 */
1152 if (i_ddi_devi_attached(nex->in_dip) ||
1153 e_ddi_devi_holdcnt(nex->in_dip) > 0) {
1154 return (NDI_FAILURE);
1155 }
1156
1157 ddi_set_parent_data(nex->in_dip, NULL);
1158
1159 /*
1160 * There are no registers or other properties to free at this
1161 * time, so we just attempt to free the node. We expect that
1162 * ndi_devi_free should not fail, but if it it does, we warn
1163 * about it, but don't propagate that fact.
1164 */
1165 if (ndi_devi_free(nex->in_dip) != NDI_SUCCESS) {
1166 dev_err(nex->in_dip, CE_WARN, "failed to free dip in "
1167 "unconfig");
1168 }
1169 }
1170 nex->in_dip = NULL;
1171
1172 if (nex->in_type == I2C_NEXUS_T_DEV) {
1173 i2c_nex_dev_cleanup(nex);
1174 }
1175
1176 return (NDI_SUCCESS);
1177 }
1178
1179 static bool
i2c_nex_bus_config_nex(i2c_nexus_t * nex)1180 i2c_nex_bus_config_nex(i2c_nexus_t *nex)
1181 {
1182 char *prop;
1183
1184 switch (nex->in_type) {
1185 case I2C_NEXUS_T_CTRL:
1186 prop = I2C_NEXUS_TYPE_CTRL;
1187 break;
1188 case I2C_NEXUS_T_PORT:
1189 prop = I2C_NEXUS_TYPE_PORT;
1190 break;
1191 case I2C_NEXUS_T_MUX:
1192 prop = I2C_NEXUS_TYPE_MUX;
1193 break;
1194 default:
1195 panic("invalid nexus type encountered: 0x%x", nex->in_type);
1196 }
1197
1198 if (ndi_prop_update_string(DDI_DEV_T_NONE, nex->in_dip,
1199 I2C_NEXUS_TYPE_PROP, prop) != NDI_SUCCESS) {
1200 return (false);
1201 }
1202
1203 return (true);
1204 }
1205
1206 static bool
i2c_nex_bus_config_dev(i2c_nexus_t * nex)1207 i2c_nex_bus_config_dev(i2c_nexus_t *nex)
1208 {
1209 i2c_dev_t *dev = nex->in_data.in_dev;
1210
1211 /*
1212 * First set the #address-cells and #size-cells we have decided to use.
1213 * This is slightly different from flattened device tree. We made need
1214 * to revisit this at some point.
1215 */
1216 if (ndi_prop_update_int(DDI_DEV_T_NONE, nex->in_dip, "#address-cells",
1217 2) != NDI_SUCCESS) {
1218 return (false);
1219 }
1220
1221 if (ndi_prop_update_int(DDI_DEV_T_NONE, nex->in_dip, "#size-cells",
1222 0) != NDI_SUCCESS) {
1223 return (false);
1224 }
1225
1226 if (ndi_prop_update_string(DDI_DEV_T_NONE, nex->in_dip, "device_type",
1227 "i2c") != NDI_SUCCESS) {
1228 return (false);
1229 }
1230
1231 /*
1232 * Set up the regs[]. Right now we only track one address for a device;
1233 * however, some devices end up using more than one address and/or a
1234 * mask of such things. Currently those are grabbed out by clients being
1235 * able to claim more addresses.
1236 */
1237 int regs[2] = { dev->id_addr.ia_type, dev->id_addr.ia_addr };
1238 if (ndi_prop_update_int_array(DDI_DEV_T_NONE, nex->in_dip, "reg", regs,
1239 2) != NDI_SUCCESS) {
1240 return (false);
1241 }
1242
1243 if (dev->id_nucompat > 0) {
1244 if (ndi_prop_update_string_array(DDI_DEV_T_NONE, nex->in_dip,
1245 "compatible", dev->id_ucompat, dev->id_nucompat) !=
1246 NDI_SUCCESS) {
1247 return (false);
1248 }
1249 }
1250
1251 /*
1252 * Create the minor for this device in the parent, not on the device
1253 * itself.
1254 */
1255 if (ddi_create_minor_node(nex->in_pdip, nex->in_addr, S_IFCHR,
1256 nex->in_minor, DDI_NT_I2C_DEV, 0) != DDI_SUCCESS) {
1257 dev_err(nex->in_pdip, CE_WARN, "failed to create minor node "
1258 "for child %s", nex->in_addr);
1259 return (false);
1260 }
1261
1262 mutex_enter(&i2cnex_minors.im_mutex);
1263 avl_add(&i2cnex_minors.im_nexi, nex);
1264 nex->in_flags |= I2C_NEXUS_F_DISC;
1265 mutex_exit(&i2cnex_minors.im_mutex);
1266
1267 return (true);
1268 }
1269
1270 void
i2c_nex_bus_config_one(i2c_nexus_t * nex,i2c_nex_bus_config_t * conf)1271 i2c_nex_bus_config_one(i2c_nexus_t *nex, i2c_nex_bus_config_t *conf)
1272 {
1273 if (conf->inbc_op == BUS_CONFIG_ONE) {
1274 if (conf->inbc_matched) {
1275 return;
1276
1277 }
1278
1279 if (strcmp(nex->in_name, conf->inbc_name) != 0 ||
1280 strcmp(nex->in_addr, conf->inbc_addr) != 0) {
1281 return;
1282 }
1283 }
1284
1285 conf->inbc_matched = true;
1286
1287 /*
1288 * We're going to go ahead and create something. If this is a device,
1289 * then we also need to set a bunch of properties on this. Note, it is
1290 * possible that this has already been created as we're being asked to
1291 * config something that already exists. In that case, we need to stop
1292 * here.
1293 */
1294 dev_info_t *cdip;
1295 for (cdip = ddi_get_child(nex->in_pdip); cdip != NULL;
1296 cdip = ddi_get_next_sibling(cdip)) {
1297 if (ddi_get_parent_data(cdip) == nex) {
1298 VERIFY3P(cdip, ==, nex->in_dip);
1299 return;
1300 }
1301 }
1302 nex->in_dip = NULL;
1303 ndi_devi_alloc_sleep(nex->in_pdip, nex->in_name, DEVI_SID_NODEID,
1304 &nex->in_dip);
1305 switch (nex->in_type) {
1306 case I2C_NEXUS_T_DEV:
1307 if (!i2c_nex_bus_config_dev(nex)) {
1308 goto err;
1309 }
1310 break;
1311 case I2C_NEXUS_T_CTRL:
1312 case I2C_NEXUS_T_PORT:
1313 case I2C_NEXUS_T_MUX:
1314 if (!i2c_nex_bus_config_nex(nex)) {
1315 goto err;
1316 }
1317 break;
1318 }
1319
1320 ddi_set_parent_data(nex->in_dip, nex);
1321 (void) ndi_devi_bind_driver(nex->in_dip, 0);
1322 return;
1323
1324 err:
1325 (void) ndi_devi_free(nex->in_dip);
1326 nex->in_dip = NULL;
1327 conf->inbc_ret = NDI_FAILURE;
1328 }
1329
1330 void
i2c_nex_bus_unconfig_one(i2c_nexus_t * nex,i2c_nex_bus_config_t * conf)1331 i2c_nex_bus_unconfig_one(i2c_nexus_t *nex, i2c_nex_bus_config_t *conf)
1332 {
1333 if (conf->inbc_op == BUS_UNCONFIG_ONE) {
1334 if (conf->inbc_matched) {
1335 return;
1336
1337 }
1338
1339 if (strcmp(nex->in_name, conf->inbc_name) != 0 ||
1340 strcmp(nex->in_addr, conf->inbc_addr) != 0) {
1341 return;
1342 }
1343 } else if (conf->inbc_op == BUS_UNCONFIG_DRIVER) {
1344 major_t major = (major_t)(uintptr_t)conf->inbc_arg;
1345 if (major != DDI_MAJOR_T_NONE && nex->in_dip != NULL &&
1346 major != ddi_driver_major(nex->in_dip)) {
1347 return;
1348 }
1349 }
1350
1351 conf->inbc_matched = true;
1352
1353 int ret = i2c_nex_bus_unconfig_i2cnex(nex);
1354 if (ret != NDI_SUCCESS && conf->inbc_ret == NDI_SUCCESS) {
1355 conf->inbc_ret = ret;
1356 }
1357 }
1358
1359 /*
1360 * This is our general bus configuration entry point for the i2c nexus. This is
1361 * used by all of the i2cnex logical nodes themselves and by the root which is a
1362 * specific PCI, MMIO, or some other bus controller. If pdip corresponds to a
1363 * driver named "i2cnex" then that is us and we know that we have an i2c_nexus_t
1364 * in our parent data. Otherwise, we are at the top of the tree and refer to a
1365 * controller and need to create the single instance.
1366 *
1367 * Like other folks, because we don't know what driver will be applied
1368 * (generally speaking) we treat BUS_CONFIG_ALL and BUS_CONFIG_DRIVER as the
1369 * same. Here's what we create and the unit address scheme at various points in
1370 * the tree:
1371 *
1372 * pciXXX,YYYY - i2c provider
1373 * i2cnex@<ctrl name>
1374 * i2cnex@port0
1375 * <dev>@<i2c addr>
1376 * <dev>@<i2c addr>
1377 * pca9545@<addr> driver=pca954x
1378 * i2cnex@pca954x0
1379 * i2nex@port0
1380 * i2nex@port1
1381 * i2nex@port2
1382 * i2nex@port3
1383 * <dev>@<i2c addr>
1384 * i2cnex@port1
1385 *
1386 * Our bus config operation may be called from different contexts:
1387 *
1388 * 1) It may be invoked as a result of a specific user device addition ioctl.
1389 * That ends up in i2c_device_config() which makes an explicit call to
1390 * bus_config.
1391 *
1392 * 2) We may be invoked by the kernel due to having finished enumeration in
1393 * attach(9E) and have a bus_ops.
1394 *
1395 * 3) We may be invoked to enumerate a specific device that is in /devices. This
1396 * is part of how modules can be unloaded and reloaded again.
1397 *
1398 * In the case of (2) or (3) we need to make sure we begin an i2c transaction to
1399 * effectively hold the controller and ensure that no one else can change the
1400 * current state of it. In the case of (1) though, if our thread is the one that
1401 * has taken action, then led us to (1), then we'll allow the use of this.
1402 */
1403 static int
i2c_nex_bus_config(dev_info_t * pdip,uint_t flags,ddi_bus_config_op_t op,void * arg,dev_info_t ** childp)1404 i2c_nex_bus_config(dev_info_t *pdip, uint_t flags, ddi_bus_config_op_t op,
1405 void *arg, dev_info_t **childp)
1406 {
1407 i2c_port_t *port;
1408 i2c_dev_t *dev;
1409 i2c_mux_t *mux;
1410 i2c_nex_bus_config_t conf;
1411 i2c_txn_t *txn = NULL;
1412 i2c_nexus_t *nex = ddi_get_parent_data(pdip);
1413 i2c_ctrl_t *ctrl = nex->in_ctrl;
1414
1415 VERIFY3P(nex, !=, NULL);
1416
1417 switch (op) {
1418 case BUS_CONFIG_ONE:
1419 case BUS_CONFIG_ALL:
1420 case BUS_CONFIG_DRIVER:
1421 ndi_devi_enter(pdip);
1422 break;
1423 default:
1424 return (NDI_FAILURE);
1425 }
1426
1427 if (!i2c_nex_bus_config_init(&conf, op, arg)) {
1428 ndi_devi_exit(pdip);
1429 return (NDI_EINVAL);
1430 }
1431
1432 txn = i2c_txn_alloc(ctrl, I2C_LOCK_TAG_BUS_CONFIG, pdip);
1433 if (i2c_txn_ctrl_lock(txn, true) != I2C_CORE_E_OK) {
1434 i2c_txn_free(txn);
1435 ndi_devi_exit(pdip);
1436 return (NDI_EINVAL);
1437 }
1438 i2c_txn_nexus_op_begin(txn);
1439
1440 /*
1441 * Our device type determines what we should iterate over. If we're
1442 * working on the controller node, it's ports. If it's a port, devices.
1443 * If it's a device, then it's the ports the mux has.
1444 */
1445 switch (nex->in_type) {
1446 case I2C_NEXUS_T_CTRL:
1447 for (uint32_t i = 0; i < nex->in_ctrl->ic_nports; i++) {
1448 i2c_nex_bus_config_one(nex->in_ctrl->ic_ports[i].ip_nex,
1449 &conf);
1450 }
1451 break;
1452 case I2C_NEXUS_T_PORT:
1453 port = nex->in_data.in_port;
1454 for (i2c_dev_t *dev = avl_first(&port->ip_devices); dev != NULL;
1455 dev = AVL_NEXT(&port->ip_devices, dev)) {
1456 i2c_nex_bus_config_one(dev->id_nex, &conf);
1457 }
1458 break;
1459 case I2C_NEXUS_T_DEV:
1460 dev = nex->in_data.in_dev;
1461 if (dev->id_mux != NULL) {
1462 i2c_nex_bus_config_one(dev->id_mux->im_nex, &conf);
1463 }
1464 break;
1465 case I2C_NEXUS_T_MUX:
1466 mux = nex->in_data.in_mux;
1467 for (uint32_t i = 0; i < mux->im_nports; i++) {
1468 i2c_nex_bus_config_one(mux->im_ports[i].ip_nex, &conf);
1469 }
1470 break;
1471 }
1472
1473 /*
1474 * txn is non-NULL only if we didn't inherit the transaction. In that
1475 * case, proceed to release it.
1476 */
1477 i2c_txn_nexus_op_end(txn);
1478 i2c_txn_ctrl_unlock(txn);
1479 i2c_txn_free(txn);
1480
1481 i2c_nex_bus_config_fini(&conf);
1482 ndi_devi_exit(pdip);
1483
1484 if (op == BUS_CONFIG_ONE) {
1485 if (!conf.inbc_matched) {
1486 return (NDI_EINVAL);
1487 }
1488
1489 if (conf.inbc_ret != NDI_SUCCESS) {
1490 return (conf.inbc_ret);
1491 }
1492 }
1493
1494 flags |= NDI_ONLINE_ATTACH;
1495 return (ndi_busop_bus_config(pdip, flags, op, arg, childp, 0));
1496 }
1497
1498 static int
i2c_nex_bus_unconfig(dev_info_t * pdip,uint_t flags,ddi_bus_config_op_t op,void * arg)1499 i2c_nex_bus_unconfig(dev_info_t *pdip, uint_t flags, ddi_bus_config_op_t op,
1500 void *arg)
1501 {
1502 i2c_port_t *port;
1503 i2c_dev_t *dev;
1504 i2c_mux_t *mux;
1505 int ret;
1506 i2c_nex_bus_config_t conf;
1507 i2c_txn_t *txn = NULL;
1508 i2c_nexus_t *nex = ddi_get_parent_data(pdip);
1509 i2c_ctrl_t *ctrl = nex->in_ctrl;
1510
1511 VERIFY3P(nex, !=, NULL);
1512
1513 switch (op) {
1514 case BUS_UNCONFIG_ONE:
1515 case BUS_UNCONFIG_ALL:
1516 case BUS_UNCONFIG_DRIVER:
1517 ndi_devi_enter(pdip);
1518 flags |= NDI_UNCONFIG;
1519 ret = ndi_busop_bus_unconfig(pdip, flags, op, arg);
1520 if (ret != NDI_SUCCESS) {
1521 ndi_devi_exit(pdip);
1522 return (ret);
1523 }
1524 break;
1525 default:
1526 return (NDI_FAILURE);
1527 }
1528
1529 /*
1530 * If we do not have a request to remove the device nodes, then there is
1531 * no need for us to proceed with bus unconfig. The call to
1532 * ndi_busop_bus_unconfig() will have taken care of detaching any nodes
1533 * that are required.
1534 */
1535 if ((flags & NDI_DEVI_REMOVE) == 0) {
1536 ndi_devi_exit(pdip);
1537 return (NDI_SUCCESS);
1538 }
1539
1540 if (!i2c_nex_bus_config_init(&conf, op, arg)) {
1541 ndi_devi_exit(pdip);
1542 return (NDI_EINVAL);
1543 }
1544
1545 txn = i2c_txn_alloc(ctrl, I2C_LOCK_TAG_BUS_UNCONFIG, pdip);
1546 if (i2c_txn_ctrl_lock(txn, true) != I2C_CORE_E_OK) {
1547 i2c_txn_free(txn);
1548 ndi_devi_exit(pdip);
1549 return (NDI_EINVAL);
1550 }
1551 i2c_txn_nexus_op_begin(txn);
1552
1553 switch (nex->in_type) {
1554 case I2C_NEXUS_T_CTRL:
1555 for (uint32_t i = 0; i < nex->in_ctrl->ic_nports; i++) {
1556 i2c_port_t *port = &nex->in_ctrl->ic_ports[i];
1557 i2c_nex_bus_unconfig_one(port->ip_nex, &conf);
1558 }
1559 break;
1560 case I2C_NEXUS_T_PORT:
1561 port = nex->in_data.in_port;
1562 for (i2c_dev_t *dev = avl_first(&port->ip_devices); dev != NULL;
1563 dev = AVL_NEXT(&port->ip_devices, dev)) {
1564 i2c_nex_bus_unconfig_one(dev->id_nex, &conf);
1565 }
1566 break;
1567 case I2C_NEXUS_T_DEV:
1568 dev = nex->in_data.in_dev;
1569 if (dev->id_mux != NULL) {
1570 i2c_nex_bus_unconfig_one(dev->id_mux->im_nex, &conf);
1571 }
1572 break;
1573 case I2C_NEXUS_T_MUX:
1574 mux = nex->in_data.in_mux;
1575 for (uint32_t i = 0; i < mux->im_nports; i++) {
1576 i2c_nex_bus_unconfig_one(mux->im_ports[i].ip_nex,
1577 &conf);
1578 }
1579 break;
1580 }
1581
1582 /*
1583 * txn is non-NULL only if we didn't inherit the transaction. In that
1584 * case, proceed to release it.
1585 */
1586 i2c_txn_nexus_op_end(txn);
1587 i2c_txn_ctrl_unlock(txn);
1588 i2c_txn_free(txn);
1589
1590 i2c_nex_bus_config_fini(&conf);
1591 ndi_devi_exit(pdip);
1592
1593 if (op == BUS_UNCONFIG_ONE) {
1594
1595 if (!conf.inbc_matched) {
1596 return (NDI_EINVAL);
1597 }
1598
1599 if (conf.inbc_ret != NDI_SUCCESS) {
1600 return (conf.inbc_ret);
1601 }
1602 }
1603
1604 return (NDI_SUCCESS);
1605 }
1606
1607 static bool
i2c_nex_port_empty(i2c_nexus_t * nex)1608 i2c_nex_port_empty(i2c_nexus_t *nex)
1609 {
1610 i2c_port_t *ports;
1611 uint32_t nports;
1612
1613 switch (nex->in_type) {
1614 case I2C_NEXUS_T_CTRL:
1615 ports = nex->in_ctrl->ic_ports;
1616 nports = nex->in_ctrl->ic_nports;
1617 break;
1618 case I2C_NEXUS_T_PORT:
1619 ports = nex->in_data.in_port;
1620 nports = 1;
1621 break;
1622 case I2C_NEXUS_T_MUX:
1623 ports = nex->in_data.in_mux->im_ports;
1624 nports = nex->in_data.in_mux->im_nports;
1625 break;
1626 default:
1627 panic("unknown i2c nexus type: 0x%x", nex->in_type);
1628 }
1629
1630 for (uint32_t i = 0; i < nports; i++) {
1631 if (avl_numnodes(&ports[i].ip_devices) > 0 ||
1632 ports[i].ip_ndevs_ds > 0) {
1633 return (false);
1634 }
1635 }
1636 return (true);
1637 }
1638
1639 /*
1640 * An I2C port may be actively used by a controller as part of its active mux
1641 * selection path. As part of detaching we need to inform the I/O subsystem that
1642 * this path is going away and to remove the port from the list of what's
1643 * active.
1644 */
1645 static void
i2c_nex_port_deactivate(i2c_txn_t * txn,i2c_nexus_t * nex)1646 i2c_nex_port_deactivate(i2c_txn_t *txn, i2c_nexus_t *nex)
1647 {
1648 i2c_port_t *ports;
1649 uint32_t nports;
1650
1651 switch (nex->in_type) {
1652 case I2C_NEXUS_T_CTRL:
1653 ports = nex->in_ctrl->ic_ports;
1654 nports = nex->in_ctrl->ic_nports;
1655 break;
1656 case I2C_NEXUS_T_MUX:
1657 ports = nex->in_data.in_mux->im_ports;
1658 nports = nex->in_data.in_mux->im_nports;
1659 break;
1660 default:
1661 return;
1662 }
1663
1664 for (uint32_t i = 0; i < nports; i++) {
1665 i2c_mux_remove_port(txn, nex->in_ctrl, &ports[i]);
1666 }
1667 }
1668
1669 static void
i2c_nex_detach_ctrl(i2c_ctrl_t * ctrl)1670 i2c_nex_detach_ctrl(i2c_ctrl_t *ctrl)
1671 {
1672 i2c_nexus_t *nex = ctrl->ic_nexus;
1673
1674 mutex_enter(&i2cnex_minors.im_mutex);
1675 if ((nex->in_flags & I2C_NEXUS_F_DISC) != 0) {
1676 avl_remove(&i2cnex_minors.im_nexi, nex);
1677 nex->in_flags &= ~I2C_NEXUS_F_DISC;
1678 }
1679 mutex_exit(&i2cnex_minors.im_mutex);
1680
1681 for (uint32_t i = 0; i < ctrl->ic_nports; i++) {
1682 i2c_port_fini(&ctrl->ic_ports[i]);
1683 }
1684
1685 ddi_remove_minor_node(nex->in_dip, NULL);
1686 }
1687
1688 static int
i2c_nex_attach_ctrl(i2c_ctrl_t * ctrl)1689 i2c_nex_attach_ctrl(i2c_ctrl_t *ctrl)
1690 {
1691 i2c_nexus_t *nex = ctrl->ic_nexus;
1692
1693 if (ddi_create_minor_node(nex->in_dip, "devctl", S_IFCHR, nex->in_minor,
1694 DDI_NT_I2C_CTRL, 0) != DDI_SUCCESS) {
1695 dev_err(nex->in_dip, CE_WARN, "failed to create minor node "
1696 "%s:%s", DDI_NT_I2C_CTRL, nex->in_addr);
1697 goto err;
1698 }
1699
1700 for (uint32_t i = 0; i < ctrl->ic_nports; i++) {
1701 if (!i2c_port_init(ctrl, nex->in_dip, nex, &ctrl->ic_ports[i],
1702 i, ctrl->ic_ops->i2c_port_name_f, ctrl->ic_drv)) {
1703 goto err;
1704 }
1705 }
1706
1707 mutex_enter(&i2cnex_minors.im_mutex);
1708 avl_add(&i2cnex_minors.im_nexi, nex);
1709 nex->in_flags |= I2C_NEXUS_F_DISC;
1710 mutex_exit(&i2cnex_minors.im_mutex);
1711
1712 return (DDI_SUCCESS);
1713
1714 err:
1715 i2c_nex_detach_ctrl(ctrl);
1716 return (DDI_FAILURE);
1717 }
1718
1719 static void
i2c_nex_detach_mux(i2c_mux_t * mux)1720 i2c_nex_detach_mux(i2c_mux_t *mux)
1721 {
1722 i2c_nexus_t *nex = mux->im_nex;
1723
1724 mutex_enter(&i2cnex_minors.im_mutex);
1725 if ((nex->in_flags & I2C_NEXUS_F_DISC) != 0) {
1726 avl_remove(&i2cnex_minors.im_nexi, nex);
1727 nex->in_flags &= ~I2C_NEXUS_F_DISC;
1728 }
1729 mutex_exit(&i2cnex_minors.im_mutex);
1730
1731 for (uint32_t i = 0; i < mux->im_nports; i++) {
1732 i2c_port_fini(&mux->im_ports[i]);
1733 }
1734
1735 ddi_remove_minor_node(nex->in_dip, NULL);
1736 }
1737
1738 static int
i2c_nex_attach_mux(i2c_mux_t * mux)1739 i2c_nex_attach_mux(i2c_mux_t *mux)
1740 {
1741 i2c_nexus_t *nex = mux->im_nex;
1742
1743 if (ddi_create_minor_node(nex->in_dip, "devctl", S_IFCHR, nex->in_minor,
1744 DDI_NT_I2C_MUX, 0) != DDI_SUCCESS) {
1745 dev_err(nex->in_dip, CE_WARN, "failed to create minor node "
1746 "%s:%s", DDI_NT_I2C_MUX, nex->in_addr);
1747 goto err;
1748 }
1749
1750 for (uint32_t i = 0; i < mux->im_nports; i++) {
1751 if (!i2c_port_init(nex->in_ctrl, nex->in_dip, nex,
1752 &mux->im_ports[i], i, mux->im_ops->mux_port_name_f,
1753 mux->im_drv)) {
1754 goto err;
1755 }
1756 }
1757
1758 mutex_enter(&i2cnex_minors.im_mutex);
1759 avl_add(&i2cnex_minors.im_nexi, nex);
1760 nex->in_flags |= I2C_NEXUS_F_DISC;
1761 mutex_exit(&i2cnex_minors.im_mutex);
1762
1763 return (DDI_SUCCESS);
1764
1765 err:
1766 i2c_nex_detach_mux(mux);
1767 return (DDI_FAILURE);
1768 }
1769
1770 static void
i2c_nex_detach_port(i2c_port_t * port)1771 i2c_nex_detach_port(i2c_port_t *port)
1772 {
1773 i2c_nexus_t *nex = port->ip_nex;
1774
1775 mutex_enter(&i2cnex_minors.im_mutex);
1776 if ((nex->in_flags & I2C_NEXUS_F_DISC) != 0) {
1777 avl_remove(&i2cnex_minors.im_nexi, nex);
1778 nex->in_flags &= ~I2C_NEXUS_F_DISC;
1779 }
1780 mutex_exit(&i2cnex_minors.im_mutex);
1781
1782 ddi_remove_minor_node(port->ip_nex->in_dip, NULL);
1783 }
1784
1785 static int
i2c_nex_attach_port(i2c_port_t * port)1786 i2c_nex_attach_port(i2c_port_t *port)
1787 {
1788 i2c_nexus_t *nex = port->ip_nex;
1789
1790 if (ddi_create_minor_node(nex->in_dip, "devctl", S_IFCHR, nex->in_minor,
1791 DDI_NT_I2C_PORT, 0) != DDI_SUCCESS) {
1792 dev_err(nex->in_dip, CE_WARN, "failed to create minor node "
1793 "%s:%s", DDI_NT_I2C_PORT, nex->in_addr);
1794 goto err;
1795 }
1796
1797 mutex_enter(&i2cnex_minors.im_mutex);
1798 avl_add(&i2cnex_minors.im_nexi, nex);
1799 nex->in_flags |= I2C_NEXUS_F_DISC;
1800 mutex_exit(&i2cnex_minors.im_mutex);
1801
1802 return (DDI_SUCCESS);
1803
1804 err:
1805 i2c_nex_detach_port(port);
1806 return (DDI_FAILURE);
1807 }
1808
1809 static int
i2c_nex_attach(dev_info_t * dip,ddi_attach_cmd_t cmd)1810 i2c_nex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
1811 {
1812 i2c_nexus_t *nex;
1813
1814 switch (cmd) {
1815 case DDI_ATTACH:
1816 break;
1817 case DDI_RESUME:
1818 return (DDI_SUCCESS);
1819 default:
1820 return (DDI_FAILURE);
1821 }
1822
1823 nex = ddi_get_parent_data(dip);
1824 if (nex == NULL) {
1825 dev_err(dip, CE_WARN, "missing expected i2c nexus parent "
1826 "data");
1827 return (DDI_FAILURE);
1828 }
1829
1830 switch (nex->in_type) {
1831 case I2C_NEXUS_T_CTRL:
1832 return (i2c_nex_attach_ctrl(nex->in_ctrl));
1833 case I2C_NEXUS_T_PORT:
1834 return (i2c_nex_attach_port(nex->in_data.in_port));
1835 case I2C_NEXUS_T_MUX:
1836 return (i2c_nex_attach_mux(nex->in_data.in_mux));
1837 default:
1838 panic("cannot attach i2c nexus type: 0x%x", nex->in_type);
1839 }
1840 }
1841
1842 static int
i2c_nex_getinfo(dev_info_t * dip,ddi_info_cmd_t cmd,void * arg,void ** resp)1843 i2c_nex_getinfo(dev_info_t *dip, ddi_info_cmd_t cmd, void *arg, void **resp)
1844 {
1845 i2c_nexus_t *nex;
1846
1847 switch (cmd) {
1848 case DDI_INFO_DEVT2DEVINFO:
1849 nex = i2c_nex_find_by_minor(getminor((dev_t)arg));
1850 if (nex == NULL) {
1851 return (DDI_FAILURE);
1852 }
1853
1854 *resp = (void *)nex->in_dip;
1855 break;
1856 case DDI_INFO_DEVT2INSTANCE:
1857 nex = i2c_nex_find_by_minor(getminor((dev_t)arg));
1858 if (nex == NULL) {
1859 return (DDI_FAILURE);
1860 }
1861
1862 *resp = (void *)(uintptr_t)ddi_get_instance(nex->in_dip);
1863 break;
1864 }
1865
1866 return (DDI_SUCCESS);
1867 }
1868
1869 static int
i2c_nex_detach(dev_info_t * dip,ddi_detach_cmd_t cmd)1870 i2c_nex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd)
1871 {
1872 i2c_nexus_t *nex;
1873
1874 switch (cmd) {
1875 case DDI_DETACH:
1876 break;
1877 case DDI_SUSPEND:
1878 return (DDI_SUCCESS);
1879 default:
1880 return (DDI_FAILURE);
1881 }
1882
1883 nex = ddi_get_parent_data(dip);
1884 if (nex == NULL) {
1885 dev_err(dip, CE_WARN, "missing expected i2c nexus parent "
1886 "data");
1887 return (DDI_FAILURE);
1888 }
1889
1890 /*
1891 * Ensure there are no devices active on this before we proceed to
1892 * detach it. The controller lock is also required for port teardown as
1893 * ports may be currently active on the controller's mux list.
1894 */
1895 i2c_ctrl_t *ctrl = nex->in_ctrl;
1896 i2c_txn_t *txn = i2c_txn_alloc(ctrl, I2C_LOCK_TAG_DIP_DETACH, dip);
1897 if (i2c_txn_ctrl_lock(txn, true) != I2C_CORE_E_OK) {
1898 i2c_txn_free(txn);
1899 return (DDI_FAILURE);
1900 }
1901
1902 if (!i2c_nex_port_empty(nex)) {
1903 i2c_txn_ctrl_unlock(txn);
1904 i2c_txn_free(txn);
1905 return (DDI_FAILURE);
1906 }
1907
1908 i2c_nex_port_deactivate(txn, nex);
1909
1910 switch (nex->in_type) {
1911 case I2C_NEXUS_T_CTRL:
1912 i2c_nex_detach_ctrl(nex->in_ctrl);
1913 break;
1914 case I2C_NEXUS_T_PORT:
1915 i2c_nex_detach_port(nex->in_data.in_port);
1916 break;
1917 case I2C_NEXUS_T_MUX:
1918 i2c_nex_detach_mux(nex->in_data.in_mux);
1919 break;
1920 default:
1921 panic("cannot detach i2c nexus type: 0x%x", nex->in_type);
1922 }
1923 i2c_txn_ctrl_unlock(txn);
1924 i2c_txn_free(txn);
1925
1926 return (DDI_SUCCESS);
1927 }
1928
1929 static struct cb_ops i2c_nex_cb_ops = {
1930 .cb_open = i2c_nex_open,
1931 .cb_close = i2c_nex_close,
1932 .cb_strategy = nodev,
1933 .cb_print = nodev,
1934 .cb_dump = nodev,
1935 .cb_read = nodev,
1936 .cb_write = nodev,
1937 .cb_ioctl = i2c_nex_ioctl,
1938 .cb_devmap = nodev,
1939 .cb_mmap = nodev,
1940 .cb_segmap = nodev,
1941 .cb_chpoll = nochpoll,
1942 .cb_prop_op = ddi_prop_op,
1943 .cb_flag = D_MP,
1944 .cb_rev = CB_REV,
1945 .cb_aread = nodev,
1946 .cb_awrite = nodev
1947 };
1948
1949 struct bus_ops i2c_nex_bus_ops = {
1950 .busops_rev = BUSO_REV,
1951 .bus_dma_map = ddi_no_dma_map,
1952 .bus_dma_allochdl = ddi_no_dma_allochdl,
1953 .bus_dma_freehdl = ddi_no_dma_freehdl,
1954 .bus_dma_bindhdl = ddi_no_dma_bindhdl,
1955 .bus_dma_unbindhdl = ddi_no_dma_unbindhdl,
1956 .bus_dma_flush = ddi_no_dma_flush,
1957 .bus_dma_win = ddi_no_dma_win,
1958 .bus_dma_ctl = ddi_no_dma_mctl,
1959 .bus_prop_op = ddi_bus_prop_op,
1960 .bus_ctl = i2c_nex_bus_ctl,
1961 .bus_config = i2c_nex_bus_config,
1962 .bus_unconfig = i2c_nex_bus_unconfig
1963 };
1964
1965 static struct dev_ops i2c_nex_dev_ops = {
1966 .devo_rev = DEVO_REV,
1967 .devo_refcnt = 0,
1968 .devo_getinfo = i2c_nex_getinfo,
1969 .devo_identify = nulldev,
1970 .devo_probe = nulldev,
1971 .devo_attach = i2c_nex_attach,
1972 .devo_detach = i2c_nex_detach,
1973 .devo_reset = nodev,
1974 .devo_quiesce = ddi_quiesce_not_needed,
1975 .devo_bus_ops = &i2c_nex_bus_ops,
1976 .devo_cb_ops = &i2c_nex_cb_ops
1977 };
1978
1979 static struct modldrv i2c_nex_modldrv = {
1980 .drv_modops = &mod_driverops,
1981 .drv_linkinfo = "I2C Nexus",
1982 .drv_dev_ops = &i2c_nex_dev_ops
1983 };
1984
1985 static struct modlinkage i2c_nex_modlinkage = {
1986 .ml_rev = MODREV_1,
1987 .ml_linkage = { &i2c_nex_modldrv, NULL }
1988 };
1989
1990 static void
i2c_nex_fini(void)1991 i2c_nex_fini(void)
1992 {
1993 mutex_destroy(&i2cnex_minors.im_mutex);
1994 avl_destroy(&i2cnex_minors.im_users);
1995 avl_destroy(&i2cnex_minors.im_nexi);
1996 list_destroy(&i2cnex_minors.im_roots);
1997 id_space_destroy(i2cnex_minors.im_user_ids);
1998 id_space_destroy(i2cnex_minors.im_ids);
1999 i2cnex_minors.im_ids = NULL;
2000 }
2001
2002 static int
i2c_nex_init(void)2003 i2c_nex_init(void)
2004 {
2005 i2cnex_minors.im_ids = id_space_create("i2cnex_minors",
2006 I2C_DEV_MINOR_MIN, I2C_DEV_MINOR_MAX);
2007 if (i2cnex_minors.im_ids == NULL) {
2008 return (ENOMEM);
2009 }
2010
2011 i2cnex_minors.im_user_ids = id_space_create("i2cnex_user_minors",
2012 I2C_USER_MINOR_MIN, I2C_USER_MINOR_MAX);
2013 if (i2cnex_minors.im_ids == NULL) {
2014 id_space_destroy(i2cnex_minors.im_ids);
2015 return (ENOMEM);
2016 }
2017
2018 list_create(&i2cnex_minors.im_roots, sizeof (i2c_root_t),
2019 offsetof(i2c_root_t, ir_link));
2020 avl_create(&i2cnex_minors.im_nexi, i2c_nexus_compare,
2021 sizeof (i2c_nexus_t), offsetof(i2c_nexus_t, in_avl));
2022 avl_create(&i2cnex_minors.im_users, i2c_user_compare,
2023 sizeof (i2c_user_t), offsetof(i2c_user_t, iu_avl));
2024 mutex_init(&i2cnex_minors.im_mutex, NULL, MUTEX_DRIVER, NULL);
2025
2026 return (0);
2027 }
2028
2029 int
_init(void)2030 _init(void)
2031 {
2032 int ret;
2033
2034 if ((ret = i2c_nex_init()) != 0) {
2035 return (ret);
2036 }
2037
2038 if ((ret = mod_install(&i2c_nex_modlinkage)) != 0) {
2039 i2c_nex_fini();
2040 }
2041
2042 return (ret);
2043 }
2044
2045 int
_info(struct modinfo * modinfop)2046 _info(struct modinfo *modinfop)
2047 {
2048 return (mod_info(&i2c_nex_modlinkage, modinfop));
2049 }
2050
2051 int
_fini(void)2052 _fini(void)
2053 {
2054 int ret;
2055
2056 if ((ret = mod_remove(&i2c_nex_modlinkage)) == 0) {
2057 i2c_nex_fini();
2058 }
2059
2060 return (ret);
2061 }
2062