xref: /freebsd/sys/x86/pci/qpi.c (revision 4f1f4356f3012928b463f9ef1710fb908e48b1e2)
1 /*-
2  * Copyright (c) 2010 Advanced Computing Technologies LLC
3  * Written by: John H. Baldwin <jhb@FreeBSD.org>
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 /*
29  * This driver provides a psuedo-bus to enumerate the PCI buses
30  * present on a sytem using a QPI chipset.  It creates a qpi0 bus that
31  * is a child of nexus0 and then creates two Host-PCI bridges as a
32  * child of that.
33  */
34 
35 #include <sys/cdefs.h>
36 __FBSDID("$FreeBSD$");
37 
38 #include <sys/param.h>
39 #include <sys/bus.h>
40 #include <sys/kernel.h>
41 #include <sys/malloc.h>
42 #include <sys/module.h>
43 #include <sys/systm.h>
44 
45 #include <machine/cputypes.h>
46 #include <machine/md_var.h>
47 #include <machine/pci_cfgreg.h>
48 #include <machine/specialreg.h>
49 
50 #include <dev/pci/pcivar.h>
51 #include <dev/pci/pcib_private.h>
52 #include "pcib_if.h"
53 
54 struct qpi_device {
55 	int	qd_pcibus;
56 };
57 
58 static MALLOC_DEFINE(M_QPI, "qpidrv", "qpi system device");
59 
60 static void
61 qpi_identify(driver_t *driver, device_t parent)
62 {
63 
64         /* Check CPUID to ensure this is an i7 CPU of some sort. */
65         if (!(cpu_vendor_id == CPU_VENDOR_INTEL &&
66 	    CPUID_TO_FAMILY(cpu_id) == 0x6 &&
67 	    (CPUID_TO_MODEL(cpu_id) == 0x1a || CPUID_TO_MODEL(cpu_id) == 0x2c)))
68                 return;
69 
70         /* PCI config register access is required. */
71         if (pci_cfgregopen() == 0)
72                 return;
73 
74 	/* Add a qpi bus device. */
75 	if (BUS_ADD_CHILD(parent, 20, "qpi", -1) == NULL)
76 		panic("Failed to add qpi bus");
77 }
78 
79 static int
80 qpi_probe(device_t dev)
81 {
82 
83 	device_set_desc(dev, "QPI system bus");
84 	return (BUS_PROBE_SPECIFIC);
85 }
86 
87 static int
88 qpi_attach(device_t dev)
89 {
90 	struct qpi_device *qdev;
91 	device_t child;
92 
93 	/*
94 	 * Add two Host-PCI bridge devices, one for PCI bus 254 and
95 	 * one for PCI bus 255.
96 	 */
97 	child = BUS_ADD_CHILD(dev, 0, "pcib", -1);
98 	if (child == NULL)
99 		panic("%s: failed to add pci bus 254",
100 		    device_get_nameunit(dev));
101 	qdev = malloc(sizeof(struct qpi_device), M_QPI, M_WAITOK);
102 	qdev->qd_pcibus = 254;
103 	device_set_ivars(child, qdev);
104 
105 	child = BUS_ADD_CHILD(dev, 0, "pcib", -1);
106 	if (child == NULL)
107 		panic("%s: failed to add pci bus 255",
108 		    device_get_nameunit(dev));
109 	qdev = malloc(sizeof(struct qpi_device), M_QPI, M_WAITOK);
110 	qdev->qd_pcibus = 255;
111 	device_set_ivars(child, qdev);
112 
113 	return (bus_generic_attach(dev));
114 }
115 
116 static int
117 qpi_print_child(device_t bus, device_t child)
118 {
119 	struct qpi_device *qdev;
120 	int retval = 0;
121 
122 	qdev = device_get_ivars(child);
123 	retval += bus_print_child_header(bus, child);
124 	if (qdev->qd_pcibus != -1)
125 		retval += printf(" pcibus %d", qdev->qd_pcibus);
126 	retval += bus_print_child_footer(bus, child);
127 
128 	return (retval);
129 }
130 
131 static int
132 qpi_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
133 {
134 	struct qpi_device *qdev;
135 
136 	qdev = device_get_ivars(child);
137 	switch (which) {
138 	case PCIB_IVAR_BUS:
139 		*result = qdev->qd_pcibus;
140 		break;
141 	default:
142 		return (ENOENT);
143 	}
144 	return (0);
145 }
146 
147 static device_method_t qpi_methods[] = {
148 	/* Device interface */
149 	DEVMETHOD(device_identify,	qpi_identify),
150 	DEVMETHOD(device_probe,		qpi_probe),
151 	DEVMETHOD(device_attach,	qpi_attach),
152 	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
153 	DEVMETHOD(device_suspend,	bus_generic_suspend),
154 	DEVMETHOD(device_resume,	bus_generic_resume),
155 
156 	/* Bus interface */
157 	DEVMETHOD(bus_print_child,	qpi_print_child),
158 	DEVMETHOD(bus_add_child,	bus_generic_add_child),
159 	DEVMETHOD(bus_read_ivar,	qpi_read_ivar),
160 	DEVMETHOD(bus_alloc_resource,	bus_generic_alloc_resource),
161 	DEVMETHOD(bus_release_resource,	bus_generic_release_resource),
162 	DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
163 	DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
164 	DEVMETHOD(bus_setup_intr,	bus_generic_setup_intr),
165 	DEVMETHOD(bus_teardown_intr,	bus_generic_teardown_intr),
166 
167 	{ 0, 0 }
168 };
169 
170 static devclass_t qpi_devclass;
171 
172 DEFINE_CLASS_0(qpi, qpi_driver, qpi_methods, 0);
173 DRIVER_MODULE(qpi, nexus, qpi_driver, qpi_devclass, 0, 0);
174 
175 static int
176 qpi_pcib_probe(device_t dev)
177 {
178 
179 	device_set_desc(dev, "QPI Host-PCI bridge");
180 	return (BUS_PROBE_SPECIFIC);
181 }
182 
183 static int
184 qpi_pcib_attach(device_t dev)
185 {
186 
187 	device_add_child(dev, "pci", pcib_get_bus(dev));
188         return (bus_generic_attach(dev));
189 }
190 
191 static int
192 qpi_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
193 {
194 
195 	switch (which) {
196 	case PCIB_IVAR_DOMAIN:
197 		*result = 0;
198 		return (0);
199 	case PCIB_IVAR_BUS:
200 		*result = pcib_get_bus(dev);
201 		return (0);
202 	default:
203 		return (ENOENT);
204 	}
205 }
206 
207 static uint32_t
208 qpi_pcib_read_config(device_t dev, u_int bus, u_int slot, u_int func,
209     u_int reg, int bytes)
210 {
211 
212 	return (pci_cfgregread(bus, slot, func, reg, bytes));
213 }
214 
215 static void
216 qpi_pcib_write_config(device_t dev, u_int bus, u_int slot, u_int func,
217     u_int reg, uint32_t data, int bytes)
218 {
219 
220 	pci_cfgregwrite(bus, slot, func, reg, data, bytes);
221 }
222 
223 static int
224 qpi_pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount,
225     int *irqs)
226 {
227 	device_t bus;
228 
229 	bus = device_get_parent(pcib);
230 	return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount,
231 	    irqs));
232 }
233 
234 static int
235 qpi_pcib_alloc_msix(device_t pcib, device_t dev, int *irq)
236 {
237 	device_t bus;
238 
239 	bus = device_get_parent(pcib);
240 	return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, irq));
241 }
242 
243 static int
244 qpi_pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr,
245     uint32_t *data)
246 {
247 	device_t bus;
248 
249 	bus = device_get_parent(pcib);
250 	return (PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data));
251 }
252 
253 static device_method_t qpi_pcib_methods[] = {
254 	/* Device interface */
255 	DEVMETHOD(device_probe,		qpi_pcib_probe),
256 	DEVMETHOD(device_attach,	qpi_pcib_attach),
257 	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
258 	DEVMETHOD(device_suspend,	bus_generic_suspend),
259 	DEVMETHOD(device_resume,	bus_generic_resume),
260 
261 	/* Bus interface */
262 	DEVMETHOD(bus_print_child,	bus_generic_print_child),
263 	DEVMETHOD(bus_read_ivar,	qpi_pcib_read_ivar),
264 	DEVMETHOD(bus_alloc_resource,	bus_generic_alloc_resource),
265 	DEVMETHOD(bus_release_resource,	bus_generic_release_resource),
266 	DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
267 	DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
268 	DEVMETHOD(bus_setup_intr,	bus_generic_setup_intr),
269 	DEVMETHOD(bus_teardown_intr,	bus_generic_teardown_intr),
270 
271 	/* pcib interface */
272 	DEVMETHOD(pcib_maxslots,	pcib_maxslots),
273 	DEVMETHOD(pcib_read_config,	qpi_pcib_read_config),
274 	DEVMETHOD(pcib_write_config,	qpi_pcib_write_config),
275 	DEVMETHOD(pcib_alloc_msi,	qpi_pcib_alloc_msi),
276 	DEVMETHOD(pcib_release_msi,	pcib_release_msi),
277 	DEVMETHOD(pcib_alloc_msix,	qpi_pcib_alloc_msix),
278 	DEVMETHOD(pcib_release_msix,	pcib_release_msix),
279 	DEVMETHOD(pcib_map_msi,		qpi_pcib_map_msi),
280 
281 	{0, 0}
282 };
283 
284 static devclass_t qpi_pcib_devclass;
285 
286 DEFINE_CLASS_0(pcib, qpi_pcib_driver, qpi_pcib_methods, 0);
287 DRIVER_MODULE(pcib, qpi, qpi_pcib_driver, qpi_pcib_devclass, 0, 0);
288