1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2008 Marcel Moolenaar 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/ktr.h> 36 #include <sys/bus.h> 37 #include <sys/cpuset.h> 38 #include <sys/lock.h> 39 #include <sys/malloc.h> 40 #include <sys/mutex.h> 41 #include <sys/pcpu.h> 42 #include <sys/proc.h> 43 #include <sys/sched.h> 44 #include <sys/smp.h> 45 46 #include <vm/vm.h> 47 #include <vm/vm_param.h> 48 #include <vm/pmap.h> 49 #include <vm/vm_map.h> 50 #include <vm/vm_extern.h> 51 #include <vm/vm_kern.h> 52 53 #include <machine/bus.h> 54 #include <machine/cpu.h> 55 #include <machine/intr_machdep.h> 56 #include <machine/pcb.h> 57 #include <machine/platform.h> 58 #include <machine/md_var.h> 59 #include <machine/setjmp.h> 60 #include <machine/smp.h> 61 62 #include "pic_if.h" 63 64 extern struct pcpu __pcpu[MAXCPU]; 65 66 volatile static int ap_awake; 67 volatile static u_int ap_letgo; 68 volatile static u_quad_t ap_timebase; 69 static u_int ipi_msg_cnt[32]; 70 static struct mtx ap_boot_mtx; 71 struct pcb stoppcbs[MAXCPU]; 72 73 void 74 machdep_ap_bootstrap(void) 75 { 76 77 PCPU_SET(awake, 1); 78 __asm __volatile("msync; isync"); 79 80 while (ap_letgo == 0) 81 __asm __volatile("or 27,27,27"); 82 __asm __volatile("or 6,6,6"); 83 84 /* Give platform code a chance to do anything necessary */ 85 platform_smp_ap_init(); 86 87 /* Initialize DEC and TB, sync with the BSP values */ 88 platform_smp_timebase_sync(ap_timebase, 1); 89 decr_ap_init(); 90 91 /* Serialize console output and AP count increment */ 92 mtx_lock_spin(&ap_boot_mtx); 93 ap_awake++; 94 printf("SMP: AP CPU #%d launched\n", PCPU_GET(cpuid)); 95 mtx_unlock_spin(&ap_boot_mtx); 96 97 while(smp_started == 0) 98 ; 99 100 /* Start per-CPU event timers. */ 101 cpu_initclocks_ap(); 102 103 /* Announce ourselves awake, and enter the scheduler */ 104 sched_throw(NULL); 105 } 106 107 void 108 cpu_mp_setmaxid(void) 109 { 110 struct cpuref cpuref; 111 int error; 112 113 mp_ncpus = 0; 114 mp_maxid = 0; 115 error = platform_smp_first_cpu(&cpuref); 116 while (!error) { 117 mp_ncpus++; 118 mp_maxid = max(cpuref.cr_cpuid, mp_maxid); 119 error = platform_smp_next_cpu(&cpuref); 120 } 121 /* Sanity. */ 122 if (mp_ncpus == 0) 123 mp_ncpus = 1; 124 } 125 126 int 127 cpu_mp_probe(void) 128 { 129 130 /* 131 * We're not going to enable SMP if there's only 1 processor. 132 */ 133 return (mp_ncpus > 1); 134 } 135 136 void 137 cpu_mp_start(void) 138 { 139 struct cpuref bsp, cpu; 140 struct pcpu *pc; 141 int error; 142 143 error = platform_smp_get_bsp(&bsp); 144 KASSERT(error == 0, ("Don't know BSP")); 145 146 error = platform_smp_first_cpu(&cpu); 147 while (!error) { 148 if (cpu.cr_cpuid >= MAXCPU) { 149 printf("SMP: cpu%d: skipped -- ID out of range\n", 150 cpu.cr_cpuid); 151 goto next; 152 } 153 if (CPU_ISSET(cpu.cr_cpuid, &all_cpus)) { 154 printf("SMP: cpu%d: skipped - duplicate ID\n", 155 cpu.cr_cpuid); 156 goto next; 157 } 158 if (cpu.cr_cpuid != bsp.cr_cpuid) { 159 void *dpcpu; 160 161 pc = &__pcpu[cpu.cr_cpuid]; 162 dpcpu = (void *)kmem_malloc(kernel_arena, DPCPU_SIZE, 163 M_WAITOK | M_ZERO); 164 pcpu_init(pc, cpu.cr_cpuid, sizeof(*pc)); 165 dpcpu_init(dpcpu, cpu.cr_cpuid); 166 } else { 167 pc = pcpup; 168 pc->pc_cpuid = bsp.cr_cpuid; 169 pc->pc_bsp = 1; 170 } 171 pc->pc_hwref = cpu.cr_hwref; 172 CPU_SET(pc->pc_cpuid, &all_cpus); 173 next: 174 error = platform_smp_next_cpu(&cpu); 175 } 176 } 177 178 void 179 cpu_mp_announce(void) 180 { 181 struct pcpu *pc; 182 int i; 183 184 if (!bootverbose) 185 return; 186 187 CPU_FOREACH(i) { 188 pc = pcpu_find(i); 189 if (pc == NULL) 190 continue; 191 printf("cpu%d: dev=%x", i, (int)pc->pc_hwref); 192 if (pc->pc_bsp) 193 printf(" (BSP)"); 194 printf("\n"); 195 } 196 } 197 198 static void 199 cpu_mp_unleash(void *dummy) 200 { 201 struct pcpu *pc; 202 int cpus, timeout; 203 int ret; 204 205 if (mp_ncpus <= 1) 206 return; 207 208 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN); 209 210 cpus = 0; 211 smp_cpus = 0; 212 #ifdef BOOKE 213 tlb1_ap_prep(); 214 #endif 215 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { 216 cpus++; 217 if (!pc->pc_bsp) { 218 if (bootverbose) 219 printf("Waking up CPU %d (dev=%x)\n", 220 pc->pc_cpuid, (int)pc->pc_hwref); 221 222 ret = platform_smp_start_cpu(pc); 223 if (ret == 0) { 224 timeout = 2000; /* wait 2sec for the AP */ 225 while (!pc->pc_awake && --timeout > 0) 226 DELAY(1000); 227 } 228 } else { 229 pc->pc_awake = 1; 230 } 231 if (pc->pc_awake) { 232 if (bootverbose) 233 printf("Adding CPU %d, hwref=%jx, awake=%x\n", 234 pc->pc_cpuid, (uintmax_t)pc->pc_hwref, 235 pc->pc_awake); 236 smp_cpus++; 237 } else 238 CPU_SET(pc->pc_cpuid, &stopped_cpus); 239 } 240 241 ap_awake = 1; 242 243 /* Provide our current DEC and TB values for APs */ 244 ap_timebase = mftb() + 10; 245 __asm __volatile("msync; isync"); 246 247 /* Let APs continue */ 248 atomic_store_rel_int(&ap_letgo, 1); 249 250 platform_smp_timebase_sync(ap_timebase, 0); 251 252 while (ap_awake < smp_cpus) 253 ; 254 255 if (smp_cpus != cpus || cpus != mp_ncpus) { 256 printf("SMP: %d CPUs found; %d CPUs usable; %d CPUs woken\n", 257 mp_ncpus, cpus, smp_cpus); 258 } 259 260 if (smp_cpus > 1) 261 atomic_store_rel_int(&smp_started, 1); 262 263 /* Let the APs get into the scheduler */ 264 DELAY(10000); 265 266 } 267 268 SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, cpu_mp_unleash, NULL); 269 270 int 271 powerpc_ipi_handler(void *arg) 272 { 273 u_int cpuid; 274 uint32_t ipimask; 275 int msg; 276 277 CTR2(KTR_SMP, "%s: MSR 0x%08x", __func__, mfmsr()); 278 279 ipimask = atomic_readandclear_32(&(pcpup->pc_ipimask)); 280 if (ipimask == 0) 281 return (FILTER_STRAY); 282 while ((msg = ffs(ipimask) - 1) != -1) { 283 ipimask &= ~(1u << msg); 284 ipi_msg_cnt[msg]++; 285 switch (msg) { 286 case IPI_AST: 287 CTR1(KTR_SMP, "%s: IPI_AST", __func__); 288 break; 289 case IPI_PREEMPT: 290 CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__); 291 sched_preempt(curthread); 292 break; 293 case IPI_RENDEZVOUS: 294 CTR1(KTR_SMP, "%s: IPI_RENDEZVOUS", __func__); 295 smp_rendezvous_action(); 296 break; 297 case IPI_STOP: 298 299 /* 300 * IPI_STOP_HARD is mapped to IPI_STOP so it is not 301 * necessary to add such case in the switch. 302 */ 303 CTR1(KTR_SMP, "%s: IPI_STOP or IPI_STOP_HARD (stop)", 304 __func__); 305 cpuid = PCPU_GET(cpuid); 306 savectx(&stoppcbs[cpuid]); 307 savectx(PCPU_GET(curpcb)); 308 CPU_SET_ATOMIC(cpuid, &stopped_cpus); 309 while (!CPU_ISSET(cpuid, &started_cpus)) 310 cpu_spinwait(); 311 CPU_CLR_ATOMIC(cpuid, &stopped_cpus); 312 CPU_CLR_ATOMIC(cpuid, &started_cpus); 313 CTR1(KTR_SMP, "%s: IPI_STOP (restart)", __func__); 314 break; 315 case IPI_HARDCLOCK: 316 CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__); 317 hardclockintr(); 318 break; 319 } 320 } 321 322 return (FILTER_HANDLED); 323 } 324 325 static void 326 ipi_send(struct pcpu *pc, int ipi) 327 { 328 329 CTR4(KTR_SMP, "%s: pc=%p, targetcpu=%d, IPI=%d", __func__, 330 pc, pc->pc_cpuid, ipi); 331 332 atomic_set_32(&pc->pc_ipimask, (1 << ipi)); 333 powerpc_sync(); 334 PIC_IPI(root_pic, pc->pc_cpuid); 335 336 CTR1(KTR_SMP, "%s: sent", __func__); 337 } 338 339 /* Send an IPI to a set of cpus. */ 340 void 341 ipi_selected(cpuset_t cpus, int ipi) 342 { 343 struct pcpu *pc; 344 345 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { 346 if (CPU_ISSET(pc->pc_cpuid, &cpus)) 347 ipi_send(pc, ipi); 348 } 349 } 350 351 /* Send an IPI to a specific CPU. */ 352 void 353 ipi_cpu(int cpu, u_int ipi) 354 { 355 356 ipi_send(cpuid_to_pcpu[cpu], ipi); 357 } 358 359 /* Send an IPI to all CPUs EXCEPT myself. */ 360 void 361 ipi_all_but_self(int ipi) 362 { 363 struct pcpu *pc; 364 365 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { 366 if (pc != pcpup) 367 ipi_send(pc, ipi); 368 } 369 } 370