1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2008 Marcel Moolenaar
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #include <sys/param.h>
30 #include <sys/systm.h>
31 #include <sys/kernel.h>
32 #include <sys/ktr.h>
33 #include <sys/bus.h>
34 #include <sys/cpuset.h>
35 #include <sys/domainset.h>
36 #include <sys/lock.h>
37 #include <sys/malloc.h>
38 #include <sys/mutex.h>
39 #include <sys/pcpu.h>
40 #include <sys/proc.h>
41 #include <sys/sched.h>
42 #include <sys/smp.h>
43
44 #include <vm/vm.h>
45 #include <vm/vm_param.h>
46 #include <vm/pmap.h>
47 #include <vm/vm_map.h>
48 #include <vm/vm_extern.h>
49 #include <vm/vm_kern.h>
50
51 #include <machine/bus.h>
52 #include <machine/cpu.h>
53 #include <machine/intr_machdep.h>
54 #include <machine/pcb.h>
55 #include <machine/platform.h>
56 #include <machine/md_var.h>
57 #include <machine/setjmp.h>
58 #include <machine/smp.h>
59
60 #include "pic_if.h"
61
62 volatile static int ap_awake;
63 volatile static u_int ap_letgo;
64 volatile static u_quad_t ap_timebase;
65 static struct mtx ap_boot_mtx;
66
67 void
machdep_ap_bootstrap(void)68 machdep_ap_bootstrap(void)
69 {
70
71 PCPU_SET(awake, 1);
72 __asm __volatile("msync; isync");
73
74 while (ap_letgo == 0)
75 nop_prio_vlow();
76 nop_prio_medium();
77
78 /*
79 * Set timebase as soon as possible to meet an implicit rendezvous
80 * from cpu_mp_unleash(), which sets ap_letgo and then immediately
81 * sets timebase.
82 *
83 * Note that this is instrinsically racy and is only relevant on
84 * platforms that do not support better mechanisms.
85 */
86 platform_smp_timebase_sync(ap_timebase, 1);
87
88 /* Give platform code a chance to do anything else necessary */
89 platform_smp_ap_init();
90
91 /* Initialize decrementer */
92 decr_ap_init();
93
94 /* Serialize console output and AP count increment */
95 mtx_lock_spin(&ap_boot_mtx);
96 ap_awake++;
97 if (bootverbose)
98 printf("SMP: AP CPU #%d launched\n", PCPU_GET(cpuid));
99 else
100 printf("%s%d%s", ap_awake == 2 ? "Launching APs: " : "",
101 PCPU_GET(cpuid), ap_awake == mp_ncpus ? "\n" : " ");
102 mtx_unlock_spin(&ap_boot_mtx);
103
104 while(smp_started == 0)
105 ;
106
107 /* Start per-CPU event timers. */
108 cpu_initclocks_ap();
109
110 /* Announce ourselves awake, and enter the scheduler */
111 sched_ap_entry();
112 }
113
114 void
cpu_mp_setmaxid(void)115 cpu_mp_setmaxid(void)
116 {
117 struct cpuref cpuref;
118 int error;
119
120 mp_ncpus = 0;
121 mp_maxid = 0;
122 error = platform_smp_first_cpu(&cpuref);
123 while (!error) {
124 mp_ncpus++;
125 mp_maxid = max(cpuref.cr_cpuid, mp_maxid);
126 error = platform_smp_next_cpu(&cpuref);
127 }
128 /* Sanity. */
129 if (mp_ncpus == 0)
130 mp_ncpus = 1;
131 }
132
133 int
cpu_mp_probe(void)134 cpu_mp_probe(void)
135 {
136
137 /*
138 * We're not going to enable SMP if there's only 1 processor.
139 */
140 return (mp_ncpus > 1);
141 }
142
143 void
cpu_mp_start(void)144 cpu_mp_start(void)
145 {
146 struct cpuref bsp, cpu;
147 struct pcpu *pc;
148 int domain, error;
149
150 error = platform_smp_get_bsp(&bsp);
151 KASSERT(error == 0, ("Don't know BSP"));
152
153 error = platform_smp_first_cpu(&cpu);
154 while (!error) {
155 if (cpu.cr_cpuid >= MAXCPU) {
156 printf("SMP: cpu%d: skipped -- ID out of range\n",
157 cpu.cr_cpuid);
158 goto next;
159 }
160 if (CPU_ISSET(cpu.cr_cpuid, &all_cpus)) {
161 printf("SMP: cpu%d: skipped - duplicate ID\n",
162 cpu.cr_cpuid);
163 goto next;
164 }
165
166 if (vm_ndomains > 1)
167 domain = cpu.cr_domain;
168 else
169 domain = 0;
170
171 if (cpu.cr_cpuid != bsp.cr_cpuid) {
172 void *dpcpu;
173
174 pc = &__pcpu[cpu.cr_cpuid];
175 dpcpu = kmem_malloc_domainset(DOMAINSET_PREF(domain),
176 DPCPU_SIZE, M_WAITOK | M_ZERO);
177 pcpu_init(pc, cpu.cr_cpuid, sizeof(*pc));
178 dpcpu_init(dpcpu, cpu.cr_cpuid);
179 } else {
180 pc = pcpup;
181 pc->pc_cpuid = bsp.cr_cpuid;
182 pc->pc_bsp = 1;
183 }
184 pc->pc_domain = domain;
185 pc->pc_hwref = cpu.cr_hwref;
186
187 CPU_SET(pc->pc_cpuid, &cpuset_domain[pc->pc_domain]);
188 KASSERT(pc->pc_domain < MAXMEMDOM, ("bad domain value %d\n",
189 pc->pc_domain));
190 CPU_SET(pc->pc_cpuid, &all_cpus);
191 next:
192 error = platform_smp_next_cpu(&cpu);
193 }
194
195 #ifdef SMP
196 platform_smp_probe_threads();
197 #endif
198 }
199
200 void
cpu_mp_announce(void)201 cpu_mp_announce(void)
202 {
203 struct pcpu *pc;
204 int i;
205
206 if (!bootverbose)
207 return;
208
209 CPU_FOREACH(i) {
210 pc = pcpu_find(i);
211 if (pc == NULL)
212 continue;
213 printf("cpu%d: dev=%x domain=%d ", i, (int)pc->pc_hwref, pc->pc_domain);
214 if (pc->pc_bsp)
215 printf(" (BSP)");
216 printf("\n");
217 }
218 }
219
220 static void
cpu_mp_unleash(void * dummy)221 cpu_mp_unleash(void *dummy)
222 {
223 struct pcpu *pc;
224 int cpus, timeout;
225 int ret;
226
227 if (mp_ncpus <= 1)
228 return;
229
230 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN);
231
232 cpus = 0;
233 smp_cpus = 0;
234 #ifdef BOOKE
235 tlb1_ap_prep();
236 #endif
237 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) {
238 cpus++;
239 if (!pc->pc_bsp) {
240 if (bootverbose)
241 printf("Waking up CPU %d (dev=%x)\n",
242 pc->pc_cpuid, (int)pc->pc_hwref);
243
244 pc->pc_flags = PCPU_GET(flags); /* Copy cached CPU flags */
245 ret = platform_smp_start_cpu(pc);
246 if (ret == 0) {
247 timeout = 2000; /* wait 2sec for the AP */
248 while (!pc->pc_awake && --timeout > 0)
249 DELAY(1000);
250 }
251 } else {
252 pc->pc_awake = 1;
253 }
254 if (pc->pc_awake) {
255 if (bootverbose)
256 printf("Adding CPU %d, hwref=%jx, awake=%x\n",
257 pc->pc_cpuid, (uintmax_t)pc->pc_hwref,
258 pc->pc_awake);
259 smp_cpus++;
260 } else
261 CPU_SET(pc->pc_cpuid, &stopped_cpus);
262 }
263
264 ap_awake = 1;
265
266 /* Provide our current DEC and TB values for APs */
267 ap_timebase = mftb() + 10;
268 __asm __volatile("msync; isync");
269
270 /* Let APs continue */
271 atomic_store_rel_int(&ap_letgo, 1);
272
273 platform_smp_timebase_sync(ap_timebase, 0);
274
275 while (ap_awake < smp_cpus)
276 ;
277
278 if (smp_cpus != cpus || cpus != mp_ncpus) {
279 printf("SMP: %d CPUs found; %d CPUs usable; %d CPUs woken\n",
280 mp_ncpus, cpus, smp_cpus);
281 }
282
283 if (smp_cpus > 1)
284 atomic_store_rel_int(&smp_started, 1);
285
286 /* Let the APs get into the scheduler */
287 DELAY(10000);
288
289 }
290
291 SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, cpu_mp_unleash, NULL);
292
293 int
powerpc_ipi_handler(void * arg)294 powerpc_ipi_handler(void *arg)
295 {
296 u_int cpuid;
297 uint32_t ipimask;
298
299 CTR2(KTR_SMP, "%s: MSR 0x%08x", __func__, mfmsr());
300
301 ipimask = atomic_readandclear_32(&(pcpup->pc_ipimask));
302 if (ipimask == 0)
303 return (FILTER_STRAY);
304 if (ipimask & (1 << IPI_AST)) {
305 CTR1(KTR_SMP, "%s: IPI_AST", __func__);
306 }
307 if (ipimask & (1 << IPI_PREEMPT)) {
308 CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__);
309 sched_preempt(curthread);
310 }
311 if (ipimask & (1 << IPI_RENDEZVOUS)) {
312 CTR1(KTR_SMP, "%s: IPI_RENDEZVOUS", __func__);
313 smp_rendezvous_action();
314 }
315 if (ipimask & (1 << IPI_STOP)) {
316
317 /*
318 * IPI_STOP_HARD is mapped to IPI_STOP so it is not
319 * necessary to add such case.
320 */
321 CTR1(KTR_SMP, "%s: IPI_STOP or IPI_STOP_HARD (stop)",
322 __func__);
323 cpuid = PCPU_GET(cpuid);
324 savectx(&stoppcbs[cpuid]);
325 CPU_SET_ATOMIC(cpuid, &stopped_cpus);
326 while (!CPU_ISSET(cpuid, &started_cpus))
327 cpu_spinwait();
328 CPU_CLR_ATOMIC(cpuid, &stopped_cpus);
329 CPU_CLR_ATOMIC(cpuid, &started_cpus);
330 CTR1(KTR_SMP, "%s: IPI_STOP (restart)", __func__);
331 }
332 if (ipimask & (1 << IPI_HARDCLOCK)) {
333 CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__);
334 hardclockintr();
335 }
336
337 return (FILTER_HANDLED);
338 }
339
340 static void
ipi_send(struct pcpu * pc,int ipi)341 ipi_send(struct pcpu *pc, int ipi)
342 {
343
344 CTR4(KTR_SMP, "%s: pc=%p, targetcpu=%d, IPI=%d", __func__,
345 pc, pc->pc_cpuid, ipi);
346
347 atomic_set_32(&pc->pc_ipimask, (1 << ipi));
348 powerpc_sync();
349 PIC_IPI(root_pic, pc->pc_cpuid);
350
351 CTR1(KTR_SMP, "%s: sent", __func__);
352 }
353
354 /* Send an IPI to a set of cpus. */
355 void
ipi_selected(cpuset_t cpus,int ipi)356 ipi_selected(cpuset_t cpus, int ipi)
357 {
358 struct pcpu *pc;
359
360 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) {
361 if (CPU_ISSET(pc->pc_cpuid, &cpus))
362 ipi_send(pc, ipi);
363 }
364 }
365
366 /* Send an IPI to a specific CPU. */
367 void
ipi_cpu(int cpu,u_int ipi)368 ipi_cpu(int cpu, u_int ipi)
369 {
370
371 ipi_send(cpuid_to_pcpu[cpu], ipi);
372 }
373
374 /* Send an IPI to all CPUs EXCEPT myself. */
375 void
ipi_all_but_self(int ipi)376 ipi_all_but_self(int ipi)
377 {
378 struct pcpu *pc;
379
380 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) {
381 if (pc != pcpup)
382 ipi_send(pc, ipi);
383 }
384 }
385