1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2008 Marcel Moolenaar 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/ktr.h> 36 #include <sys/bus.h> 37 #include <sys/cpuset.h> 38 #include <sys/lock.h> 39 #include <sys/malloc.h> 40 #include <sys/mutex.h> 41 #include <sys/pcpu.h> 42 #include <sys/proc.h> 43 #include <sys/sched.h> 44 #include <sys/smp.h> 45 46 #include <vm/vm.h> 47 #include <vm/vm_param.h> 48 #include <vm/pmap.h> 49 #include <vm/vm_map.h> 50 #include <vm/vm_extern.h> 51 #include <vm/vm_kern.h> 52 53 #include <machine/bus.h> 54 #include <machine/cpu.h> 55 #include <machine/intr_machdep.h> 56 #include <machine/pcb.h> 57 #include <machine/platform.h> 58 #include <machine/md_var.h> 59 #include <machine/setjmp.h> 60 #include <machine/smp.h> 61 62 #include "pic_if.h" 63 64 extern struct pcpu __pcpu[MAXCPU]; 65 66 volatile static int ap_awake; 67 volatile static u_int ap_letgo; 68 volatile static u_quad_t ap_timebase; 69 static u_int ipi_msg_cnt[32]; 70 static struct mtx ap_boot_mtx; 71 struct pcb stoppcbs[MAXCPU]; 72 73 void 74 machdep_ap_bootstrap(void) 75 { 76 77 /* Set PIR */ 78 PCPU_SET(pir, mfspr(SPR_PIR)); 79 PCPU_SET(awake, 1); 80 __asm __volatile("msync; isync"); 81 82 while (ap_letgo == 0) 83 __asm __volatile("or 27,27,27"); 84 __asm __volatile("or 6,6,6"); 85 86 /* Initialize DEC and TB, sync with the BSP values */ 87 platform_smp_timebase_sync(ap_timebase, 1); 88 decr_ap_init(); 89 90 /* Give platform code a chance to do anything necessary */ 91 platform_smp_ap_init(); 92 93 /* Serialize console output and AP count increment */ 94 mtx_lock_spin(&ap_boot_mtx); 95 ap_awake++; 96 printf("SMP: AP CPU #%d launched\n", PCPU_GET(cpuid)); 97 mtx_unlock_spin(&ap_boot_mtx); 98 99 /* Start per-CPU event timers. */ 100 cpu_initclocks_ap(); 101 102 /* Announce ourselves awake, and enter the scheduler */ 103 sched_throw(NULL); 104 } 105 106 void 107 cpu_mp_setmaxid(void) 108 { 109 struct cpuref cpuref; 110 int error; 111 112 mp_ncpus = 0; 113 mp_maxid = 0; 114 error = platform_smp_first_cpu(&cpuref); 115 while (!error) { 116 mp_ncpus++; 117 mp_maxid = max(cpuref.cr_cpuid, mp_maxid); 118 error = platform_smp_next_cpu(&cpuref); 119 } 120 /* Sanity. */ 121 if (mp_ncpus == 0) 122 mp_ncpus = 1; 123 } 124 125 int 126 cpu_mp_probe(void) 127 { 128 129 /* 130 * We're not going to enable SMP if there's only 1 processor. 131 */ 132 return (mp_ncpus > 1); 133 } 134 135 void 136 cpu_mp_start(void) 137 { 138 struct cpuref bsp, cpu; 139 struct pcpu *pc; 140 int error; 141 142 error = platform_smp_get_bsp(&bsp); 143 KASSERT(error == 0, ("Don't know BSP")); 144 145 error = platform_smp_first_cpu(&cpu); 146 while (!error) { 147 if (cpu.cr_cpuid >= MAXCPU) { 148 printf("SMP: cpu%d: skipped -- ID out of range\n", 149 cpu.cr_cpuid); 150 goto next; 151 } 152 if (CPU_ISSET(cpu.cr_cpuid, &all_cpus)) { 153 printf("SMP: cpu%d: skipped - duplicate ID\n", 154 cpu.cr_cpuid); 155 goto next; 156 } 157 if (cpu.cr_cpuid != bsp.cr_cpuid) { 158 void *dpcpu; 159 160 pc = &__pcpu[cpu.cr_cpuid]; 161 dpcpu = (void *)kmem_malloc(kernel_arena, DPCPU_SIZE, 162 M_WAITOK | M_ZERO); 163 pcpu_init(pc, cpu.cr_cpuid, sizeof(*pc)); 164 dpcpu_init(dpcpu, cpu.cr_cpuid); 165 } else { 166 pc = pcpup; 167 pc->pc_cpuid = bsp.cr_cpuid; 168 pc->pc_bsp = 1; 169 } 170 pc->pc_hwref = cpu.cr_hwref; 171 CPU_SET(pc->pc_cpuid, &all_cpus); 172 next: 173 error = platform_smp_next_cpu(&cpu); 174 } 175 } 176 177 void 178 cpu_mp_announce(void) 179 { 180 struct pcpu *pc; 181 int i; 182 183 if (!bootverbose) 184 return; 185 186 CPU_FOREACH(i) { 187 pc = pcpu_find(i); 188 if (pc == NULL) 189 continue; 190 printf("cpu%d: dev=%x", i, (int)pc->pc_hwref); 191 if (pc->pc_bsp) 192 printf(" (BSP)"); 193 printf("\n"); 194 } 195 } 196 197 static void 198 cpu_mp_unleash(void *dummy) 199 { 200 struct pcpu *pc; 201 int cpus, timeout; 202 203 if (mp_ncpus <= 1) 204 return; 205 206 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN); 207 208 cpus = 0; 209 smp_cpus = 0; 210 #ifdef BOOKE 211 tlb1_ap_prep(); 212 #endif 213 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { 214 cpus++; 215 if (!pc->pc_bsp) { 216 if (bootverbose) 217 printf("Waking up CPU %d (dev=%x)\n", 218 pc->pc_cpuid, (int)pc->pc_hwref); 219 220 platform_smp_start_cpu(pc); 221 222 timeout = 2000; /* wait 2sec for the AP */ 223 while (!pc->pc_awake && --timeout > 0) 224 DELAY(1000); 225 226 } else { 227 PCPU_SET(pir, mfspr(SPR_PIR)); 228 pc->pc_awake = 1; 229 } 230 if (pc->pc_awake) { 231 if (bootverbose) 232 printf("Adding CPU %d, pir=%x, awake=%x\n", 233 pc->pc_cpuid, pc->pc_pir, pc->pc_awake); 234 smp_cpus++; 235 } else 236 CPU_SET(pc->pc_cpuid, &stopped_cpus); 237 } 238 239 ap_awake = 1; 240 241 /* Provide our current DEC and TB values for APs */ 242 ap_timebase = mftb() + 10; 243 __asm __volatile("msync; isync"); 244 245 /* Let APs continue */ 246 atomic_store_rel_int(&ap_letgo, 1); 247 248 platform_smp_timebase_sync(ap_timebase, 0); 249 250 while (ap_awake < smp_cpus) 251 ; 252 253 if (smp_cpus != cpus || cpus != mp_ncpus) { 254 printf("SMP: %d CPUs found; %d CPUs usable; %d CPUs woken\n", 255 mp_ncpus, cpus, smp_cpus); 256 } 257 258 /* Let the APs get into the scheduler */ 259 DELAY(10000); 260 261 /* XXX Atomic set operation? */ 262 smp_started = 1; 263 } 264 265 SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, cpu_mp_unleash, NULL); 266 267 int 268 powerpc_ipi_handler(void *arg) 269 { 270 u_int cpuid; 271 uint32_t ipimask; 272 int msg; 273 274 CTR2(KTR_SMP, "%s: MSR 0x%08x", __func__, mfmsr()); 275 276 ipimask = atomic_readandclear_32(&(pcpup->pc_ipimask)); 277 if (ipimask == 0) 278 return (FILTER_STRAY); 279 while ((msg = ffs(ipimask) - 1) != -1) { 280 ipimask &= ~(1u << msg); 281 ipi_msg_cnt[msg]++; 282 switch (msg) { 283 case IPI_AST: 284 CTR1(KTR_SMP, "%s: IPI_AST", __func__); 285 break; 286 case IPI_PREEMPT: 287 CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__); 288 sched_preempt(curthread); 289 break; 290 case IPI_RENDEZVOUS: 291 CTR1(KTR_SMP, "%s: IPI_RENDEZVOUS", __func__); 292 smp_rendezvous_action(); 293 break; 294 case IPI_STOP: 295 296 /* 297 * IPI_STOP_HARD is mapped to IPI_STOP so it is not 298 * necessary to add such case in the switch. 299 */ 300 CTR1(KTR_SMP, "%s: IPI_STOP or IPI_STOP_HARD (stop)", 301 __func__); 302 cpuid = PCPU_GET(cpuid); 303 savectx(&stoppcbs[cpuid]); 304 savectx(PCPU_GET(curpcb)); 305 CPU_SET_ATOMIC(cpuid, &stopped_cpus); 306 while (!CPU_ISSET(cpuid, &started_cpus)) 307 cpu_spinwait(); 308 CPU_CLR_ATOMIC(cpuid, &stopped_cpus); 309 CPU_CLR_ATOMIC(cpuid, &started_cpus); 310 CTR1(KTR_SMP, "%s: IPI_STOP (restart)", __func__); 311 break; 312 case IPI_HARDCLOCK: 313 CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__); 314 hardclockintr(); 315 break; 316 } 317 } 318 319 return (FILTER_HANDLED); 320 } 321 322 static void 323 ipi_send(struct pcpu *pc, int ipi) 324 { 325 326 CTR4(KTR_SMP, "%s: pc=%p, targetcpu=%d, IPI=%d", __func__, 327 pc, pc->pc_cpuid, ipi); 328 329 atomic_set_32(&pc->pc_ipimask, (1 << ipi)); 330 powerpc_sync(); 331 PIC_IPI(root_pic, pc->pc_cpuid); 332 333 CTR1(KTR_SMP, "%s: sent", __func__); 334 } 335 336 /* Send an IPI to a set of cpus. */ 337 void 338 ipi_selected(cpuset_t cpus, int ipi) 339 { 340 struct pcpu *pc; 341 342 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { 343 if (CPU_ISSET(pc->pc_cpuid, &cpus)) 344 ipi_send(pc, ipi); 345 } 346 } 347 348 /* Send an IPI to a specific CPU. */ 349 void 350 ipi_cpu(int cpu, u_int ipi) 351 { 352 353 ipi_send(cpuid_to_pcpu[cpu], ipi); 354 } 355 356 /* Send an IPI to all CPUs EXCEPT myself. */ 357 void 358 ipi_all_but_self(int ipi) 359 { 360 struct pcpu *pc; 361 362 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { 363 if (pc != pcpup) 364 ipi_send(pc, ipi); 365 } 366 } 367