1 /*- 2 * Copyright (c) 2008 Marcel Moolenaar 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/kernel.h> 33 #include <sys/ktr.h> 34 #include <sys/bus.h> 35 #include <sys/lock.h> 36 #include <sys/mutex.h> 37 #include <sys/pcpu.h> 38 #include <sys/proc.h> 39 #include <sys/sched.h> 40 #include <sys/smp.h> 41 42 #include <vm/vm.h> 43 #include <vm/vm_param.h> 44 #include <vm/pmap.h> 45 #include <vm/vm_map.h> 46 #include <vm/vm_extern.h> 47 #include <vm/vm_kern.h> 48 49 #include <machine/bus.h> 50 #include <machine/cpu.h> 51 #include <machine/intr_machdep.h> 52 #include <machine/pcb.h> 53 #include <machine/platform.h> 54 #include <machine/md_var.h> 55 #include <machine/smp.h> 56 57 #include "pic_if.h" 58 59 extern struct pcpu __pcpu[MAXCPU]; 60 61 volatile static int ap_awake; 62 volatile static u_int ap_letgo; 63 volatile static u_quad_t ap_timebase; 64 static u_int ipi_msg_cnt[32]; 65 static struct mtx ap_boot_mtx; 66 struct pcb stoppcbs[MAXCPU]; 67 68 void 69 machdep_ap_bootstrap(void) 70 { 71 /* Set up important bits on the CPU (HID registers, etc.) */ 72 cpudep_ap_setup(); 73 74 /* Set PIR */ 75 PCPU_SET(pir, mfspr(SPR_PIR)); 76 PCPU_SET(awake, 1); 77 __asm __volatile("msync; isync"); 78 79 while (ap_letgo == 0) 80 ; 81 82 /* Initialize DEC and TB, sync with the BSP values */ 83 #ifdef __powerpc64__ 84 /* Writing to the time base register is hypervisor-privileged */ 85 if (mfmsr() & PSL_HV) 86 mttb(ap_timebase); 87 #else 88 mttb(ap_timebase); 89 #endif 90 decr_ap_init(); 91 92 /* Serialize console output and AP count increment */ 93 mtx_lock_spin(&ap_boot_mtx); 94 ap_awake++; 95 printf("SMP: AP CPU #%d launched\n", PCPU_GET(cpuid)); 96 mtx_unlock_spin(&ap_boot_mtx); 97 98 /* Initialize curthread */ 99 PCPU_SET(curthread, PCPU_GET(idlethread)); 100 PCPU_SET(curpcb, curthread->td_pcb); 101 102 /* Start per-CPU event timers. */ 103 cpu_initclocks_ap(); 104 105 /* Announce ourselves awake, and enter the scheduler */ 106 sched_throw(NULL); 107 } 108 109 void 110 cpu_mp_setmaxid(void) 111 { 112 struct cpuref cpuref; 113 int error; 114 115 mp_ncpus = 0; 116 error = platform_smp_first_cpu(&cpuref); 117 while (!error) { 118 mp_ncpus++; 119 error = platform_smp_next_cpu(&cpuref); 120 } 121 /* Sanity. */ 122 if (mp_ncpus == 0) 123 mp_ncpus = 1; 124 125 /* 126 * Set the largest cpuid we're going to use. This is necessary 127 * for VM initialization. 128 */ 129 mp_maxid = min(mp_ncpus, MAXCPU) - 1; 130 } 131 132 int 133 cpu_mp_probe(void) 134 { 135 136 /* 137 * We're not going to enable SMP if there's only 1 processor. 138 */ 139 return (mp_ncpus > 1); 140 } 141 142 void 143 cpu_mp_start(void) 144 { 145 struct cpuref bsp, cpu; 146 struct pcpu *pc; 147 int error; 148 149 error = platform_smp_get_bsp(&bsp); 150 KASSERT(error == 0, ("Don't know BSP")); 151 KASSERT(bsp.cr_cpuid == 0, ("%s: cpuid != 0", __func__)); 152 153 error = platform_smp_first_cpu(&cpu); 154 while (!error) { 155 if (cpu.cr_cpuid >= MAXCPU) { 156 printf("SMP: cpu%d: skipped -- ID out of range\n", 157 cpu.cr_cpuid); 158 goto next; 159 } 160 if (all_cpus & (1 << cpu.cr_cpuid)) { 161 printf("SMP: cpu%d: skipped - duplicate ID\n", 162 cpu.cr_cpuid); 163 goto next; 164 } 165 if (cpu.cr_cpuid != bsp.cr_cpuid) { 166 void *dpcpu; 167 168 pc = &__pcpu[cpu.cr_cpuid]; 169 dpcpu = (void *)kmem_alloc(kernel_map, DPCPU_SIZE); 170 pcpu_init(pc, cpu.cr_cpuid, sizeof(*pc)); 171 dpcpu_init(dpcpu, cpu.cr_cpuid); 172 } else { 173 pc = pcpup; 174 pc->pc_cpuid = bsp.cr_cpuid; 175 pc->pc_bsp = 1; 176 } 177 pc->pc_cpumask = 1 << pc->pc_cpuid; 178 pc->pc_hwref = cpu.cr_hwref; 179 all_cpus |= pc->pc_cpumask; 180 next: 181 error = platform_smp_next_cpu(&cpu); 182 } 183 } 184 185 void 186 cpu_mp_announce(void) 187 { 188 struct pcpu *pc; 189 int i; 190 191 for (i = 0; i <= mp_maxid; i++) { 192 pc = pcpu_find(i); 193 if (pc == NULL) 194 continue; 195 printf("cpu%d: dev=%x", i, (int)pc->pc_hwref); 196 if (pc->pc_bsp) 197 printf(" (BSP)"); 198 printf("\n"); 199 } 200 } 201 202 static void 203 cpu_mp_unleash(void *dummy) 204 { 205 struct pcpu *pc; 206 int cpus, timeout; 207 208 if (mp_ncpus <= 1) 209 return; 210 211 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN); 212 213 cpus = 0; 214 smp_cpus = 0; 215 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { 216 cpus++; 217 pc->pc_other_cpus = all_cpus & ~pc->pc_cpumask; 218 if (!pc->pc_bsp) { 219 if (bootverbose) 220 printf("Waking up CPU %d (dev=%x)\n", 221 pc->pc_cpuid, (int)pc->pc_hwref); 222 223 platform_smp_start_cpu(pc); 224 225 timeout = 2000; /* wait 2sec for the AP */ 226 while (!pc->pc_awake && --timeout > 0) 227 DELAY(1000); 228 229 } else { 230 PCPU_SET(pir, mfspr(SPR_PIR)); 231 pc->pc_awake = 1; 232 } 233 if (pc->pc_awake) { 234 if (bootverbose) 235 printf("Adding CPU %d, pir=%x, awake=%x\n", 236 pc->pc_cpuid, pc->pc_pir, pc->pc_awake); 237 smp_cpus++; 238 } else 239 stopped_cpus |= (1 << pc->pc_cpuid); 240 } 241 242 ap_awake = 1; 243 244 /* Provide our current DEC and TB values for APs */ 245 ap_timebase = mftb() + 10; 246 __asm __volatile("msync; isync"); 247 248 /* Let APs continue */ 249 atomic_store_rel_int(&ap_letgo, 1); 250 251 #ifdef __powerpc64__ 252 /* Writing to the time base register is hypervisor-privileged */ 253 if (mfmsr() & PSL_HV) 254 mttb(ap_timebase); 255 #else 256 mttb(ap_timebase); 257 #endif 258 259 while (ap_awake < smp_cpus) 260 ; 261 262 if (smp_cpus != cpus || cpus != mp_ncpus) { 263 printf("SMP: %d CPUs found; %d CPUs usable; %d CPUs woken\n", 264 mp_ncpus, cpus, smp_cpus); 265 } 266 267 /* Let the APs get into the scheduler */ 268 DELAY(10000); 269 270 smp_active = 1; 271 smp_started = 1; 272 } 273 274 SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, cpu_mp_unleash, NULL); 275 276 int 277 powerpc_ipi_handler(void *arg) 278 { 279 cpumask_t self; 280 uint32_t ipimask; 281 int msg; 282 283 CTR2(KTR_SMP, "%s: MSR 0x%08x", __func__, mfmsr()); 284 285 ipimask = atomic_readandclear_32(&(pcpup->pc_ipimask)); 286 if (ipimask == 0) 287 return (FILTER_STRAY); 288 while ((msg = ffs(ipimask) - 1) != -1) { 289 ipimask &= ~(1u << msg); 290 ipi_msg_cnt[msg]++; 291 switch (msg) { 292 case IPI_AST: 293 CTR1(KTR_SMP, "%s: IPI_AST", __func__); 294 break; 295 case IPI_PREEMPT: 296 CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__); 297 sched_preempt(curthread); 298 break; 299 case IPI_RENDEZVOUS: 300 CTR1(KTR_SMP, "%s: IPI_RENDEZVOUS", __func__); 301 smp_rendezvous_action(); 302 break; 303 case IPI_STOP: 304 305 /* 306 * IPI_STOP_HARD is mapped to IPI_STOP so it is not 307 * necessary to add such case in the switch. 308 */ 309 CTR1(KTR_SMP, "%s: IPI_STOP or IPI_STOP_HARD (stop)", 310 __func__); 311 savectx(&stoppcbs[PCPU_GET(cpuid)]); 312 self = PCPU_GET(cpumask); 313 savectx(PCPU_GET(curpcb)); 314 atomic_set_int(&stopped_cpus, self); 315 while ((started_cpus & self) == 0) 316 cpu_spinwait(); 317 atomic_clear_int(&started_cpus, self); 318 atomic_clear_int(&stopped_cpus, self); 319 CTR1(KTR_SMP, "%s: IPI_STOP (restart)", __func__); 320 break; 321 case IPI_HARDCLOCK: 322 CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__); 323 hardclockintr(); 324 break; 325 } 326 } 327 328 return (FILTER_HANDLED); 329 } 330 331 static void 332 ipi_send(struct pcpu *pc, int ipi) 333 { 334 335 CTR4(KTR_SMP, "%s: pc=%p, targetcpu=%d, IPI=%d", __func__, 336 pc, pc->pc_cpuid, ipi); 337 338 atomic_set_32(&pc->pc_ipimask, (1 << ipi)); 339 PIC_IPI(root_pic, pc->pc_cpuid); 340 341 CTR1(KTR_SMP, "%s: sent", __func__); 342 } 343 344 /* Send an IPI to a set of cpus. */ 345 void 346 ipi_selected(cpumask_t cpus, int ipi) 347 { 348 struct pcpu *pc; 349 350 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { 351 if (cpus & pc->pc_cpumask) 352 ipi_send(pc, ipi); 353 } 354 } 355 356 /* Send an IPI to a specific CPU. */ 357 void 358 ipi_cpu(int cpu, u_int ipi) 359 { 360 361 ipi_send(cpuid_to_pcpu[cpu], ipi); 362 } 363 364 /* Send an IPI to all CPUs EXCEPT myself. */ 365 void 366 ipi_all_but_self(int ipi) 367 { 368 struct pcpu *pc; 369 370 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { 371 if (pc != pcpup) 372 ipi_send(pc, ipi); 373 } 374 } 375