1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2008 Marcel Moolenaar 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/ktr.h> 36 #include <sys/bus.h> 37 #include <sys/cpuset.h> 38 #include <sys/domainset.h> 39 #include <sys/lock.h> 40 #include <sys/malloc.h> 41 #include <sys/mutex.h> 42 #include <sys/pcpu.h> 43 #include <sys/proc.h> 44 #include <sys/sched.h> 45 #include <sys/smp.h> 46 47 #include <vm/vm.h> 48 #include <vm/vm_param.h> 49 #include <vm/pmap.h> 50 #include <vm/vm_map.h> 51 #include <vm/vm_extern.h> 52 #include <vm/vm_kern.h> 53 54 #include <machine/bus.h> 55 #include <machine/cpu.h> 56 #include <machine/intr_machdep.h> 57 #include <machine/pcb.h> 58 #include <machine/platform.h> 59 #include <machine/md_var.h> 60 #include <machine/setjmp.h> 61 #include <machine/smp.h> 62 63 #include "pic_if.h" 64 65 volatile static int ap_awake; 66 volatile static u_int ap_letgo; 67 volatile static u_quad_t ap_timebase; 68 static struct mtx ap_boot_mtx; 69 70 void 71 machdep_ap_bootstrap(void) 72 { 73 74 PCPU_SET(awake, 1); 75 __asm __volatile("msync; isync"); 76 77 while (ap_letgo == 0) 78 nop_prio_vlow(); 79 nop_prio_medium(); 80 81 /* 82 * Set timebase as soon as possible to meet an implicit rendezvous 83 * from cpu_mp_unleash(), which sets ap_letgo and then immediately 84 * sets timebase. 85 * 86 * Note that this is instrinsically racy and is only relevant on 87 * platforms that do not support better mechanisms. 88 */ 89 platform_smp_timebase_sync(ap_timebase, 1); 90 91 /* Give platform code a chance to do anything else necessary */ 92 platform_smp_ap_init(); 93 94 /* Initialize decrementer */ 95 decr_ap_init(); 96 97 /* Serialize console output and AP count increment */ 98 mtx_lock_spin(&ap_boot_mtx); 99 ap_awake++; 100 if (bootverbose) 101 printf("SMP: AP CPU #%d launched\n", PCPU_GET(cpuid)); 102 else 103 printf("%s%d%s", ap_awake == 2 ? "Launching APs: " : "", 104 PCPU_GET(cpuid), ap_awake == mp_ncpus ? "\n" : " "); 105 mtx_unlock_spin(&ap_boot_mtx); 106 107 while(smp_started == 0) 108 ; 109 110 /* Start per-CPU event timers. */ 111 cpu_initclocks_ap(); 112 113 /* Announce ourselves awake, and enter the scheduler */ 114 sched_ap_entry(); 115 } 116 117 void 118 cpu_mp_setmaxid(void) 119 { 120 struct cpuref cpuref; 121 int error; 122 123 mp_ncpus = 0; 124 mp_maxid = 0; 125 error = platform_smp_first_cpu(&cpuref); 126 while (!error) { 127 mp_ncpus++; 128 mp_maxid = max(cpuref.cr_cpuid, mp_maxid); 129 error = platform_smp_next_cpu(&cpuref); 130 } 131 /* Sanity. */ 132 if (mp_ncpus == 0) 133 mp_ncpus = 1; 134 } 135 136 int 137 cpu_mp_probe(void) 138 { 139 140 /* 141 * We're not going to enable SMP if there's only 1 processor. 142 */ 143 return (mp_ncpus > 1); 144 } 145 146 void 147 cpu_mp_start(void) 148 { 149 struct cpuref bsp, cpu; 150 struct pcpu *pc; 151 int domain, error; 152 153 error = platform_smp_get_bsp(&bsp); 154 KASSERT(error == 0, ("Don't know BSP")); 155 156 error = platform_smp_first_cpu(&cpu); 157 while (!error) { 158 if (cpu.cr_cpuid >= MAXCPU) { 159 printf("SMP: cpu%d: skipped -- ID out of range\n", 160 cpu.cr_cpuid); 161 goto next; 162 } 163 if (CPU_ISSET(cpu.cr_cpuid, &all_cpus)) { 164 printf("SMP: cpu%d: skipped - duplicate ID\n", 165 cpu.cr_cpuid); 166 goto next; 167 } 168 169 if (vm_ndomains > 1) 170 domain = cpu.cr_domain; 171 else 172 domain = 0; 173 174 if (cpu.cr_cpuid != bsp.cr_cpuid) { 175 void *dpcpu; 176 177 pc = &__pcpu[cpu.cr_cpuid]; 178 dpcpu = kmem_malloc_domainset(DOMAINSET_PREF(domain), 179 DPCPU_SIZE, M_WAITOK | M_ZERO); 180 pcpu_init(pc, cpu.cr_cpuid, sizeof(*pc)); 181 dpcpu_init(dpcpu, cpu.cr_cpuid); 182 } else { 183 pc = pcpup; 184 pc->pc_cpuid = bsp.cr_cpuid; 185 pc->pc_bsp = 1; 186 } 187 pc->pc_domain = domain; 188 pc->pc_hwref = cpu.cr_hwref; 189 190 CPU_SET(pc->pc_cpuid, &cpuset_domain[pc->pc_domain]); 191 KASSERT(pc->pc_domain < MAXMEMDOM, ("bad domain value %d\n", 192 pc->pc_domain)); 193 CPU_SET(pc->pc_cpuid, &all_cpus); 194 next: 195 error = platform_smp_next_cpu(&cpu); 196 } 197 198 #ifdef SMP 199 platform_smp_probe_threads(); 200 #endif 201 } 202 203 void 204 cpu_mp_announce(void) 205 { 206 struct pcpu *pc; 207 int i; 208 209 if (!bootverbose) 210 return; 211 212 CPU_FOREACH(i) { 213 pc = pcpu_find(i); 214 if (pc == NULL) 215 continue; 216 printf("cpu%d: dev=%x domain=%d ", i, (int)pc->pc_hwref, pc->pc_domain); 217 if (pc->pc_bsp) 218 printf(" (BSP)"); 219 printf("\n"); 220 } 221 } 222 223 static void 224 cpu_mp_unleash(void *dummy) 225 { 226 struct pcpu *pc; 227 int cpus, timeout; 228 int ret; 229 230 if (mp_ncpus <= 1) 231 return; 232 233 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN); 234 235 cpus = 0; 236 smp_cpus = 0; 237 #ifdef BOOKE 238 tlb1_ap_prep(); 239 #endif 240 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { 241 cpus++; 242 if (!pc->pc_bsp) { 243 if (bootverbose) 244 printf("Waking up CPU %d (dev=%x)\n", 245 pc->pc_cpuid, (int)pc->pc_hwref); 246 247 pc->pc_flags = PCPU_GET(flags); /* Copy cached CPU flags */ 248 ret = platform_smp_start_cpu(pc); 249 if (ret == 0) { 250 timeout = 2000; /* wait 2sec for the AP */ 251 while (!pc->pc_awake && --timeout > 0) 252 DELAY(1000); 253 } 254 } else { 255 pc->pc_awake = 1; 256 } 257 if (pc->pc_awake) { 258 if (bootverbose) 259 printf("Adding CPU %d, hwref=%jx, awake=%x\n", 260 pc->pc_cpuid, (uintmax_t)pc->pc_hwref, 261 pc->pc_awake); 262 smp_cpus++; 263 } else 264 CPU_SET(pc->pc_cpuid, &stopped_cpus); 265 } 266 267 ap_awake = 1; 268 269 /* Provide our current DEC and TB values for APs */ 270 ap_timebase = mftb() + 10; 271 __asm __volatile("msync; isync"); 272 273 /* Let APs continue */ 274 atomic_store_rel_int(&ap_letgo, 1); 275 276 platform_smp_timebase_sync(ap_timebase, 0); 277 278 while (ap_awake < smp_cpus) 279 ; 280 281 if (smp_cpus != cpus || cpus != mp_ncpus) { 282 printf("SMP: %d CPUs found; %d CPUs usable; %d CPUs woken\n", 283 mp_ncpus, cpus, smp_cpus); 284 } 285 286 if (smp_cpus > 1) 287 atomic_store_rel_int(&smp_started, 1); 288 289 /* Let the APs get into the scheduler */ 290 DELAY(10000); 291 292 } 293 294 SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, cpu_mp_unleash, NULL); 295 296 int 297 powerpc_ipi_handler(void *arg) 298 { 299 u_int cpuid; 300 uint32_t ipimask; 301 302 CTR2(KTR_SMP, "%s: MSR 0x%08x", __func__, mfmsr()); 303 304 ipimask = atomic_readandclear_32(&(pcpup->pc_ipimask)); 305 if (ipimask == 0) 306 return (FILTER_STRAY); 307 if (ipimask & (1 << IPI_AST)) { 308 CTR1(KTR_SMP, "%s: IPI_AST", __func__); 309 } 310 if (ipimask & (1 << IPI_PREEMPT)) { 311 CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__); 312 sched_preempt(curthread); 313 } 314 if (ipimask & (1 << IPI_RENDEZVOUS)) { 315 CTR1(KTR_SMP, "%s: IPI_RENDEZVOUS", __func__); 316 smp_rendezvous_action(); 317 } 318 if (ipimask & (1 << IPI_STOP)) { 319 320 /* 321 * IPI_STOP_HARD is mapped to IPI_STOP so it is not 322 * necessary to add such case. 323 */ 324 CTR1(KTR_SMP, "%s: IPI_STOP or IPI_STOP_HARD (stop)", 325 __func__); 326 cpuid = PCPU_GET(cpuid); 327 savectx(&stoppcbs[cpuid]); 328 CPU_SET_ATOMIC(cpuid, &stopped_cpus); 329 while (!CPU_ISSET(cpuid, &started_cpus)) 330 cpu_spinwait(); 331 CPU_CLR_ATOMIC(cpuid, &stopped_cpus); 332 CPU_CLR_ATOMIC(cpuid, &started_cpus); 333 CTR1(KTR_SMP, "%s: IPI_STOP (restart)", __func__); 334 } 335 if (ipimask & (1 << IPI_HARDCLOCK)) { 336 CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__); 337 hardclockintr(); 338 } 339 340 return (FILTER_HANDLED); 341 } 342 343 static void 344 ipi_send(struct pcpu *pc, int ipi) 345 { 346 347 CTR4(KTR_SMP, "%s: pc=%p, targetcpu=%d, IPI=%d", __func__, 348 pc, pc->pc_cpuid, ipi); 349 350 atomic_set_32(&pc->pc_ipimask, (1 << ipi)); 351 powerpc_sync(); 352 PIC_IPI(root_pic, pc->pc_cpuid); 353 354 CTR1(KTR_SMP, "%s: sent", __func__); 355 } 356 357 /* Send an IPI to a set of cpus. */ 358 void 359 ipi_selected(cpuset_t cpus, int ipi) 360 { 361 struct pcpu *pc; 362 363 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { 364 if (CPU_ISSET(pc->pc_cpuid, &cpus)) 365 ipi_send(pc, ipi); 366 } 367 } 368 369 /* Send an IPI to a specific CPU. */ 370 void 371 ipi_cpu(int cpu, u_int ipi) 372 { 373 374 ipi_send(cpuid_to_pcpu[cpu], ipi); 375 } 376 377 /* Send an IPI to all CPUs EXCEPT myself. */ 378 void 379 ipi_all_but_self(int ipi) 380 { 381 struct pcpu *pc; 382 383 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { 384 if (pc != pcpup) 385 ipi_send(pc, ipi); 386 } 387 } 388