1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2008 Marcel Moolenaar 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/ktr.h> 36 #include <sys/bus.h> 37 #include <sys/cpuset.h> 38 #include <sys/lock.h> 39 #include <sys/malloc.h> 40 #include <sys/mutex.h> 41 #include <sys/pcpu.h> 42 #include <sys/proc.h> 43 #include <sys/sched.h> 44 #include <sys/smp.h> 45 46 #include <vm/vm.h> 47 #include <vm/vm_param.h> 48 #include <vm/pmap.h> 49 #include <vm/vm_map.h> 50 #include <vm/vm_extern.h> 51 #include <vm/vm_kern.h> 52 53 #include <machine/bus.h> 54 #include <machine/cpu.h> 55 #include <machine/intr_machdep.h> 56 #include <machine/pcb.h> 57 #include <machine/platform.h> 58 #include <machine/md_var.h> 59 #include <machine/setjmp.h> 60 #include <machine/smp.h> 61 62 #include "pic_if.h" 63 64 extern struct pcpu __pcpu[MAXCPU]; 65 66 volatile static int ap_awake; 67 volatile static u_int ap_letgo; 68 volatile static u_quad_t ap_timebase; 69 static u_int ipi_msg_cnt[32]; 70 static struct mtx ap_boot_mtx; 71 struct pcb stoppcbs[MAXCPU]; 72 73 void 74 machdep_ap_bootstrap(void) 75 { 76 77 PCPU_SET(awake, 1); 78 __asm __volatile("msync; isync"); 79 80 while (ap_letgo == 0) 81 nop_prio_vlow(); 82 nop_prio_medium(); 83 84 /* 85 * Set timebase as soon as possible to meet an implicit rendezvous 86 * from cpu_mp_unleash(), which sets ap_letgo and then immediately 87 * sets timebase. 88 * 89 * Note that this is instrinsically racy and is only relevant on 90 * platforms that do not support better mechanisms. 91 */ 92 platform_smp_timebase_sync(ap_timebase, 1); 93 94 /* Give platform code a chance to do anything else necessary */ 95 platform_smp_ap_init(); 96 97 /* Initialize decrementer */ 98 decr_ap_init(); 99 100 /* Serialize console output and AP count increment */ 101 mtx_lock_spin(&ap_boot_mtx); 102 ap_awake++; 103 if (bootverbose) 104 printf("SMP: AP CPU #%d launched\n", PCPU_GET(cpuid)); 105 else 106 printf("%s%d%s", ap_awake == 2 ? "Launching APs: " : "", 107 PCPU_GET(cpuid), ap_awake == mp_ncpus ? "\n" : " "); 108 mtx_unlock_spin(&ap_boot_mtx); 109 110 while(smp_started == 0) 111 ; 112 113 /* Start per-CPU event timers. */ 114 cpu_initclocks_ap(); 115 116 /* Announce ourselves awake, and enter the scheduler */ 117 sched_throw(NULL); 118 } 119 120 void 121 cpu_mp_setmaxid(void) 122 { 123 struct cpuref cpuref; 124 int error; 125 126 mp_ncpus = 0; 127 mp_maxid = 0; 128 error = platform_smp_first_cpu(&cpuref); 129 while (!error) { 130 mp_ncpus++; 131 mp_maxid = max(cpuref.cr_cpuid, mp_maxid); 132 error = platform_smp_next_cpu(&cpuref); 133 } 134 /* Sanity. */ 135 if (mp_ncpus == 0) 136 mp_ncpus = 1; 137 } 138 139 int 140 cpu_mp_probe(void) 141 { 142 143 /* 144 * We're not going to enable SMP if there's only 1 processor. 145 */ 146 return (mp_ncpus > 1); 147 } 148 149 void 150 cpu_mp_start(void) 151 { 152 struct cpuref bsp, cpu; 153 struct pcpu *pc; 154 int error; 155 156 error = platform_smp_get_bsp(&bsp); 157 KASSERT(error == 0, ("Don't know BSP")); 158 159 error = platform_smp_first_cpu(&cpu); 160 while (!error) { 161 if (cpu.cr_cpuid >= MAXCPU) { 162 printf("SMP: cpu%d: skipped -- ID out of range\n", 163 cpu.cr_cpuid); 164 goto next; 165 } 166 if (CPU_ISSET(cpu.cr_cpuid, &all_cpus)) { 167 printf("SMP: cpu%d: skipped - duplicate ID\n", 168 cpu.cr_cpuid); 169 goto next; 170 } 171 if (cpu.cr_cpuid != bsp.cr_cpuid) { 172 void *dpcpu; 173 174 pc = &__pcpu[cpu.cr_cpuid]; 175 dpcpu = (void *)kmem_malloc(DPCPU_SIZE, M_WAITOK | 176 M_ZERO); 177 pcpu_init(pc, cpu.cr_cpuid, sizeof(*pc)); 178 dpcpu_init(dpcpu, cpu.cr_cpuid); 179 } else { 180 pc = pcpup; 181 pc->pc_cpuid = bsp.cr_cpuid; 182 pc->pc_bsp = 1; 183 } 184 pc->pc_hwref = cpu.cr_hwref; 185 186 if (vm_ndomains > 1) 187 pc->pc_domain = cpu.cr_domain; 188 else 189 pc->pc_domain = 0; 190 191 CPU_SET(pc->pc_cpuid, &cpuset_domain[pc->pc_domain]); 192 KASSERT(pc->pc_domain < MAXMEMDOM, ("bad domain value %d\n", 193 pc->pc_domain)); 194 CPU_SET(pc->pc_cpuid, &all_cpus); 195 next: 196 error = platform_smp_next_cpu(&cpu); 197 } 198 199 #ifdef SMP 200 platform_smp_probe_threads(); 201 #endif 202 } 203 204 void 205 cpu_mp_announce(void) 206 { 207 struct pcpu *pc; 208 int i; 209 210 if (!bootverbose) 211 return; 212 213 CPU_FOREACH(i) { 214 pc = pcpu_find(i); 215 if (pc == NULL) 216 continue; 217 printf("cpu%d: dev=%x domain=%d ", i, (int)pc->pc_hwref, pc->pc_domain); 218 if (pc->pc_bsp) 219 printf(" (BSP)"); 220 printf("\n"); 221 } 222 } 223 224 static void 225 cpu_mp_unleash(void *dummy) 226 { 227 struct pcpu *pc; 228 int cpus, timeout; 229 int ret; 230 231 if (mp_ncpus <= 1) 232 return; 233 234 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN); 235 236 cpus = 0; 237 smp_cpus = 0; 238 #ifdef BOOKE 239 tlb1_ap_prep(); 240 #endif 241 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { 242 cpus++; 243 if (!pc->pc_bsp) { 244 if (bootverbose) 245 printf("Waking up CPU %d (dev=%x)\n", 246 pc->pc_cpuid, (int)pc->pc_hwref); 247 248 ret = platform_smp_start_cpu(pc); 249 if (ret == 0) { 250 timeout = 2000; /* wait 2sec for the AP */ 251 while (!pc->pc_awake && --timeout > 0) 252 DELAY(1000); 253 } 254 } else { 255 pc->pc_awake = 1; 256 } 257 if (pc->pc_awake) { 258 if (bootverbose) 259 printf("Adding CPU %d, hwref=%jx, awake=%x\n", 260 pc->pc_cpuid, (uintmax_t)pc->pc_hwref, 261 pc->pc_awake); 262 smp_cpus++; 263 } else 264 CPU_SET(pc->pc_cpuid, &stopped_cpus); 265 } 266 267 ap_awake = 1; 268 269 /* Provide our current DEC and TB values for APs */ 270 ap_timebase = mftb() + 10; 271 __asm __volatile("msync; isync"); 272 273 /* Let APs continue */ 274 atomic_store_rel_int(&ap_letgo, 1); 275 276 platform_smp_timebase_sync(ap_timebase, 0); 277 278 while (ap_awake < smp_cpus) 279 ; 280 281 if (smp_cpus != cpus || cpus != mp_ncpus) { 282 printf("SMP: %d CPUs found; %d CPUs usable; %d CPUs woken\n", 283 mp_ncpus, cpus, smp_cpus); 284 } 285 286 if (smp_cpus > 1) 287 atomic_store_rel_int(&smp_started, 1); 288 289 /* Let the APs get into the scheduler */ 290 DELAY(10000); 291 292 } 293 294 SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, cpu_mp_unleash, NULL); 295 296 int 297 powerpc_ipi_handler(void *arg) 298 { 299 u_int cpuid; 300 uint32_t ipimask; 301 int msg; 302 303 CTR2(KTR_SMP, "%s: MSR 0x%08x", __func__, mfmsr()); 304 305 ipimask = atomic_readandclear_32(&(pcpup->pc_ipimask)); 306 if (ipimask == 0) 307 return (FILTER_STRAY); 308 while ((msg = ffs(ipimask) - 1) != -1) { 309 ipimask &= ~(1u << msg); 310 ipi_msg_cnt[msg]++; 311 switch (msg) { 312 case IPI_AST: 313 CTR1(KTR_SMP, "%s: IPI_AST", __func__); 314 break; 315 case IPI_PREEMPT: 316 CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__); 317 sched_preempt(curthread); 318 break; 319 case IPI_RENDEZVOUS: 320 CTR1(KTR_SMP, "%s: IPI_RENDEZVOUS", __func__); 321 smp_rendezvous_action(); 322 break; 323 case IPI_STOP: 324 325 /* 326 * IPI_STOP_HARD is mapped to IPI_STOP so it is not 327 * necessary to add such case in the switch. 328 */ 329 CTR1(KTR_SMP, "%s: IPI_STOP or IPI_STOP_HARD (stop)", 330 __func__); 331 cpuid = PCPU_GET(cpuid); 332 savectx(&stoppcbs[cpuid]); 333 savectx(PCPU_GET(curpcb)); 334 CPU_SET_ATOMIC(cpuid, &stopped_cpus); 335 while (!CPU_ISSET(cpuid, &started_cpus)) 336 cpu_spinwait(); 337 CPU_CLR_ATOMIC(cpuid, &stopped_cpus); 338 CPU_CLR_ATOMIC(cpuid, &started_cpus); 339 CTR1(KTR_SMP, "%s: IPI_STOP (restart)", __func__); 340 break; 341 case IPI_HARDCLOCK: 342 CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__); 343 hardclockintr(); 344 break; 345 } 346 } 347 348 return (FILTER_HANDLED); 349 } 350 351 static void 352 ipi_send(struct pcpu *pc, int ipi) 353 { 354 355 CTR4(KTR_SMP, "%s: pc=%p, targetcpu=%d, IPI=%d", __func__, 356 pc, pc->pc_cpuid, ipi); 357 358 atomic_set_32(&pc->pc_ipimask, (1 << ipi)); 359 powerpc_sync(); 360 PIC_IPI(root_pic, pc->pc_cpuid); 361 362 CTR1(KTR_SMP, "%s: sent", __func__); 363 } 364 365 /* Send an IPI to a set of cpus. */ 366 void 367 ipi_selected(cpuset_t cpus, int ipi) 368 { 369 struct pcpu *pc; 370 371 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { 372 if (CPU_ISSET(pc->pc_cpuid, &cpus)) 373 ipi_send(pc, ipi); 374 } 375 } 376 377 /* Send an IPI to a specific CPU. */ 378 void 379 ipi_cpu(int cpu, u_int ipi) 380 { 381 382 ipi_send(cpuid_to_pcpu[cpu], ipi); 383 } 384 385 /* Send an IPI to all CPUs EXCEPT myself. */ 386 void 387 ipi_all_but_self(int ipi) 388 { 389 struct pcpu *pc; 390 391 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { 392 if (pc != pcpup) 393 ipi_send(pc, ipi); 394 } 395 } 396