1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2008 Marcel Moolenaar 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/ktr.h> 36 #include <sys/bus.h> 37 #include <sys/cpuset.h> 38 #include <sys/lock.h> 39 #include <sys/malloc.h> 40 #include <sys/mutex.h> 41 #include <sys/pcpu.h> 42 #include <sys/proc.h> 43 #include <sys/sched.h> 44 #include <sys/smp.h> 45 46 #include <vm/vm.h> 47 #include <vm/vm_param.h> 48 #include <vm/pmap.h> 49 #include <vm/vm_map.h> 50 #include <vm/vm_extern.h> 51 #include <vm/vm_kern.h> 52 53 #include <machine/bus.h> 54 #include <machine/cpu.h> 55 #include <machine/intr_machdep.h> 56 #include <machine/pcb.h> 57 #include <machine/platform.h> 58 #include <machine/md_var.h> 59 #include <machine/setjmp.h> 60 #include <machine/smp.h> 61 62 #include "pic_if.h" 63 64 extern struct pcpu __pcpu[MAXCPU]; 65 66 volatile static int ap_awake; 67 volatile static u_int ap_letgo; 68 volatile static u_quad_t ap_timebase; 69 static u_int ipi_msg_cnt[32]; 70 static struct mtx ap_boot_mtx; 71 struct pcb stoppcbs[MAXCPU]; 72 73 void 74 machdep_ap_bootstrap(void) 75 { 76 77 PCPU_SET(awake, 1); 78 __asm __volatile("msync; isync"); 79 80 while (ap_letgo == 0) 81 __asm __volatile("or 27,27,27"); 82 __asm __volatile("or 6,6,6"); 83 84 /* Initialize DEC and TB, sync with the BSP values */ 85 platform_smp_timebase_sync(ap_timebase, 1); 86 decr_ap_init(); 87 88 /* Give platform code a chance to do anything necessary */ 89 platform_smp_ap_init(); 90 91 /* Serialize console output and AP count increment */ 92 mtx_lock_spin(&ap_boot_mtx); 93 ap_awake++; 94 printf("SMP: AP CPU #%d launched\n", PCPU_GET(cpuid)); 95 mtx_unlock_spin(&ap_boot_mtx); 96 97 /* Start per-CPU event timers. */ 98 cpu_initclocks_ap(); 99 100 /* Announce ourselves awake, and enter the scheduler */ 101 sched_throw(NULL); 102 } 103 104 void 105 cpu_mp_setmaxid(void) 106 { 107 struct cpuref cpuref; 108 int error; 109 110 mp_ncpus = 0; 111 mp_maxid = 0; 112 error = platform_smp_first_cpu(&cpuref); 113 while (!error) { 114 mp_ncpus++; 115 mp_maxid = max(cpuref.cr_cpuid, mp_maxid); 116 error = platform_smp_next_cpu(&cpuref); 117 } 118 /* Sanity. */ 119 if (mp_ncpus == 0) 120 mp_ncpus = 1; 121 } 122 123 int 124 cpu_mp_probe(void) 125 { 126 127 /* 128 * We're not going to enable SMP if there's only 1 processor. 129 */ 130 return (mp_ncpus > 1); 131 } 132 133 void 134 cpu_mp_start(void) 135 { 136 struct cpuref bsp, cpu; 137 struct pcpu *pc; 138 int error; 139 140 error = platform_smp_get_bsp(&bsp); 141 KASSERT(error == 0, ("Don't know BSP")); 142 143 error = platform_smp_first_cpu(&cpu); 144 while (!error) { 145 if (cpu.cr_cpuid >= MAXCPU) { 146 printf("SMP: cpu%d: skipped -- ID out of range\n", 147 cpu.cr_cpuid); 148 goto next; 149 } 150 if (CPU_ISSET(cpu.cr_cpuid, &all_cpus)) { 151 printf("SMP: cpu%d: skipped - duplicate ID\n", 152 cpu.cr_cpuid); 153 goto next; 154 } 155 if (cpu.cr_cpuid != bsp.cr_cpuid) { 156 void *dpcpu; 157 158 pc = &__pcpu[cpu.cr_cpuid]; 159 dpcpu = (void *)kmem_malloc(kernel_arena, DPCPU_SIZE, 160 M_WAITOK | M_ZERO); 161 pcpu_init(pc, cpu.cr_cpuid, sizeof(*pc)); 162 dpcpu_init(dpcpu, cpu.cr_cpuid); 163 } else { 164 pc = pcpup; 165 pc->pc_cpuid = bsp.cr_cpuid; 166 pc->pc_bsp = 1; 167 } 168 pc->pc_hwref = cpu.cr_hwref; 169 CPU_SET(pc->pc_cpuid, &all_cpus); 170 next: 171 error = platform_smp_next_cpu(&cpu); 172 } 173 } 174 175 void 176 cpu_mp_announce(void) 177 { 178 struct pcpu *pc; 179 int i; 180 181 if (!bootverbose) 182 return; 183 184 CPU_FOREACH(i) { 185 pc = pcpu_find(i); 186 if (pc == NULL) 187 continue; 188 printf("cpu%d: dev=%x", i, (int)pc->pc_hwref); 189 if (pc->pc_bsp) 190 printf(" (BSP)"); 191 printf("\n"); 192 } 193 } 194 195 static void 196 cpu_mp_unleash(void *dummy) 197 { 198 struct pcpu *pc; 199 int cpus, timeout; 200 201 if (mp_ncpus <= 1) 202 return; 203 204 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN); 205 206 cpus = 0; 207 smp_cpus = 0; 208 #ifdef BOOKE 209 tlb1_ap_prep(); 210 #endif 211 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { 212 cpus++; 213 if (!pc->pc_bsp) { 214 if (bootverbose) 215 printf("Waking up CPU %d (dev=%x)\n", 216 pc->pc_cpuid, (int)pc->pc_hwref); 217 218 platform_smp_start_cpu(pc); 219 220 timeout = 2000; /* wait 2sec for the AP */ 221 while (!pc->pc_awake && --timeout > 0) 222 DELAY(1000); 223 224 } else { 225 pc->pc_awake = 1; 226 } 227 if (pc->pc_awake) { 228 if (bootverbose) 229 printf("Adding CPU %d, hwref=%jx, awake=%x\n", 230 pc->pc_cpuid, (uintmax_t)pc->pc_hwref, 231 pc->pc_awake); 232 smp_cpus++; 233 } else 234 CPU_SET(pc->pc_cpuid, &stopped_cpus); 235 } 236 237 ap_awake = 1; 238 239 /* Provide our current DEC and TB values for APs */ 240 ap_timebase = mftb() + 10; 241 __asm __volatile("msync; isync"); 242 243 /* Let APs continue */ 244 atomic_store_rel_int(&ap_letgo, 1); 245 246 platform_smp_timebase_sync(ap_timebase, 0); 247 248 while (ap_awake < smp_cpus) 249 ; 250 251 if (smp_cpus != cpus || cpus != mp_ncpus) { 252 printf("SMP: %d CPUs found; %d CPUs usable; %d CPUs woken\n", 253 mp_ncpus, cpus, smp_cpus); 254 } 255 256 /* Let the APs get into the scheduler */ 257 DELAY(10000); 258 259 /* XXX Atomic set operation? */ 260 smp_started = 1; 261 } 262 263 SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, cpu_mp_unleash, NULL); 264 265 int 266 powerpc_ipi_handler(void *arg) 267 { 268 u_int cpuid; 269 uint32_t ipimask; 270 int msg; 271 272 CTR2(KTR_SMP, "%s: MSR 0x%08x", __func__, mfmsr()); 273 274 ipimask = atomic_readandclear_32(&(pcpup->pc_ipimask)); 275 if (ipimask == 0) 276 return (FILTER_STRAY); 277 while ((msg = ffs(ipimask) - 1) != -1) { 278 ipimask &= ~(1u << msg); 279 ipi_msg_cnt[msg]++; 280 switch (msg) { 281 case IPI_AST: 282 CTR1(KTR_SMP, "%s: IPI_AST", __func__); 283 break; 284 case IPI_PREEMPT: 285 CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__); 286 sched_preempt(curthread); 287 break; 288 case IPI_RENDEZVOUS: 289 CTR1(KTR_SMP, "%s: IPI_RENDEZVOUS", __func__); 290 smp_rendezvous_action(); 291 break; 292 case IPI_STOP: 293 294 /* 295 * IPI_STOP_HARD is mapped to IPI_STOP so it is not 296 * necessary to add such case in the switch. 297 */ 298 CTR1(KTR_SMP, "%s: IPI_STOP or IPI_STOP_HARD (stop)", 299 __func__); 300 cpuid = PCPU_GET(cpuid); 301 savectx(&stoppcbs[cpuid]); 302 savectx(PCPU_GET(curpcb)); 303 CPU_SET_ATOMIC(cpuid, &stopped_cpus); 304 while (!CPU_ISSET(cpuid, &started_cpus)) 305 cpu_spinwait(); 306 CPU_CLR_ATOMIC(cpuid, &stopped_cpus); 307 CPU_CLR_ATOMIC(cpuid, &started_cpus); 308 CTR1(KTR_SMP, "%s: IPI_STOP (restart)", __func__); 309 break; 310 case IPI_HARDCLOCK: 311 CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__); 312 hardclockintr(); 313 break; 314 } 315 } 316 317 return (FILTER_HANDLED); 318 } 319 320 static void 321 ipi_send(struct pcpu *pc, int ipi) 322 { 323 324 CTR4(KTR_SMP, "%s: pc=%p, targetcpu=%d, IPI=%d", __func__, 325 pc, pc->pc_cpuid, ipi); 326 327 atomic_set_32(&pc->pc_ipimask, (1 << ipi)); 328 powerpc_sync(); 329 PIC_IPI(root_pic, pc->pc_cpuid); 330 331 CTR1(KTR_SMP, "%s: sent", __func__); 332 } 333 334 /* Send an IPI to a set of cpus. */ 335 void 336 ipi_selected(cpuset_t cpus, int ipi) 337 { 338 struct pcpu *pc; 339 340 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { 341 if (CPU_ISSET(pc->pc_cpuid, &cpus)) 342 ipi_send(pc, ipi); 343 } 344 } 345 346 /* Send an IPI to a specific CPU. */ 347 void 348 ipi_cpu(int cpu, u_int ipi) 349 { 350 351 ipi_send(cpuid_to_pcpu[cpu], ipi); 352 } 353 354 /* Send an IPI to all CPUs EXCEPT myself. */ 355 void 356 ipi_all_but_self(int ipi) 357 { 358 struct pcpu *pc; 359 360 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { 361 if (pc != pcpup) 362 ipi_send(pc, ipi); 363 } 364 } 365