1 /*- 2 * Copyright (c) 2008 Marcel Moolenaar 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/kernel.h> 33 #include <sys/ktr.h> 34 #include <sys/bus.h> 35 #include <sys/lock.h> 36 #include <sys/mutex.h> 37 #include <sys/pcpu.h> 38 #include <sys/proc.h> 39 #include <sys/sched.h> 40 #include <sys/smp.h> 41 42 #include <vm/vm.h> 43 #include <vm/vm_param.h> 44 #include <vm/pmap.h> 45 #include <vm/vm_map.h> 46 #include <vm/vm_extern.h> 47 #include <vm/vm_kern.h> 48 49 #include <machine/bus.h> 50 #include <machine/cpu.h> 51 #include <machine/intr_machdep.h> 52 #include <machine/platform.h> 53 #include <machine/md_var.h> 54 #include <machine/smp.h> 55 56 #include "pic_if.h" 57 58 extern struct pcpu __pcpu[MAXCPU]; 59 60 volatile static int ap_awake; 61 volatile static u_int ap_letgo; 62 volatile static u_quad_t ap_timebase; 63 static u_int ipi_msg_cnt[32]; 64 static struct mtx ap_boot_mtx; 65 66 void 67 machdep_ap_bootstrap(void) 68 { 69 /* Set up important bits on the CPU (HID registers, etc.) */ 70 cpudep_ap_setup(); 71 72 /* Set PIR */ 73 PCPU_SET(pir, mfspr(SPR_PIR)); 74 PCPU_SET(awake, 1); 75 __asm __volatile("msync; isync"); 76 77 while (ap_letgo == 0) 78 ; 79 80 /* Initialize DEC and TB, sync with the BSP values */ 81 #ifdef __powerpc64__ 82 /* Writing to the time base register is hypervisor-privileged */ 83 if (mfmsr() & PSL_HV) 84 mttb(ap_timebase); 85 #else 86 mttb(ap_timebase); 87 #endif 88 decr_ap_init(); 89 90 /* Serialize console output and AP count increment */ 91 mtx_lock_spin(&ap_boot_mtx); 92 ap_awake++; 93 printf("SMP: AP CPU #%d launched\n", PCPU_GET(cpuid)); 94 mtx_unlock_spin(&ap_boot_mtx); 95 96 /* Initialize curthread */ 97 PCPU_SET(curthread, PCPU_GET(idlethread)); 98 PCPU_SET(curpcb, curthread->td_pcb); 99 100 /* Start per-CPU event timers. */ 101 cpu_initclocks_ap(); 102 103 /* Announce ourselves awake, and enter the scheduler */ 104 sched_throw(NULL); 105 } 106 107 void 108 cpu_mp_setmaxid(void) 109 { 110 struct cpuref cpuref; 111 int error; 112 113 mp_ncpus = 0; 114 error = platform_smp_first_cpu(&cpuref); 115 while (!error) { 116 mp_ncpus++; 117 error = platform_smp_next_cpu(&cpuref); 118 } 119 /* Sanity. */ 120 if (mp_ncpus == 0) 121 mp_ncpus = 1; 122 123 /* 124 * Set the largest cpuid we're going to use. This is necessary 125 * for VM initialization. 126 */ 127 mp_maxid = min(mp_ncpus, MAXCPU) - 1; 128 } 129 130 int 131 cpu_mp_probe(void) 132 { 133 134 /* 135 * We're not going to enable SMP if there's only 1 processor. 136 */ 137 return (mp_ncpus > 1); 138 } 139 140 void 141 cpu_mp_start(void) 142 { 143 struct cpuref bsp, cpu; 144 struct pcpu *pc; 145 int error; 146 147 error = platform_smp_get_bsp(&bsp); 148 KASSERT(error == 0, ("Don't know BSP")); 149 KASSERT(bsp.cr_cpuid == 0, ("%s: cpuid != 0", __func__)); 150 151 error = platform_smp_first_cpu(&cpu); 152 while (!error) { 153 if (cpu.cr_cpuid >= MAXCPU) { 154 printf("SMP: cpu%d: skipped -- ID out of range\n", 155 cpu.cr_cpuid); 156 goto next; 157 } 158 if (all_cpus & (1 << cpu.cr_cpuid)) { 159 printf("SMP: cpu%d: skipped - duplicate ID\n", 160 cpu.cr_cpuid); 161 goto next; 162 } 163 if (cpu.cr_cpuid != bsp.cr_cpuid) { 164 void *dpcpu; 165 166 pc = &__pcpu[cpu.cr_cpuid]; 167 dpcpu = (void *)kmem_alloc(kernel_map, DPCPU_SIZE); 168 pcpu_init(pc, cpu.cr_cpuid, sizeof(*pc)); 169 dpcpu_init(dpcpu, cpu.cr_cpuid); 170 } else { 171 pc = pcpup; 172 pc->pc_cpuid = bsp.cr_cpuid; 173 pc->pc_bsp = 1; 174 } 175 pc->pc_cpumask = 1 << pc->pc_cpuid; 176 pc->pc_hwref = cpu.cr_hwref; 177 all_cpus |= pc->pc_cpumask; 178 next: 179 error = platform_smp_next_cpu(&cpu); 180 } 181 } 182 183 void 184 cpu_mp_announce(void) 185 { 186 struct pcpu *pc; 187 int i; 188 189 for (i = 0; i <= mp_maxid; i++) { 190 pc = pcpu_find(i); 191 if (pc == NULL) 192 continue; 193 printf("cpu%d: dev=%x", i, (int)pc->pc_hwref); 194 if (pc->pc_bsp) 195 printf(" (BSP)"); 196 printf("\n"); 197 } 198 } 199 200 static void 201 cpu_mp_unleash(void *dummy) 202 { 203 struct pcpu *pc; 204 int cpus, timeout; 205 206 if (mp_ncpus <= 1) 207 return; 208 209 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN); 210 211 cpus = 0; 212 smp_cpus = 0; 213 SLIST_FOREACH(pc, &cpuhead, pc_allcpu) { 214 cpus++; 215 pc->pc_other_cpus = all_cpus & ~pc->pc_cpumask; 216 if (!pc->pc_bsp) { 217 if (bootverbose) 218 printf("Waking up CPU %d (dev=%x)\n", 219 pc->pc_cpuid, (int)pc->pc_hwref); 220 221 platform_smp_start_cpu(pc); 222 223 timeout = 2000; /* wait 2sec for the AP */ 224 while (!pc->pc_awake && --timeout > 0) 225 DELAY(1000); 226 227 } else { 228 PCPU_SET(pir, mfspr(SPR_PIR)); 229 pc->pc_awake = 1; 230 } 231 if (pc->pc_awake) { 232 if (bootverbose) 233 printf("Adding CPU %d, pir=%x, awake=%x\n", 234 pc->pc_cpuid, pc->pc_pir, pc->pc_awake); 235 smp_cpus++; 236 } else 237 stopped_cpus |= (1 << pc->pc_cpuid); 238 } 239 240 ap_awake = 1; 241 242 /* Provide our current DEC and TB values for APs */ 243 ap_timebase = mftb() + 10; 244 __asm __volatile("msync; isync"); 245 246 /* Let APs continue */ 247 atomic_store_rel_int(&ap_letgo, 1); 248 249 #ifdef __powerpc64__ 250 /* Writing to the time base register is hypervisor-privileged */ 251 if (mfmsr() & PSL_HV) 252 mttb(ap_timebase); 253 #else 254 mttb(ap_timebase); 255 #endif 256 257 while (ap_awake < smp_cpus) 258 ; 259 260 if (smp_cpus != cpus || cpus != mp_ncpus) { 261 printf("SMP: %d CPUs found; %d CPUs usable; %d CPUs woken\n", 262 mp_ncpus, cpus, smp_cpus); 263 } 264 265 /* Let the APs get into the scheduler */ 266 DELAY(10000); 267 268 smp_active = 1; 269 smp_started = 1; 270 } 271 272 SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, cpu_mp_unleash, NULL); 273 274 int 275 powerpc_ipi_handler(void *arg) 276 { 277 cpumask_t self; 278 uint32_t ipimask; 279 int msg; 280 281 CTR2(KTR_SMP, "%s: MSR 0x%08x", __func__, mfmsr()); 282 283 ipimask = atomic_readandclear_32(&(pcpup->pc_ipimask)); 284 if (ipimask == 0) 285 return (FILTER_STRAY); 286 while ((msg = ffs(ipimask) - 1) != -1) { 287 ipimask &= ~(1u << msg); 288 ipi_msg_cnt[msg]++; 289 switch (msg) { 290 case IPI_AST: 291 CTR1(KTR_SMP, "%s: IPI_AST", __func__); 292 break; 293 case IPI_PREEMPT: 294 CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__); 295 sched_preempt(curthread); 296 break; 297 case IPI_RENDEZVOUS: 298 CTR1(KTR_SMP, "%s: IPI_RENDEZVOUS", __func__); 299 smp_rendezvous_action(); 300 break; 301 case IPI_STOP: 302 303 /* 304 * IPI_STOP_HARD is mapped to IPI_STOP so it is not 305 * necessary to add such case in the switch. 306 */ 307 CTR1(KTR_SMP, "%s: IPI_STOP or IPI_STOP_HARD (stop)", 308 __func__); 309 self = PCPU_GET(cpumask); 310 savectx(PCPU_GET(curpcb)); 311 atomic_set_int(&stopped_cpus, self); 312 while ((started_cpus & self) == 0) 313 cpu_spinwait(); 314 atomic_clear_int(&started_cpus, self); 315 atomic_clear_int(&stopped_cpus, self); 316 CTR1(KTR_SMP, "%s: IPI_STOP (restart)", __func__); 317 break; 318 case IPI_HARDCLOCK: 319 CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__); 320 hardclockintr(); 321 break; 322 } 323 } 324 325 return (FILTER_HANDLED); 326 } 327 328 static void 329 ipi_send(struct pcpu *pc, int ipi) 330 { 331 332 CTR4(KTR_SMP, "%s: pc=%p, targetcpu=%d, IPI=%d", __func__, 333 pc, pc->pc_cpuid, ipi); 334 335 atomic_set_32(&pc->pc_ipimask, (1 << ipi)); 336 PIC_IPI(root_pic, pc->pc_cpuid); 337 338 CTR1(KTR_SMP, "%s: sent", __func__); 339 } 340 341 /* Send an IPI to a set of cpus. */ 342 void 343 ipi_selected(cpumask_t cpus, int ipi) 344 { 345 struct pcpu *pc; 346 347 SLIST_FOREACH(pc, &cpuhead, pc_allcpu) { 348 if (cpus & pc->pc_cpumask) 349 ipi_send(pc, ipi); 350 } 351 } 352 353 /* Send an IPI to a specific CPU. */ 354 void 355 ipi_cpu(int cpu, u_int ipi) 356 { 357 358 ipi_send(cpuid_to_pcpu[cpu], ipi); 359 } 360 361 /* Send an IPI to all CPUs EXCEPT myself. */ 362 void 363 ipi_all_but_self(int ipi) 364 { 365 struct pcpu *pc; 366 367 SLIST_FOREACH(pc, &cpuhead, pc_allcpu) { 368 if (pc != pcpup) 369 ipi_send(pc, ipi); 370 } 371 } 372