1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2008 Marcel Moolenaar 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/ktr.h> 36 #include <sys/bus.h> 37 #include <sys/cpuset.h> 38 #include <sys/lock.h> 39 #include <sys/malloc.h> 40 #include <sys/mutex.h> 41 #include <sys/pcpu.h> 42 #include <sys/proc.h> 43 #include <sys/sched.h> 44 #include <sys/smp.h> 45 46 #include <vm/vm.h> 47 #include <vm/vm_param.h> 48 #include <vm/pmap.h> 49 #include <vm/vm_map.h> 50 #include <vm/vm_extern.h> 51 #include <vm/vm_kern.h> 52 53 #include <machine/bus.h> 54 #include <machine/cpu.h> 55 #include <machine/intr_machdep.h> 56 #include <machine/pcb.h> 57 #include <machine/platform.h> 58 #include <machine/md_var.h> 59 #include <machine/setjmp.h> 60 #include <machine/smp.h> 61 62 #include "pic_if.h" 63 64 extern struct pcpu __pcpu[MAXCPU]; 65 66 volatile static int ap_awake; 67 volatile static u_int ap_letgo; 68 volatile static u_quad_t ap_timebase; 69 static u_int ipi_msg_cnt[32]; 70 static struct mtx ap_boot_mtx; 71 struct pcb stoppcbs[MAXCPU]; 72 73 void 74 machdep_ap_bootstrap(void) 75 { 76 77 PCPU_SET(awake, 1); 78 __asm __volatile("msync; isync"); 79 80 while (ap_letgo == 0) 81 __asm __volatile("or 31,31,31"); 82 __asm __volatile("or 6,6,6"); 83 84 /* 85 * Set timebase as soon as possible to meet an implicit rendezvous 86 * from cpu_mp_unleash(), which sets ap_letgo and then immediately 87 * sets timebase. 88 * 89 * Note that this is instrinsically racy and is only relevant on 90 * platforms that do not support better mechanisms. 91 */ 92 platform_smp_timebase_sync(ap_timebase, 1); 93 94 /* Give platform code a chance to do anything else necessary */ 95 platform_smp_ap_init(); 96 97 /* Initialize decrementer */ 98 decr_ap_init(); 99 100 /* Serialize console output and AP count increment */ 101 mtx_lock_spin(&ap_boot_mtx); 102 ap_awake++; 103 if (bootverbose) 104 printf("SMP: AP CPU #%d launched\n", PCPU_GET(cpuid)); 105 else 106 printf("%s%d%s", ap_awake == 2 ? "Launching APs: " : "", 107 PCPU_GET(cpuid), ap_awake == mp_ncpus ? "\n" : " "); 108 mtx_unlock_spin(&ap_boot_mtx); 109 110 while(smp_started == 0) 111 ; 112 113 /* Start per-CPU event timers. */ 114 cpu_initclocks_ap(); 115 116 /* Announce ourselves awake, and enter the scheduler */ 117 sched_throw(NULL); 118 } 119 120 void 121 cpu_mp_setmaxid(void) 122 { 123 struct cpuref cpuref; 124 int error; 125 126 mp_ncpus = 0; 127 mp_maxid = 0; 128 error = platform_smp_first_cpu(&cpuref); 129 while (!error) { 130 mp_ncpus++; 131 mp_maxid = max(cpuref.cr_cpuid, mp_maxid); 132 error = platform_smp_next_cpu(&cpuref); 133 } 134 /* Sanity. */ 135 if (mp_ncpus == 0) 136 mp_ncpus = 1; 137 } 138 139 int 140 cpu_mp_probe(void) 141 { 142 143 /* 144 * We're not going to enable SMP if there's only 1 processor. 145 */ 146 return (mp_ncpus > 1); 147 } 148 149 void 150 cpu_mp_start(void) 151 { 152 struct cpuref bsp, cpu; 153 struct pcpu *pc; 154 int error; 155 156 error = platform_smp_get_bsp(&bsp); 157 KASSERT(error == 0, ("Don't know BSP")); 158 159 error = platform_smp_first_cpu(&cpu); 160 while (!error) { 161 if (cpu.cr_cpuid >= MAXCPU) { 162 printf("SMP: cpu%d: skipped -- ID out of range\n", 163 cpu.cr_cpuid); 164 goto next; 165 } 166 if (CPU_ISSET(cpu.cr_cpuid, &all_cpus)) { 167 printf("SMP: cpu%d: skipped - duplicate ID\n", 168 cpu.cr_cpuid); 169 goto next; 170 } 171 if (cpu.cr_cpuid != bsp.cr_cpuid) { 172 void *dpcpu; 173 174 pc = &__pcpu[cpu.cr_cpuid]; 175 dpcpu = (void *)kmem_malloc(DPCPU_SIZE, M_WAITOK | 176 M_ZERO); 177 pcpu_init(pc, cpu.cr_cpuid, sizeof(*pc)); 178 dpcpu_init(dpcpu, cpu.cr_cpuid); 179 } else { 180 pc = pcpup; 181 pc->pc_cpuid = bsp.cr_cpuid; 182 pc->pc_bsp = 1; 183 } 184 pc->pc_hwref = cpu.cr_hwref; 185 CPU_SET(pc->pc_cpuid, &all_cpus); 186 next: 187 error = platform_smp_next_cpu(&cpu); 188 } 189 190 #ifdef SMP 191 platform_smp_probe_threads(); 192 #endif 193 } 194 195 void 196 cpu_mp_announce(void) 197 { 198 struct pcpu *pc; 199 int i; 200 201 if (!bootverbose) 202 return; 203 204 CPU_FOREACH(i) { 205 pc = pcpu_find(i); 206 if (pc == NULL) 207 continue; 208 printf("cpu%d: dev=%x", i, (int)pc->pc_hwref); 209 if (pc->pc_bsp) 210 printf(" (BSP)"); 211 printf("\n"); 212 } 213 } 214 215 static void 216 cpu_mp_unleash(void *dummy) 217 { 218 struct pcpu *pc; 219 int cpus, timeout; 220 int ret; 221 222 if (mp_ncpus <= 1) 223 return; 224 225 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN); 226 227 cpus = 0; 228 smp_cpus = 0; 229 #ifdef BOOKE 230 tlb1_ap_prep(); 231 #endif 232 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { 233 cpus++; 234 if (!pc->pc_bsp) { 235 if (bootverbose) 236 printf("Waking up CPU %d (dev=%x)\n", 237 pc->pc_cpuid, (int)pc->pc_hwref); 238 239 ret = platform_smp_start_cpu(pc); 240 if (ret == 0) { 241 timeout = 2000; /* wait 2sec for the AP */ 242 while (!pc->pc_awake && --timeout > 0) 243 DELAY(1000); 244 } 245 } else { 246 pc->pc_awake = 1; 247 } 248 if (pc->pc_awake) { 249 if (bootverbose) 250 printf("Adding CPU %d, hwref=%jx, awake=%x\n", 251 pc->pc_cpuid, (uintmax_t)pc->pc_hwref, 252 pc->pc_awake); 253 smp_cpus++; 254 } else 255 CPU_SET(pc->pc_cpuid, &stopped_cpus); 256 } 257 258 ap_awake = 1; 259 260 /* Provide our current DEC and TB values for APs */ 261 ap_timebase = mftb() + 10; 262 __asm __volatile("msync; isync"); 263 264 /* Let APs continue */ 265 atomic_store_rel_int(&ap_letgo, 1); 266 267 platform_smp_timebase_sync(ap_timebase, 0); 268 269 while (ap_awake < smp_cpus) 270 ; 271 272 if (smp_cpus != cpus || cpus != mp_ncpus) { 273 printf("SMP: %d CPUs found; %d CPUs usable; %d CPUs woken\n", 274 mp_ncpus, cpus, smp_cpus); 275 } 276 277 if (smp_cpus > 1) 278 atomic_store_rel_int(&smp_started, 1); 279 280 /* Let the APs get into the scheduler */ 281 DELAY(10000); 282 283 } 284 285 SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, cpu_mp_unleash, NULL); 286 287 int 288 powerpc_ipi_handler(void *arg) 289 { 290 u_int cpuid; 291 uint32_t ipimask; 292 int msg; 293 294 CTR2(KTR_SMP, "%s: MSR 0x%08x", __func__, mfmsr()); 295 296 ipimask = atomic_readandclear_32(&(pcpup->pc_ipimask)); 297 if (ipimask == 0) 298 return (FILTER_STRAY); 299 while ((msg = ffs(ipimask) - 1) != -1) { 300 ipimask &= ~(1u << msg); 301 ipi_msg_cnt[msg]++; 302 switch (msg) { 303 case IPI_AST: 304 CTR1(KTR_SMP, "%s: IPI_AST", __func__); 305 break; 306 case IPI_PREEMPT: 307 CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__); 308 sched_preempt(curthread); 309 break; 310 case IPI_RENDEZVOUS: 311 CTR1(KTR_SMP, "%s: IPI_RENDEZVOUS", __func__); 312 smp_rendezvous_action(); 313 break; 314 case IPI_STOP: 315 316 /* 317 * IPI_STOP_HARD is mapped to IPI_STOP so it is not 318 * necessary to add such case in the switch. 319 */ 320 CTR1(KTR_SMP, "%s: IPI_STOP or IPI_STOP_HARD (stop)", 321 __func__); 322 cpuid = PCPU_GET(cpuid); 323 savectx(&stoppcbs[cpuid]); 324 savectx(PCPU_GET(curpcb)); 325 CPU_SET_ATOMIC(cpuid, &stopped_cpus); 326 while (!CPU_ISSET(cpuid, &started_cpus)) 327 cpu_spinwait(); 328 CPU_CLR_ATOMIC(cpuid, &stopped_cpus); 329 CPU_CLR_ATOMIC(cpuid, &started_cpus); 330 CTR1(KTR_SMP, "%s: IPI_STOP (restart)", __func__); 331 break; 332 case IPI_HARDCLOCK: 333 CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__); 334 hardclockintr(); 335 break; 336 } 337 } 338 339 return (FILTER_HANDLED); 340 } 341 342 static void 343 ipi_send(struct pcpu *pc, int ipi) 344 { 345 346 CTR4(KTR_SMP, "%s: pc=%p, targetcpu=%d, IPI=%d", __func__, 347 pc, pc->pc_cpuid, ipi); 348 349 atomic_set_32(&pc->pc_ipimask, (1 << ipi)); 350 powerpc_sync(); 351 PIC_IPI(root_pic, pc->pc_cpuid); 352 353 CTR1(KTR_SMP, "%s: sent", __func__); 354 } 355 356 /* Send an IPI to a set of cpus. */ 357 void 358 ipi_selected(cpuset_t cpus, int ipi) 359 { 360 struct pcpu *pc; 361 362 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { 363 if (CPU_ISSET(pc->pc_cpuid, &cpus)) 364 ipi_send(pc, ipi); 365 } 366 } 367 368 /* Send an IPI to a specific CPU. */ 369 void 370 ipi_cpu(int cpu, u_int ipi) 371 { 372 373 ipi_send(cpuid_to_pcpu[cpu], ipi); 374 } 375 376 /* Send an IPI to all CPUs EXCEPT myself. */ 377 void 378 ipi_all_but_self(int ipi) 379 { 380 struct pcpu *pc; 381 382 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { 383 if (pc != pcpup) 384 ipi_send(pc, ipi); 385 } 386 } 387