1f9bac91bSBenno Rice /*- 251369649SPedro F. Giffuni * SPDX-License-Identifier: BSD-4-Clause 351369649SPedro F. Giffuni * 4f9bac91bSBenno Rice * Copyright (C) 1995, 1996 Wolfgang Solfrank. 5f9bac91bSBenno Rice * Copyright (C) 1995, 1996 TooLs GmbH. 6f9bac91bSBenno Rice * All rights reserved. 7f9bac91bSBenno Rice * 8f9bac91bSBenno Rice * Redistribution and use in source and binary forms, with or without 9f9bac91bSBenno Rice * modification, are permitted provided that the following conditions 10f9bac91bSBenno Rice * are met: 11f9bac91bSBenno Rice * 1. Redistributions of source code must retain the above copyright 12f9bac91bSBenno Rice * notice, this list of conditions and the following disclaimer. 13f9bac91bSBenno Rice * 2. Redistributions in binary form must reproduce the above copyright 14f9bac91bSBenno Rice * notice, this list of conditions and the following disclaimer in the 15f9bac91bSBenno Rice * documentation and/or other materials provided with the distribution. 16f9bac91bSBenno Rice * 3. All advertising materials mentioning features or use of this software 17f9bac91bSBenno Rice * must display the following acknowledgement: 18f9bac91bSBenno Rice * This product includes software developed by TooLs GmbH. 19f9bac91bSBenno Rice * 4. The name of TooLs GmbH may not be used to endorse or promote products 20f9bac91bSBenno Rice * derived from this software without specific prior written permission. 21f9bac91bSBenno Rice * 22f9bac91bSBenno Rice * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 23f9bac91bSBenno Rice * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24f9bac91bSBenno Rice * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25f9bac91bSBenno Rice * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26f9bac91bSBenno Rice * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 27f9bac91bSBenno Rice * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 28f9bac91bSBenno Rice * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 29f9bac91bSBenno Rice * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 30f9bac91bSBenno Rice * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 31f9bac91bSBenno Rice * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32f9bac91bSBenno Rice * 33f9bac91bSBenno Rice * $NetBSD: pcb.h,v 1.4 2000/06/04 11:57:17 tsubai Exp $ 34f9bac91bSBenno Rice * $FreeBSD$ 35f9bac91bSBenno Rice */ 36f9bac91bSBenno Rice 37f9bac91bSBenno Rice #ifndef _MACHINE_PCB_H_ 38f9bac91bSBenno Rice #define _MACHINE_PCB_H_ 39f9bac91bSBenno Rice 40*3de50be8SBrandon Bergren #include <sys/endian.h> 41*3de50be8SBrandon Bergren 42a18c313eSNathan Whitehorn #include <machine/setjmp.h> 43f9bac91bSBenno Rice 44ef1fcaf0SWarner Losh #ifndef _STANDALONE 45f9bac91bSBenno Rice struct pcb { 46e07530d2SLeandro Lupori register_t pcb_context[20]; /* non-volatile r12-r31 */ 474eed0cf1SBenno Rice register_t pcb_cr; /* Condition register */ 484eed0cf1SBenno Rice register_t pcb_sp; /* stack pointer */ 49c3e289e1SNathan Whitehorn register_t pcb_toc; /* toc pointer */ 504eed0cf1SBenno Rice register_t pcb_lr; /* link register */ 512914706aSJustin Hibbits register_t pcb_dscr; /* dscr value */ 528b7f0d83SJustin Hibbits register_t pcb_fscr; 53d1d73b0eSJustin Hibbits register_t pcb_tar; 54f9bac91bSBenno Rice struct pmap *pcb_pm; /* pmap of our vmspace */ 55a18c313eSNathan Whitehorn jmp_buf *pcb_onfault; /* For use during 564eed0cf1SBenno Rice copyin/copyout */ 57f9bac91bSBenno Rice int pcb_flags; 582914706aSJustin Hibbits #define PCB_FPU 0x1 /* Process uses FPU */ 592914706aSJustin Hibbits #define PCB_FPREGS 0x2 /* Process had FPU registers initialized */ 602914706aSJustin Hibbits #define PCB_VEC 0x4 /* Process had Altivec initialized */ 612914706aSJustin Hibbits #define PCB_VSX 0x8 /* Process had VSX initialized */ 622914706aSJustin Hibbits #define PCB_CDSCR 0x10 /* Process had Custom DSCR initialized */ 6303e83a83SBreno Leitao #define PCB_HTM 0x20 /* Process had HTM initialized */ 648b7f0d83SJustin Hibbits #define PCB_CFSCR 0x40 /* Process had FSCR updated */ 65f9bac91bSBenno Rice struct fpu { 6635f612b8SNathan Whitehorn union { 67*3de50be8SBrandon Bergren #if _BYTE_ORDER == _BIG_ENDIAN 6835f612b8SNathan Whitehorn double fpr; 6935f612b8SNathan Whitehorn uint32_t vsr[4]; 70*3de50be8SBrandon Bergren #else 71*3de50be8SBrandon Bergren uint32_t vsr[4]; 72*3de50be8SBrandon Bergren struct { 73*3de50be8SBrandon Bergren double padding; 74*3de50be8SBrandon Bergren double fpr; 75*3de50be8SBrandon Bergren }; 76*3de50be8SBrandon Bergren #endif 7735f612b8SNathan Whitehorn } fpr[32]; 78f9bac91bSBenno Rice double fpscr; /* FPSCR stored as double for easier access */ 79f9bac91bSBenno Rice } pcb_fpu; /* Floating point processor */ 80eeaa8979SBenno Rice unsigned int pcb_fpcpu; /* which CPU had our FPU 81eeaa8979SBenno Rice stuff. */ 821ac37bcbSNathan Whitehorn struct vec { 831ac37bcbSNathan Whitehorn uint32_t vr[32][4]; 84971e8cb1SJustin Hibbits uint32_t spare[2]; 85971e8cb1SJustin Hibbits uint32_t vrsave; 86971e8cb1SJustin Hibbits uint32_t vscr; /* aligned at vector element 3 */ 87c3e289e1SNathan Whitehorn } pcb_vec __aligned(16); /* Vector processor */ 881ac37bcbSNathan Whitehorn unsigned int pcb_veccpu; /* which CPU had our vector 891ac37bcbSNathan Whitehorn stuff. */ 9003e83a83SBreno Leitao struct htm { 9103e83a83SBreno Leitao uint64_t tfhar; 9203e83a83SBreno Leitao uint64_t texasr; 9303e83a83SBreno Leitao uint64_t tfiar; 9403e83a83SBreno Leitao } pcb_htm; 95786e4a1bSRafal Jaworowski 96d1d73b0eSJustin Hibbits struct ebb { 97d1d73b0eSJustin Hibbits uint64_t ebbhr; 98d1d73b0eSJustin Hibbits uint64_t ebbrr; 99d1d73b0eSJustin Hibbits uint64_t bescr; 100d1d73b0eSJustin Hibbits } pcb_ebb; 101d1d73b0eSJustin Hibbits 102d1d73b0eSJustin Hibbits struct lmon { 103d1d73b0eSJustin Hibbits uint64_t lmrr; 104d1d73b0eSJustin Hibbits uint64_t lmser; 105d1d73b0eSJustin Hibbits } pcb_lm; 106d1d73b0eSJustin Hibbits 107786e4a1bSRafal Jaworowski union { 108786e4a1bSRafal Jaworowski struct { 10995fa3335SNathan Whitehorn vm_offset_t usr_segm; /* Base address */ 110c3e289e1SNathan Whitehorn register_t usr_vsid; /* USER_SR segment */ 111786e4a1bSRafal Jaworowski } aim; 112786e4a1bSRafal Jaworowski struct { 1130a35b40fSRafal Jaworowski register_t dbcr0; 114786e4a1bSRafal Jaworowski } booke; 115786e4a1bSRafal Jaworowski } pcb_cpu; 116fe5e88faSJustin Hibbits vm_offset_t pcb_lastill; /* Last illegal instruction */ 117f9bac91bSBenno Rice }; 118ef1fcaf0SWarner Losh #endif 119f9bac91bSBenno Rice 120f9bac91bSBenno Rice #ifdef _KERNEL 121f9bac91bSBenno Rice 122f54721f6SMarcel Moolenaar struct trapframe; 123f54721f6SMarcel Moolenaar 124f9bac91bSBenno Rice #ifndef curpcb 125f9bac91bSBenno Rice extern struct pcb *curpcb; 126f9bac91bSBenno Rice #endif 127f9bac91bSBenno Rice 128f9bac91bSBenno Rice extern struct pmap *curpm; 129f9bac91bSBenno Rice extern struct proc *fpuproc; 130f9bac91bSBenno Rice 131abdc8ff1SPeter Grehan void makectx(struct trapframe *, struct pcb *); 1322383d92aSNathan Whitehorn void savectx(struct pcb *) __returns_twice; 133abdc8ff1SPeter Grehan 134f9bac91bSBenno Rice #endif 135f9bac91bSBenno Rice #endif /* _MACHINE_PCB_H_ */ 136