1f9bac91bSBenno Rice /*- 2f9bac91bSBenno Rice * Copyright (C) 1995, 1996 Wolfgang Solfrank. 3f9bac91bSBenno Rice * Copyright (C) 1995, 1996 TooLs GmbH. 4f9bac91bSBenno Rice * All rights reserved. 5f9bac91bSBenno Rice * 6f9bac91bSBenno Rice * Redistribution and use in source and binary forms, with or without 7f9bac91bSBenno Rice * modification, are permitted provided that the following conditions 8f9bac91bSBenno Rice * are met: 9f9bac91bSBenno Rice * 1. Redistributions of source code must retain the above copyright 10f9bac91bSBenno Rice * notice, this list of conditions and the following disclaimer. 11f9bac91bSBenno Rice * 2. Redistributions in binary form must reproduce the above copyright 12f9bac91bSBenno Rice * notice, this list of conditions and the following disclaimer in the 13f9bac91bSBenno Rice * documentation and/or other materials provided with the distribution. 14f9bac91bSBenno Rice * 3. All advertising materials mentioning features or use of this software 15f9bac91bSBenno Rice * must display the following acknowledgement: 16f9bac91bSBenno Rice * This product includes software developed by TooLs GmbH. 17f9bac91bSBenno Rice * 4. The name of TooLs GmbH may not be used to endorse or promote products 18f9bac91bSBenno Rice * derived from this software without specific prior written permission. 19f9bac91bSBenno Rice * 20f9bac91bSBenno Rice * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 21f9bac91bSBenno Rice * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22f9bac91bSBenno Rice * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23f9bac91bSBenno Rice * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 24f9bac91bSBenno Rice * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 25f9bac91bSBenno Rice * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 26f9bac91bSBenno Rice * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 27f9bac91bSBenno Rice * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 28f9bac91bSBenno Rice * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 29f9bac91bSBenno Rice * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30f9bac91bSBenno Rice * 31f9bac91bSBenno Rice * $NetBSD: pcb.h,v 1.4 2000/06/04 11:57:17 tsubai Exp $ 32f9bac91bSBenno Rice * $FreeBSD$ 33f9bac91bSBenno Rice */ 34f9bac91bSBenno Rice 35f9bac91bSBenno Rice #ifndef _MACHINE_PCB_H_ 36f9bac91bSBenno Rice #define _MACHINE_PCB_H_ 37f9bac91bSBenno Rice 38c3e289e1SNathan Whitehorn typedef register_t faultbuf[25]; 39f9bac91bSBenno Rice 40f9bac91bSBenno Rice struct pcb { 418b8aa9c1SBenno Rice register_t pcb_context[20]; /* non-volatile r14-r31 */ 424eed0cf1SBenno Rice register_t pcb_cr; /* Condition register */ 434eed0cf1SBenno Rice register_t pcb_sp; /* stack pointer */ 44c3e289e1SNathan Whitehorn register_t pcb_toc; /* toc pointer */ 454eed0cf1SBenno Rice register_t pcb_lr; /* link register */ 46f9bac91bSBenno Rice struct pmap *pcb_pm; /* pmap of our vmspace */ 474eed0cf1SBenno Rice faultbuf *pcb_onfault; /* For use during 484eed0cf1SBenno Rice copyin/copyout */ 49f9bac91bSBenno Rice int pcb_flags; 50f9bac91bSBenno Rice #define PCB_FPU 1 /* Process had FPU initialized */ 511ac37bcbSNathan Whitehorn #define PCB_VEC 2 /* Process had Altivec initialized */ 52f9bac91bSBenno Rice struct fpu { 53f9bac91bSBenno Rice double fpr[32]; 54f9bac91bSBenno Rice double fpscr; /* FPSCR stored as double for easier access */ 55f9bac91bSBenno Rice } pcb_fpu; /* Floating point processor */ 56eeaa8979SBenno Rice unsigned int pcb_fpcpu; /* which CPU had our FPU 57eeaa8979SBenno Rice stuff. */ 581ac37bcbSNathan Whitehorn struct vec { 591ac37bcbSNathan Whitehorn uint32_t vr[32][4]; 601ac37bcbSNathan Whitehorn register_t vrsave; 611ac37bcbSNathan Whitehorn register_t spare[2]; 622639d62eSNathan Whitehorn register_t vscr; /* aligned at vector element 3 */ 63c3e289e1SNathan Whitehorn } pcb_vec __aligned(16); /* Vector processor */ 641ac37bcbSNathan Whitehorn unsigned int pcb_veccpu; /* which CPU had our vector 651ac37bcbSNathan Whitehorn stuff. */ 66786e4a1bSRafal Jaworowski 67786e4a1bSRafal Jaworowski union { 68786e4a1bSRafal Jaworowski struct { 6995fa3335SNathan Whitehorn vm_offset_t usr_segm; /* Base address */ 70c3e289e1SNathan Whitehorn register_t usr_vsid; /* USER_SR segment */ 71786e4a1bSRafal Jaworowski } aim; 72786e4a1bSRafal Jaworowski struct { 73786e4a1bSRafal Jaworowski register_t ctr; 74786e4a1bSRafal Jaworowski register_t xer; 750a35b40fSRafal Jaworowski register_t dbcr0; 76786e4a1bSRafal Jaworowski } booke; 77786e4a1bSRafal Jaworowski } pcb_cpu; 78f9bac91bSBenno Rice }; 79f9bac91bSBenno Rice 80f9bac91bSBenno Rice #ifdef _KERNEL 81f9bac91bSBenno Rice 82f54721f6SMarcel Moolenaar struct trapframe; 83f54721f6SMarcel Moolenaar 84f9bac91bSBenno Rice #ifndef curpcb 85f9bac91bSBenno Rice extern struct pcb *curpcb; 86f9bac91bSBenno Rice #endif 87f9bac91bSBenno Rice 88f9bac91bSBenno Rice extern struct pmap *curpm; 89f9bac91bSBenno Rice extern struct proc *fpuproc; 90f9bac91bSBenno Rice 91abdc8ff1SPeter Grehan void makectx(struct trapframe *, struct pcb *); 92*2383d92aSNathan Whitehorn void savectx(struct pcb *) __returns_twice; 93abdc8ff1SPeter Grehan 94f9bac91bSBenno Rice #endif 95f9bac91bSBenno Rice #endif /* _MACHINE_PCB_H_ */ 96