1.include <kmod.opts.mk> 2 3KMOD= vmm 4 5.if ${MACHINE_CPUARCH} == "amd64" 6.endif 7 8SRCS+= acpi_if.h bus_if.h device_if.h pci_if.h pcib_if.h vnode_if.h 9 10CFLAGS+= -DVMM_KEEP_STATS 11CFLAGS+= -I${SRCTOP}/sys/${MACHINE}/vmm 12 13# generic vmm support 14.PATH: ${SRCTOP}/sys/dev/vmm ${SRCTOP}/sys/${MACHINE}/vmm 15 16SRCS+= vmm.c \ 17 vmm_dev.c \ 18 vmm_dev_machdep.c \ 19 vmm_instruction_emul.c \ 20 vmm_mem.c \ 21 vmm_stat.c 22 23.if ${MACHINE_CPUARCH} == "aarch64" 24CFLAGS+= -I${SRCTOP}/sys/${MACHINE}/vmm/io 25DPSRCS+= assym.inc 26 27# TODO: Add the new EL2 code 28SRCS+= vmm_arm64.c \ 29 vmm_reset.c \ 30 vmm_call.S \ 31 vmm_handlers.c \ 32 vmm_mmu.c \ 33 vmm_vhe_exception.S \ 34 vmm_vhe.c \ 35 vmm_hyp_el2.S 36 37.PATH: ${SRCTOP}/sys/${MACHINE}/vmm/io 38SRCS+= vgic.c \ 39 vgic_if.h \ 40 vgic_if.c \ 41 vgic_v3.c \ 42 vtimer.c 43 44CLEANFILES+= vmm_nvhe_exception.o vmm_nvhe.o 45 46CLEANFILES+= vmm_hyp_blob.elf.full 47CLEANFILES+= vmm_hyp_blob.elf vmm_hyp_blob.bin 48 49vmm_nvhe_exception.o: vmm_nvhe_exception.S vmm_hyp_exception.S 50 ${CC} -c -x assembler-with-cpp -DLOCORE \ 51 ${NOSAN_CFLAGS:N-mbranch-protection*} ${.IMPSRC} -o ${.TARGET} -fpie 52 53vmm_nvhe.o: vmm_nvhe.c vmm_hyp.c 54 ${CC} -c ${NOSAN_CFLAGS:N-mbranch-protection*} ${.IMPSRC} \ 55 -o ${.TARGET} -fpie 56 57vmm_hyp_blob.elf.full: vmm_nvhe_exception.o vmm_nvhe.o 58 ${LD} -m ${LD_EMULATION} -Bdynamic -L ${SYSDIR}/conf -T ${SYSDIR}/conf/ldscript.arm64 \ 59 ${_LDFLAGS:N-zbti-report*} --no-warn-mismatch --warn-common --export-dynamic \ 60 --dynamic-linker /red/herring -X -o ${.TARGET} ${.ALLSRC} \ 61 --defsym=_start='0x0' --defsym=text_start='0x0' 62 63vmm_hyp_blob.elf: vmm_hyp_blob.elf.full 64 ${OBJCOPY} --strip-debug ${.ALLSRC} ${.TARGET} 65 66vmm_hyp_blob.bin: vmm_hyp_blob.elf 67 ${OBJCOPY} --output-target=binary ${.ALLSRC} ${.TARGET} 68 69vmm_hyp_el2.o: vmm_hyp_blob.bin 70 71.elif ${MACHINE_CPUARCH} == "amd64" 72CFLAGS+= -I${SRCTOP}/sys/${MACHINE}/vmm/io 73DPSRCS+= vmx_assym.h svm_assym.h 74DPSRCS+= vmx_genassym.c svm_genassym.c offset.inc 75 76CFLAGS+= -I${SRCTOP}/sys/amd64/vmm/intel 77CFLAGS+= -I${SRCTOP}/sys/amd64/vmm/amd 78 79SRCS+= opt_acpi.h \ 80 opt_bhyve_snapshot.h \ 81 opt_ddb.h 82 83SRCS+= vmm_host.c \ 84 vmm_ioport.c \ 85 vmm_lapic.c \ 86 vmm_mem_machdep.c \ 87 vmm_util.c \ 88 x86.c 89 90.PATH: ${SRCTOP}/sys/${MACHINE}/vmm/io 91SRCS+= iommu.c \ 92 ppt.c \ 93 vatpic.c \ 94 vatpit.c \ 95 vhpet.c \ 96 vioapic.c \ 97 vlapic.c \ 98 vpmtmr.c \ 99 vrtc.c 100 101# intel-specific files 102.PATH: ${SRCTOP}/sys/amd64/vmm/intel 103SRCS+= ept.c \ 104 vmcs.c \ 105 vmx_msr.c \ 106 vmx_support.S \ 107 vmx.c \ 108 vtd.c 109 110# amd-specific files 111.PATH: ${SRCTOP}/sys/amd64/vmm/amd 112SRCS+= vmcb.c \ 113 amdviiommu.c \ 114 ivhd_if.c \ 115 ivhd_if.h \ 116 svm.c \ 117 svm_support.S \ 118 npt.c \ 119 ivrs_drv.c \ 120 amdvi_hw.c \ 121 svm_msr.c 122 123SRCS.BHYVE_SNAPSHOT= vmm_snapshot.c 124 125CLEANFILES+= vmx_assym.h vmx_genassym.o svm_assym.h svm_genassym.o 126 127OBJS_DEPEND_GUESS.vmx_support.o+= vmx_assym.h 128OBJS_DEPEND_GUESS.svm_support.o+= svm_assym.h 129 130vmx_assym.h: vmx_genassym.o 131 sh ${SYSDIR}/kern/genassym.sh vmx_genassym.o > ${.TARGET} 132 133svm_assym.h: svm_genassym.o 134 sh ${SYSDIR}/kern/genassym.sh svm_genassym.o > ${.TARGET} 135 136vmx_support.o: 137 ${CC} -c -x assembler-with-cpp -DLOCORE ${CFLAGS} \ 138 ${.IMPSRC} -o ${.TARGET} 139 140svm_support.o: 141 ${CC} -c -x assembler-with-cpp -DLOCORE ${CFLAGS} \ 142 ${.IMPSRC} -o ${.TARGET} 143 144hyp_genassym.o: offset.inc 145 ${CC} -c ${NOSAN_CFLAGS:N-flto*:N-fno-common} -fcommon ${.IMPSRC} 146 147vmx_genassym.o: offset.inc 148 ${CC} -c ${NOSAN_CFLAGS:N-flto*:N-fno-common} -fcommon ${.IMPSRC} 149 150svm_genassym.o: offset.inc 151 ${CC} -c ${NOSAN_CFLAGS:N-flto*:N-fno-common} -fcommon ${.IMPSRC} 152 153.elif ${MACHINE_CPUARCH} == "riscv" 154 155SRCS+= vmm_aplic.c \ 156 vmm_fence.c \ 157 vmm_riscv.c \ 158 vmm_sbi.c \ 159 vmm_switch.S \ 160 vmm_vtimer.c 161 162.endif 163 164.include <bsd.kmod.mk> 165