xref: /freebsd/sys/dts/arm64/overlays/sun50i-h5-opp.dtso (revision 7648bc9fee8dec6cb3c4941e0165a930fbe8dcb0)
1/dts-v1/;
2/plugin/;
3
4#include <dt-bindings/clock/sun8i-h3-ccu.h>
5
6/ {
7	compatible = "allwinner,sun50i-h5";
8};
9
10&{/} {
11	cpu_opp_table: opp_table {
12		       compatible = "operating-points-v2";
13		       opp-shared;
14
15		       opp@408000000 {
16			       opp-hz = /bits/ 64 <408000000>;
17			       opp-microvolt = <1000000 1000000 1300000>;
18			       clock-latency-ns = <244144>; /* 8 32k periods */
19		       };
20
21		       opp@648000000 {
22			       opp-hz = /bits/ 64 <648000000>;
23			       opp-microvolt = <1040000 1040000 1300000>;
24			       clock-latency-ns = <244144>; /* 8 32k periods */
25		       };
26
27		       opp@816000000 {
28			       opp-hz = /bits/ 64 <816000000>;
29			       opp-microvolt = <1080000 1080000 1300000>;
30			       clock-latency-ns = <244144>; /* 8 32k periods */
31		       };
32
33		       opp@912000000 {
34			       opp-hz = /bits/ 64 <912000000>;
35			       opp-microvolt = <1120000 1120000 1300000>;
36			       clock-latency-ns = <244144>; /* 8 32k periods */
37		       };
38
39		       opp@960000000 {
40			       opp-hz = /bits/ 64 <960000000>;
41			       opp-microvolt = <1160000 1160000 1300000>;
42			       clock-latency-ns = <244144>; /* 8 32k periods */
43		       };
44
45		       opp@1008000000 {
46			       opp-hz = /bits/ 64 <1008000000>;
47			       opp-microvolt = <1200000 1200000 1300000>;
48			       clock-latency-ns = <244144>; /* 8 32k periods */
49		       };
50
51		       opp@1056000000 {
52			       opp-hz = /bits/ 64 <1056000000>;
53			       opp-microvolt = <1240000 1240000 1300000>;
54			       clock-latency-ns = <244144>; /* 8 32k periods */
55		       };
56
57		       opp@1104000000 {
58			       opp-hz = /bits/ 64 <1104000000>;
59			       opp-microvolt = <1260000 1260000 1300000>;
60			       clock-latency-ns = <244144>; /* 8 32k periods */
61		       };
62
63		       opp@1152000000 {
64			       opp-hz = /bits/ 64 <1152000000>;
65			       opp-microvolt = <1300000 1300000 1300000>;
66			       clock-latency-ns = <244144>; /* 8 32k periods */
67		       };
68	       };
69
70	reg_cpu_fallback: reg_cpu_fallback  {
71		compatible = "regulator-fixed";
72		regulator-name = "vdd-cpux-dummy";
73		regulator-min-microvolt = <1100000>;
74		regulator-max-microvolt = <1100000>;
75	};
76
77};
78
79&{/cpus/cpu@0} {
80	clocks = <&ccu CLK_CPUX>;
81	clock-names = "cpu";
82	clock-latency = <244144>; /* 8 32k periods */
83	operating-points-v2 = <&cpu_opp_table>;
84	cpu-supply = <&reg_cpu_fallback>;
85	#cooling-cells = <2>;
86};
87
88&{/cpus/cpu@1} {
89	operating-points-v2 = <&cpu_opp_table>;
90};
91
92&{/cpus/cpu@2} {
93	operating-points-v2 = <&cpu_opp_table>;
94};
95
96&{/cpus/cpu@3} {
97	operating-points-v2 = <&cpu_opp_table>;
98};
99
100