1/*- 2 * Copyright (c) 2011 The FreeBSD Foundation 3 * Copyright (c) 2012 Andrew Turner 4 * All rights reserved. 5 * 6 * Developed by Damjan Marion <damjan.marion@gmail.com> 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD$ 30 */ 31 32/ { 33 compatible = "compal,paz00", "nvidia,tegra20"; 34 #address-cells = <1>; 35 #size-cells = <1>; 36 interrupt-parent = <&GIC>; 37 38 SOC: tegra20@0 { 39 #address-cells = <1>; 40 #size-cells = <1>; 41 compatible = "simple-bus"; 42 ranges; 43 bus-frequency = <0>; 44 45 GIC: interrupt-controller@50041000 { 46 compatible = "arm,gic"; 47 reg = < 0x50041000 0x1000 >, /* Distributor Registers */ 48 < 0x50040100 0x0100 >; /* CPU Interface Registers */ 49 interrupt-controller; 50 #interrupt-cells = <1>; 51 }; 52 53 mp_tmr@50040200 { 54 compatible = "arm,mpcore-timers"; 55 clock-frequency = < 50040200 >; 56 #address-cells = <1>; 57 #size-cells = <0>; 58 reg = < 0x50040200 0x100 >, /* Global Timer Registers */ 59 < 0x50040600 0x100 >; /* Private Timer Registers */ 60 interrupts = < 27 29 >; 61 interrupt-parent = <&GIC>; 62 }; 63 64 serial@70006000 { 65 compatible = "ns16550"; 66 reg = <0x70006000 0x40>; 67 reg-shift = <2>; 68 interrupts = < 68 >; 69 interrupt-parent = <&GIC>; 70 clock-frequency = < 215654400 >; 71 }; 72 }; 73}; 74 75