xref: /freebsd/sys/dev/usb/wlan/if_zydreg.h (revision 6b129086dcee14496517fae085b448e3edc69bc7)
1 /*	$OpenBSD: if_zydreg.h,v 1.19 2006/11/30 19:28:07 damien Exp $	*/
2 /*	$NetBSD: if_zydreg.h,v 1.2 2007/06/16 11:18:45 kiyohara Exp $	*/
3 /*	$FreeBSD$	*/
4 
5 /*-
6  * Copyright (c) 2006 by Damien Bergamini <damien.bergamini@free.fr>
7  * Copyright (c) 2006 by Florian Stoehr <ich@florian-stoehr.de>
8  *
9  * Permission to use, copy, modify, and distribute this software for any
10  * purpose with or without fee is hereby granted, provided that the above
11  * copyright notice and this permission notice appear in all copies.
12  *
13  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
14  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
15  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
16  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
17  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
18  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
19  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20  */
21 
22 /*
23  * ZyDAS ZD1211/ZD1211B USB WLAN driver.
24  */
25 
26 #define ZYD_CR_GPI_EN		0x9418
27 #define ZYD_CR_RADIO_PD		0x942c
28 #define ZYD_CR_RF2948_PD	0x942c
29 #define ZYD_CR_EN_PS_MANUAL_AGC	0x943c
30 #define ZYD_CR_CONFIG_PHILIPS	0x9440
31 #define ZYD_CR_I2C_WRITE	0x9444
32 #define ZYD_CR_SA2400_SER_RP	0x9448
33 #define ZYD_CR_RADIO_PE		0x9458
34 #define ZYD_CR_RST_BUS_MASTER	0x945c
35 #define ZYD_CR_RFCFG		0x9464
36 #define ZYD_CR_HSTSCHG		0x946c
37 #define ZYD_CR_PHY_ON		0x9474
38 #define ZYD_CR_RX_DELAY		0x9478
39 #define ZYD_CR_RX_PE_DELAY	0x947c
40 #define ZYD_CR_GPIO_1		0x9490
41 #define ZYD_CR_GPIO_2		0x9494
42 #define ZYD_CR_EnZYD_CRyBufMux	0x94a8
43 #define ZYD_CR_PS_CTRL		0x9500
44 #define ZYD_CR_ADDA_PWR_DWN	0x9504
45 #define ZYD_CR_ADDA_MBIAS_WT	0x9508
46 #define ZYD_CR_INTERRUPT	0x9510
47 #define ZYD_CR_MAC_PS_STATE	0x950c
48 #define ZYD_CR_ATIM_WND_PERIOD	0x951c
49 #define ZYD_CR_BCN_INTERVAL	0x9520
50 #define ZYD_CR_PRE_TBTT		0x9524
51 
52 /*
53  * MAC registers.
54  */
55 #define ZYD_MAC_MACADRL		0x9610 /* MAC address (low) */
56 #define ZYD_MAC_MACADRH		0x9614 /* MAC address (high) */
57 #define ZYD_MAC_BSSADRL		0x9618 /* BSS address (low) */
58 #define ZYD_MAC_BSSADRH		0x961c /* BSS address (high) */
59 #define ZYD_MAC_BCNCFG		0x9620 /* BCN configuration */
60 #define ZYD_MAC_GHTBL		0x9624 /* Group hash table (low) */
61 #define ZYD_MAC_GHTBH		0x9628 /* Group hash table (high) */
62 #define ZYD_MAC_RX_TIMEOUT	0x962c /* Rx timeout value */
63 #define ZYD_MAC_BAS_RATE	0x9630 /* Basic rate setting */
64 #define ZYD_MAC_MAN_RATE	0x9634 /* Mandatory rate setting */
65 #define ZYD_MAC_RTSCTSRATE	0x9638 /* RTS CTS rate */
66 #define ZYD_MAC_BACKOFF_PROTECT	0x963c /* Backoff protection */
67 #define ZYD_MAC_RX_THRESHOLD	0x9640 /* Rx threshold */
68 #define ZYD_MAC_TX_PE_CONTROL	0x9644 /* Tx_PE control */
69 #define ZYD_MAC_AFTER_PNP	0x9648 /* After PnP */
70 #define ZYD_MAC_RX_PE_DELAY	0x964c /* Rx_pe delay */
71 #define ZYD_MAC_RX_ADDR2_L	0x9650 /* RX address2 (low)    */
72 #define ZYD_MAC_RX_ADDR2_H	0x9654 /* RX address2 (high) */
73 #define ZYD_MAC_SIFS_ACK_TIME	0x9658 /* Dynamic SIFS ack time */
74 #define ZYD_MAC_PHY_DELAY	0x9660 /* PHY delay */
75 #define ZYD_MAC_PHY_DELAY2	0x966c /* PHY delay */
76 #define ZYD_MAC_BCNFIFO		0x9670 /* Beacon FIFO I/O port */
77 #define ZYD_MAC_SNIFFER		0x9674 /* Sniffer on/off */
78 #define ZYD_MAC_ENCRYPTION_TYPE 0x9678 /* Encryption type */
79 #define ZYD_MAC_RETRY		0x967c /* Retry time */
80 #define ZYD_MAC_MISC		0x9680 /* Misc */
81 #define ZYD_MAC_STMACHINESTAT	0x9684 /* State machine status */
82 #define ZYD_MAC_TX_UNDERRUN_CNT	0x9688 /* TX underrun counter */
83 #define ZYD_MAC_RXFILTER	0x968c /* Send to host settings */
84 #define ZYD_MAC_ACK_EXT		0x9690 /* Acknowledge extension */
85 #define ZYD_MAC_BCNFIFOST	0x9694 /* BCN FIFO set and status */
86 #define ZYD_MAC_DIFS_EIFS_SIFS	0x9698 /* DIFS, EIFS & SIFS settings */
87 #define ZYD_MAC_RX_TIMEOUT_CNT	0x969c /* RX timeout count */
88 #define ZYD_MAC_RX_TOTAL_FRAME	0x96a0 /* RX total frame count */
89 #define ZYD_MAC_RX_CRC32_CNT	0x96a4 /* RX CRC32 frame count */
90 #define ZYD_MAC_RX_CRC16_CNT	0x96a8 /* RX CRC16 frame count */
91 #define ZYD_MAC_RX_UDEC		0x96ac /* RX unicast decr. error count */
92 #define ZYD_MAC_RX_OVERRUN_CNT	0x96b0 /* RX FIFO overrun count */
93 #define ZYD_MAC_RX_MDEC		0x96bc /* RX multicast decr. err. cnt. */
94 #define ZYD_MAC_NAV_TCR		0x96c4 /* NAV timer count read */
95 #define ZYD_MAC_BACKOFF_ST_RD	0x96c8 /* Backoff status read */
96 #define ZYD_MAC_DM_RETRY_CNT_RD	0x96cc /* DM retry count read */
97 #define ZYD_MAC_RX_ACR		0x96d0 /* RX arbitration count read    */
98 #define ZYD_MAC_TX_CCR		0x96d4 /* Tx complete count read */
99 #define ZYD_MAC_TCB_ADDR	0x96e8 /* Current PCI process TCP addr */
100 #define ZYD_MAC_RCB_ADDR	0x96ec /* Next RCB address */
101 #define ZYD_MAC_CONT_WIN_LIMIT	0x96f0 /* Contention window limit */
102 #define ZYD_MAC_TX_PKT		0x96f4 /* Tx total packet count read */
103 #define ZYD_MAC_DL_CTRL		0x96f8 /* Download control */
104 #define ZYD_MAC_CAM_MODE	0x9700 /* CAM: Continuous Access Mode */
105 #define ZYD_MACB_TXPWR_CTL1	0x9b00
106 #define ZYD_MACB_TXPWR_CTL2	0x9b04
107 #define ZYD_MACB_TXPWR_CTL3	0x9b08
108 #define ZYD_MACB_TXPWR_CTL4	0x9b0c
109 #define ZYD_MACB_AIFS_CTL1	0x9b10
110 #define ZYD_MACB_AIFS_CTL2	0x9b14
111 #define ZYD_MACB_TXOP		0x9b20
112 #define ZYD_MACB_MAX_RETRY	0x9b28
113 
114 /*
115  * Miscellaneous registers.
116  */
117 #define ZYD_FIRMWARE_START_ADDR	0xee00
118 #define ZYD_FIRMWARE_BASE_ADDR	0xee1d /* Firmware base address */
119 
120 /*
121  * EEPROM registers.
122  */
123 #define ZYD_EEPROM_START_HEAD	0xf800 /* EEPROM start */
124 #define ZYD_EEPROM_SUBID	0xf817
125 #define ZYD_EEPROM_POD		0xf819
126 #define ZYD_EEPROM_MAC_ADDR_P1	0xf81b /* Part 1 of the MAC address */
127 #define ZYD_EEPROM_MAC_ADDR_P2	0xf81d /* Part 2 of the MAC address */
128 #define ZYD_EEPROM_PWR_CAL	0xf81f /* Calibration */
129 #define ZYD_EEPROM_PWR_INT	0xf827 /* Calibration */
130 #define ZYD_EEPROM_ALLOWEDCHAN	0xf82f /* Allowed CH mask, 1 bit each */
131 #define ZYD_EEPROM_DEVICE_VER	0xf837 /* Device version */
132 #define ZYD_EEPROM_PHY_REG	0xf83c /* PHY registers */
133 #define ZYD_EEPROM_36M_CAL	0xf83f /* Calibration */
134 #define ZYD_EEPROM_11A_INT	0xf847 /* Interpolation */
135 #define ZYD_EEPROM_48M_CAL	0xf84f /* Calibration */
136 #define ZYD_EEPROM_48M_INT	0xf857 /* Interpolation */
137 #define ZYD_EEPROM_54M_CAL	0xf85f /* Calibration */
138 #define ZYD_EEPROM_54M_INT	0xf867 /* Interpolation */
139 
140 /*
141  * Firmware registers offsets (relative to fwbase).
142  */
143 #define ZYD_FW_FIRMWARE_REV	0x0000 /* Firmware version */
144 #define ZYD_FW_USB_SPEED	0x0001 /* USB speed (!=0 if highspeed) */
145 #define ZYD_FW_FIX_TX_RATE	0x0002 /* Fixed TX rate */
146 #define ZYD_FW_LINK_STATUS	0x0003
147 #define ZYD_FW_SOFT_RESET	0x0004
148 #define ZYD_FW_FLASH_CHK	0x0005
149 
150 /* possible flags for register ZYD_FW_LINK_STATUS */
151 #define ZYD_LED1		(1 << 8)
152 #define ZYD_LED2		(1 << 9)
153 
154 /*
155  * RF IDs.
156  */
157 #define ZYD_RF_UW2451		0x2	/* not supported yet */
158 #define ZYD_RF_UCHIP		0x3	/* not supported yet */
159 #define ZYD_RF_AL2230		0x4
160 #define ZYD_RF_AL7230B		0x5
161 #define ZYD_RF_THETA		0x6	/* not supported yet */
162 #define ZYD_RF_AL2210		0x7
163 #define ZYD_RF_MAXIM_NEW	0x8
164 #define ZYD_RF_GCT		0x9
165 #define ZYD_RF_AL2230S		0xa	/* not supported yet */
166 #define ZYD_RF_RALINK		0xb	/* not supported yet */
167 #define ZYD_RF_INTERSIL		0xc	/* not supported yet */
168 #define ZYD_RF_RFMD		0xd
169 #define ZYD_RF_MAXIM_NEW2	0xe
170 #define ZYD_RF_PHILIPS		0xf	/* not supported yet */
171 
172 /*
173  * PHY registers (8 bits, not documented).
174  */
175 #define ZYD_CR0			0x9000
176 #define ZYD_CR1			0x9004
177 #define ZYD_CR2			0x9008
178 #define ZYD_CR3			0x900c
179 #define ZYD_CR5			0x9010
180 #define ZYD_CR6			0x9014
181 #define ZYD_CR7			0x9018
182 #define ZYD_CR8			0x901c
183 #define ZYD_CR4			0x9020
184 #define ZYD_CR9			0x9024
185 #define ZYD_CR10		0x9028
186 #define ZYD_CR11		0x902c
187 #define ZYD_CR12		0x9030
188 #define ZYD_CR13		0x9034
189 #define ZYD_CR14		0x9038
190 #define ZYD_CR15		0x903c
191 #define ZYD_CR16		0x9040
192 #define ZYD_CR17		0x9044
193 #define ZYD_CR18		0x9048
194 #define ZYD_CR19		0x904c
195 #define ZYD_CR20		0x9050
196 #define ZYD_CR21		0x9054
197 #define ZYD_CR22		0x9058
198 #define ZYD_CR23		0x905c
199 #define ZYD_CR24		0x9060
200 #define ZYD_CR25		0x9064
201 #define ZYD_CR26		0x9068
202 #define ZYD_CR27		0x906c
203 #define ZYD_CR28		0x9070
204 #define ZYD_CR29		0x9074
205 #define ZYD_CR30		0x9078
206 #define ZYD_CR31		0x907c
207 #define ZYD_CR32		0x9080
208 #define ZYD_CR33		0x9084
209 #define ZYD_CR34		0x9088
210 #define ZYD_CR35		0x908c
211 #define ZYD_CR36		0x9090
212 #define ZYD_CR37		0x9094
213 #define ZYD_CR38		0x9098
214 #define ZYD_CR39		0x909c
215 #define ZYD_CR40		0x90a0
216 #define ZYD_CR41		0x90a4
217 #define ZYD_CR42		0x90a8
218 #define ZYD_CR43		0x90ac
219 #define ZYD_CR44		0x90b0
220 #define ZYD_CR45		0x90b4
221 #define ZYD_CR46		0x90b8
222 #define ZYD_CR47		0x90bc
223 #define ZYD_CR48		0x90c0
224 #define ZYD_CR49		0x90c4
225 #define ZYD_CR50		0x90c8
226 #define ZYD_CR51		0x90cc
227 #define ZYD_CR52		0x90d0
228 #define ZYD_CR53		0x90d4
229 #define ZYD_CR54		0x90d8
230 #define ZYD_CR55		0x90dc
231 #define ZYD_CR56		0x90e0
232 #define ZYD_CR57		0x90e4
233 #define ZYD_CR58		0x90e8
234 #define ZYD_CR59		0x90ec
235 #define ZYD_CR60		0x90f0
236 #define ZYD_CR61		0x90f4
237 #define ZYD_CR62		0x90f8
238 #define ZYD_CR63		0x90fc
239 #define ZYD_CR64		0x9100
240 #define ZYD_CR65		0x9104
241 #define ZYD_CR66		0x9108
242 #define ZYD_CR67		0x910c
243 #define ZYD_CR68		0x9110
244 #define ZYD_CR69		0x9114
245 #define ZYD_CR70		0x9118
246 #define ZYD_CR71		0x911c
247 #define ZYD_CR72		0x9120
248 #define ZYD_CR73		0x9124
249 #define ZYD_CR74		0x9128
250 #define ZYD_CR75		0x912c
251 #define ZYD_CR76		0x9130
252 #define ZYD_CR77		0x9134
253 #define ZYD_CR78		0x9138
254 #define ZYD_CR79		0x913c
255 #define ZYD_CR80		0x9140
256 #define ZYD_CR81		0x9144
257 #define ZYD_CR82		0x9148
258 #define ZYD_CR83		0x914c
259 #define ZYD_CR84		0x9150
260 #define ZYD_CR85		0x9154
261 #define ZYD_CR86		0x9158
262 #define ZYD_CR87		0x915c
263 #define ZYD_CR88		0x9160
264 #define ZYD_CR89		0x9164
265 #define ZYD_CR90		0x9168
266 #define ZYD_CR91		0x916c
267 #define ZYD_CR92		0x9170
268 #define ZYD_CR93		0x9174
269 #define ZYD_CR94		0x9178
270 #define ZYD_CR95		0x917c
271 #define ZYD_CR96		0x9180
272 #define ZYD_CR97		0x9184
273 #define ZYD_CR98		0x9188
274 #define ZYD_CR99		0x918c
275 #define ZYD_CR100		0x9190
276 #define ZYD_CR101		0x9194
277 #define ZYD_CR102		0x9198
278 #define ZYD_CR103		0x919c
279 #define ZYD_CR104		0x91a0
280 #define ZYD_CR105		0x91a4
281 #define ZYD_CR106		0x91a8
282 #define ZYD_CR107		0x91ac
283 #define ZYD_CR108		0x91b0
284 #define ZYD_CR109		0x91b4
285 #define ZYD_CR110		0x91b8
286 #define ZYD_CR111		0x91bc
287 #define ZYD_CR112		0x91c0
288 #define ZYD_CR113		0x91c4
289 #define ZYD_CR114		0x91c8
290 #define ZYD_CR115		0x91cc
291 #define ZYD_CR116		0x91d0
292 #define ZYD_CR117		0x91d4
293 #define ZYD_CR118		0x91d8
294 #define ZYD_CR119		0x91dc
295 #define ZYD_CR120		0x91e0
296 #define ZYD_CR121		0x91e4
297 #define ZYD_CR122		0x91e8
298 #define ZYD_CR123		0x91ec
299 #define ZYD_CR124		0x91f0
300 #define ZYD_CR125		0x91f4
301 #define ZYD_CR126		0x91f8
302 #define ZYD_CR127		0x91fc
303 #define ZYD_CR128		0x9200
304 #define ZYD_CR129		0x9204
305 #define ZYD_CR130		0x9208
306 #define ZYD_CR131		0x920c
307 #define ZYD_CR132		0x9210
308 #define ZYD_CR133		0x9214
309 #define ZYD_CR134		0x9218
310 #define ZYD_CR135		0x921c
311 #define ZYD_CR136		0x9220
312 #define ZYD_CR137		0x9224
313 #define ZYD_CR138		0x9228
314 #define ZYD_CR139		0x922c
315 #define ZYD_CR140		0x9230
316 #define ZYD_CR141		0x9234
317 #define ZYD_CR142		0x9238
318 #define ZYD_CR143		0x923c
319 #define ZYD_CR144		0x9240
320 #define ZYD_CR145		0x9244
321 #define ZYD_CR146		0x9248
322 #define ZYD_CR147		0x924c
323 #define ZYD_CR148		0x9250
324 #define ZYD_CR149		0x9254
325 #define ZYD_CR150		0x9258
326 #define ZYD_CR151		0x925c
327 #define ZYD_CR152		0x9260
328 #define ZYD_CR153		0x9264
329 #define ZYD_CR154		0x9268
330 #define ZYD_CR155		0x926c
331 #define ZYD_CR156		0x9270
332 #define ZYD_CR157		0x9274
333 #define ZYD_CR158		0x9278
334 #define ZYD_CR159		0x927c
335 #define ZYD_CR160		0x9280
336 #define ZYD_CR161		0x9284
337 #define ZYD_CR162		0x9288
338 #define ZYD_CR163		0x928c
339 #define ZYD_CR164		0x9290
340 #define ZYD_CR165		0x9294
341 #define ZYD_CR166		0x9298
342 #define ZYD_CR167		0x929c
343 #define ZYD_CR168		0x92a0
344 #define ZYD_CR169		0x92a4
345 #define ZYD_CR170		0x92a8
346 #define ZYD_CR171		0x92ac
347 #define ZYD_CR172		0x92b0
348 #define ZYD_CR173		0x92b4
349 #define ZYD_CR174		0x92b8
350 #define ZYD_CR175		0x92bc
351 #define ZYD_CR176		0x92c0
352 #define ZYD_CR177		0x92c4
353 #define ZYD_CR178		0x92c8
354 #define ZYD_CR179		0x92cc
355 #define ZYD_CR180		0x92d0
356 #define ZYD_CR181		0x92d4
357 #define ZYD_CR182		0x92d8
358 #define ZYD_CR183		0x92dc
359 #define ZYD_CR184		0x92e0
360 #define ZYD_CR185		0x92e4
361 #define ZYD_CR186		0x92e8
362 #define ZYD_CR187		0x92ec
363 #define ZYD_CR188		0x92f0
364 #define ZYD_CR189		0x92f4
365 #define ZYD_CR190		0x92f8
366 #define ZYD_CR191		0x92fc
367 #define ZYD_CR192		0x9300
368 #define ZYD_CR193		0x9304
369 #define ZYD_CR194		0x9308
370 #define ZYD_CR195		0x930c
371 #define ZYD_CR196		0x9310
372 #define ZYD_CR197		0x9314
373 #define ZYD_CR198		0x9318
374 #define ZYD_CR199		0x931c
375 #define ZYD_CR200		0x9320
376 #define ZYD_CR201		0x9324
377 #define ZYD_CR202		0x9328
378 #define ZYD_CR203		0x932c
379 #define ZYD_CR204		0x9330
380 #define ZYD_CR205		0x9334
381 #define ZYD_CR206		0x9338
382 #define ZYD_CR207		0x933c
383 #define ZYD_CR208		0x9340
384 #define ZYD_CR209		0x9344
385 #define ZYD_CR210		0x9348
386 #define ZYD_CR211		0x934c
387 #define ZYD_CR212		0x9350
388 #define ZYD_CR213		0x9354
389 #define ZYD_CR214		0x9358
390 #define ZYD_CR215		0x935c
391 #define ZYD_CR216		0x9360
392 #define ZYD_CR217		0x9364
393 #define ZYD_CR218		0x9368
394 #define ZYD_CR219		0x936c
395 #define ZYD_CR220		0x9370
396 #define ZYD_CR221		0x9374
397 #define ZYD_CR222		0x9378
398 #define ZYD_CR223		0x937c
399 #define ZYD_CR224		0x9380
400 #define ZYD_CR225		0x9384
401 #define ZYD_CR226		0x9388
402 #define ZYD_CR227		0x938c
403 #define ZYD_CR228		0x9390
404 #define ZYD_CR229		0x9394
405 #define ZYD_CR230		0x9398
406 #define ZYD_CR231		0x939c
407 #define ZYD_CR232		0x93a0
408 #define ZYD_CR233		0x93a4
409 #define ZYD_CR234		0x93a8
410 #define ZYD_CR235		0x93ac
411 #define ZYD_CR236		0x93b0
412 #define ZYD_CR240		0x93c0
413 #define ZYD_CR241		0x93c4
414 #define ZYD_CR242		0x93c8
415 #define ZYD_CR243		0x93cc
416 #define ZYD_CR244		0x93d0
417 #define ZYD_CR245		0x93d4
418 #define ZYD_CR251		0x93ec
419 #define ZYD_CR252		0x93f0
420 #define ZYD_CR253		0x93f4
421 #define ZYD_CR254		0x93f8
422 #define ZYD_CR255		0x93fc
423 
424 /* copied nearly verbatim from the Linux driver rewrite */
425 #define	ZYD_DEF_PHY							\
426 {									\
427 	{ ZYD_CR0,   0x0a }, { ZYD_CR1,   0x06 }, { ZYD_CR2,   0x26 },	\
428 	{ ZYD_CR3,   0x38 }, { ZYD_CR4,   0x80 }, { ZYD_CR9,   0xa0 },	\
429 	{ ZYD_CR10,  0x81 }, { ZYD_CR11,  0x00 }, { ZYD_CR12,  0x7f },	\
430 	{ ZYD_CR13,  0x8c }, { ZYD_CR14,  0x80 }, { ZYD_CR15,  0x3d },	\
431 	{ ZYD_CR16,  0x20 }, { ZYD_CR17,  0x1e }, { ZYD_CR18,  0x0a },	\
432 	{ ZYD_CR19,  0x48 }, { ZYD_CR20,  0x0c }, { ZYD_CR21,  0x0c },	\
433 	{ ZYD_CR22,  0x23 }, { ZYD_CR23,  0x90 }, { ZYD_CR24,  0x14 },	\
434 	{ ZYD_CR25,  0x40 }, { ZYD_CR26,  0x10 }, { ZYD_CR27,  0x19 },	\
435 	{ ZYD_CR28,  0x7f }, { ZYD_CR29,  0x80 }, { ZYD_CR30,  0x4b },	\
436 	{ ZYD_CR31,  0x60 }, { ZYD_CR32,  0x43 }, { ZYD_CR33,  0x08 },	\
437 	{ ZYD_CR34,  0x06 }, { ZYD_CR35,  0x0a }, { ZYD_CR36,  0x00 },	\
438 	{ ZYD_CR37,  0x00 }, { ZYD_CR38,  0x38 }, { ZYD_CR39,  0x0c },	\
439 	{ ZYD_CR40,  0x84 }, { ZYD_CR41,  0x2a }, { ZYD_CR42,  0x80 },	\
440 	{ ZYD_CR43,  0x10 }, { ZYD_CR44,  0x12 }, { ZYD_CR46,  0xff },	\
441 	{ ZYD_CR47,  0x1e }, { ZYD_CR48,  0x26 }, { ZYD_CR49,  0x5b },	\
442 	{ ZYD_CR64,  0xd0 }, { ZYD_CR65,  0x04 }, { ZYD_CR66,  0x58 },	\
443 	{ ZYD_CR67,  0xc9 }, { ZYD_CR68,  0x88 }, { ZYD_CR69,  0x41 },	\
444 	{ ZYD_CR70,  0x23 }, { ZYD_CR71,  0x10 }, { ZYD_CR72,  0xff },	\
445 	{ ZYD_CR73,  0x32 }, { ZYD_CR74,  0x30 }, { ZYD_CR75,  0x65 },	\
446 	{ ZYD_CR76,  0x41 }, { ZYD_CR77,  0x1b }, { ZYD_CR78,  0x30 },	\
447 	{ ZYD_CR79,  0x68 }, { ZYD_CR80,  0x64 }, { ZYD_CR81,  0x64 },	\
448 	{ ZYD_CR82,  0x00 }, { ZYD_CR83,  0x00 }, { ZYD_CR84,  0x00 },	\
449 	{ ZYD_CR85,  0x02 }, { ZYD_CR86,  0x00 }, { ZYD_CR87,  0x00 },	\
450 	{ ZYD_CR88,  0xff }, { ZYD_CR89,  0xfc }, { ZYD_CR90,  0x00 },	\
451 	{ ZYD_CR91,  0x00 }, { ZYD_CR92,  0x00 }, { ZYD_CR93,  0x08 },	\
452 	{ ZYD_CR94,  0x00 }, { ZYD_CR95,  0x00 }, { ZYD_CR96,  0xff },	\
453 	{ ZYD_CR97,  0xe7 }, { ZYD_CR98,  0x00 }, { ZYD_CR99,  0x00 },	\
454 	{ ZYD_CR100, 0x00 }, { ZYD_CR101, 0xae }, { ZYD_CR102, 0x02 },	\
455 	{ ZYD_CR103, 0x00 }, { ZYD_CR104, 0x03 }, { ZYD_CR105, 0x65 },	\
456 	{ ZYD_CR106, 0x04 }, { ZYD_CR107, 0x00 }, { ZYD_CR108, 0x0a },	\
457 	{ ZYD_CR109, 0xaa }, { ZYD_CR110, 0xaa }, { ZYD_CR111, 0x25 },	\
458 	{ ZYD_CR112, 0x25 }, { ZYD_CR113, 0x00 }, { ZYD_CR119, 0x1e },	\
459 	{ ZYD_CR125, 0x90 }, { ZYD_CR126, 0x00 }, { ZYD_CR127, 0x00 },	\
460 	{ ZYD_CR5,   0x00 }, { ZYD_CR6,   0x00 }, { ZYD_CR7,   0x00 },	\
461 	{ ZYD_CR8,   0x00 }, { ZYD_CR9,   0x20 }, { ZYD_CR12,  0xf0 },	\
462 	{ ZYD_CR20,  0x0e }, { ZYD_CR21,  0x0e }, { ZYD_CR27,  0x10 },	\
463 	{ ZYD_CR44,  0x33 }, { ZYD_CR47,  0x1E }, { ZYD_CR83,  0x24 },	\
464 	{ ZYD_CR84,  0x04 }, { ZYD_CR85,  0x00 }, { ZYD_CR86,  0x0C },	\
465 	{ ZYD_CR87,  0x12 }, { ZYD_CR88,  0x0C }, { ZYD_CR89,  0x00 },	\
466 	{ ZYD_CR90,  0x10 }, { ZYD_CR91,  0x08 }, { ZYD_CR93,  0x00 },	\
467 	{ ZYD_CR94,  0x01 }, { ZYD_CR95,  0x00 }, { ZYD_CR96,  0x50 },	\
468 	{ ZYD_CR97,  0x37 }, { ZYD_CR98,  0x35 }, { ZYD_CR101, 0x13 },	\
469 	{ ZYD_CR102, 0x27 }, { ZYD_CR103, 0x27 }, { ZYD_CR104, 0x18 },	\
470 	{ ZYD_CR105, 0x12 }, { ZYD_CR109, 0x27 }, { ZYD_CR110, 0x27 },	\
471 	{ ZYD_CR111, 0x27 }, { ZYD_CR112, 0x27 }, { ZYD_CR113, 0x27 },	\
472 	{ ZYD_CR114, 0x27 }, { ZYD_CR115, 0x26 }, { ZYD_CR116, 0x24 },	\
473 	{ ZYD_CR117, 0xfc }, { ZYD_CR118, 0xfa }, { ZYD_CR120, 0x4f },	\
474 	{ ZYD_CR125, 0xaa }, { ZYD_CR127, 0x03 }, { ZYD_CR128, 0x14 },	\
475 	{ ZYD_CR129, 0x12 }, { ZYD_CR130, 0x10 }, { ZYD_CR131, 0x0C },	\
476 	{ ZYD_CR136, 0xdf }, { ZYD_CR137, 0x40 }, { ZYD_CR138, 0xa0 },	\
477 	{ ZYD_CR139, 0xb0 }, { ZYD_CR140, 0x99 }, { ZYD_CR141, 0x82 },	\
478 	{ ZYD_CR142, 0x54 }, { ZYD_CR143, 0x1c }, { ZYD_CR144, 0x6c },	\
479 	{ ZYD_CR147, 0x07 }, { ZYD_CR148, 0x4c }, { ZYD_CR149, 0x50 },	\
480 	{ ZYD_CR150, 0x0e }, { ZYD_CR151, 0x18 }, { ZYD_CR160, 0xfe },	\
481 	{ ZYD_CR161, 0xee }, { ZYD_CR162, 0xaa }, { ZYD_CR163, 0xfa },	\
482 	{ ZYD_CR164, 0xfa }, { ZYD_CR165, 0xea }, { ZYD_CR166, 0xbe },	\
483 	{ ZYD_CR167, 0xbe }, { ZYD_CR168, 0x6a }, { ZYD_CR169, 0xba },	\
484 	{ ZYD_CR170, 0xba }, { ZYD_CR171, 0xba }, { ZYD_CR204, 0x7d },	\
485 	{ ZYD_CR203, 0x30 }, { 0, 0}					\
486 }
487 
488 #define ZYD_DEF_PHYB							\
489 {									\
490 	{ ZYD_CR0,   0x14 }, { ZYD_CR1,   0x06 }, { ZYD_CR2,   0x26 },	\
491 	{ ZYD_CR3,   0x38 }, { ZYD_CR4,   0x80 }, { ZYD_CR9,   0xe0 },	\
492 	{ ZYD_CR10,  0x81 }, { ZYD_CR11,  0x00 }, { ZYD_CR12,  0xf0 },	\
493 	{ ZYD_CR13,  0x8c }, { ZYD_CR14,  0x80 }, { ZYD_CR15,  0x3d },	\
494 	{ ZYD_CR16,  0x20 }, { ZYD_CR17,  0x1e }, { ZYD_CR18,  0x0a },	\
495 	{ ZYD_CR19,  0x48 }, { ZYD_CR20,  0x10 }, { ZYD_CR21,  0x0e },	\
496 	{ ZYD_CR22,  0x23 }, { ZYD_CR23,  0x90 }, { ZYD_CR24,  0x14 },	\
497 	{ ZYD_CR25,  0x40 }, { ZYD_CR26,  0x10 }, { ZYD_CR27,  0x10 },	\
498 	{ ZYD_CR28,  0x7f }, { ZYD_CR29,  0x80 }, { ZYD_CR30,  0x4b },	\
499 	{ ZYD_CR31,  0x60 }, { ZYD_CR32,  0x43 }, { ZYD_CR33,  0x08 },	\
500 	{ ZYD_CR34,  0x06 }, { ZYD_CR35,  0x0a }, { ZYD_CR36,  0x00 },	\
501 	{ ZYD_CR37,  0x00 }, { ZYD_CR38,  0x38 }, { ZYD_CR39,  0x0c },	\
502 	{ ZYD_CR40,  0x84 }, { ZYD_CR41,  0x2a }, { ZYD_CR42,  0x80 },	\
503 	{ ZYD_CR43,  0x10 }, { ZYD_CR44,  0x33 }, { ZYD_CR46,  0xff },	\
504 	{ ZYD_CR47,  0x1E }, { ZYD_CR48,  0x26 }, { ZYD_CR49,  0x5b },	\
505 	{ ZYD_CR64,  0xd0 }, { ZYD_CR65,  0x04 }, { ZYD_CR66,  0x58 },	\
506 	{ ZYD_CR67,  0xc9 }, { ZYD_CR68,  0x88 }, { ZYD_CR69,  0x41 },	\
507 	{ ZYD_CR70,  0x23 }, { ZYD_CR71,  0x10 }, { ZYD_CR72,  0xff },	\
508 	{ ZYD_CR73,  0x32 }, { ZYD_CR74,  0x30 }, { ZYD_CR75,  0x65 },	\
509 	{ ZYD_CR76,  0x41 }, { ZYD_CR77,  0x1b }, { ZYD_CR78,  0x30 },	\
510 	{ ZYD_CR79,  0xf0 }, { ZYD_CR80,  0x64 }, { ZYD_CR81,  0x64 },	\
511 	{ ZYD_CR82,  0x00 }, { ZYD_CR83,  0x24 }, { ZYD_CR84,  0x04 },	\
512 	{ ZYD_CR85,  0x00 }, { ZYD_CR86,  0x0c }, { ZYD_CR87,  0x12 },	\
513 	{ ZYD_CR88,  0x0c }, { ZYD_CR89,  0x00 }, { ZYD_CR90,  0x58 },	\
514 	{ ZYD_CR91,  0x04 }, { ZYD_CR92,  0x00 }, { ZYD_CR93,  0x00 },	\
515 	{ ZYD_CR94,  0x01 }, { ZYD_CR95,  0x20 }, { ZYD_CR96,  0x50 },	\
516 	{ ZYD_CR97,  0x37 }, { ZYD_CR98,  0x35 }, { ZYD_CR99,  0x00 },	\
517 	{ ZYD_CR100, 0x01 }, { ZYD_CR101, 0x13 }, { ZYD_CR102, 0x27 },	\
518 	{ ZYD_CR103, 0x27 }, { ZYD_CR104, 0x18 }, { ZYD_CR105, 0x12 },	\
519 	{ ZYD_CR106, 0x04 }, { ZYD_CR107, 0x00 }, { ZYD_CR108, 0x0a },	\
520 	{ ZYD_CR109, 0x27 }, { ZYD_CR110, 0x27 }, { ZYD_CR111, 0x27 },	\
521 	{ ZYD_CR112, 0x27 }, { ZYD_CR113, 0x27 }, { ZYD_CR114, 0x27 },	\
522 	{ ZYD_CR115, 0x26 }, { ZYD_CR116, 0x24 }, { ZYD_CR117, 0xfc },	\
523 	{ ZYD_CR118, 0xfa }, { ZYD_CR119, 0x1e }, { ZYD_CR125, 0x90 },	\
524 	{ ZYD_CR126, 0x00 }, { ZYD_CR127, 0x00 }, { ZYD_CR128, 0x14 },	\
525 	{ ZYD_CR129, 0x12 }, { ZYD_CR130, 0x10 }, { ZYD_CR131, 0x0c },	\
526 	{ ZYD_CR136, 0xdf }, { ZYD_CR137, 0xa0 }, { ZYD_CR138, 0xa8 },	\
527 	{ ZYD_CR139, 0xb4 }, { ZYD_CR140, 0x98 }, { ZYD_CR141, 0x82 },	\
528 	{ ZYD_CR142, 0x53 }, { ZYD_CR143, 0x1c }, { ZYD_CR144, 0x6c },	\
529 	{ ZYD_CR147, 0x07 }, { ZYD_CR148, 0x40 }, { ZYD_CR149, 0x40 },	\
530 	{ ZYD_CR150, 0x14 }, { ZYD_CR151, 0x18 }, { ZYD_CR159, 0x70 },	\
531 	{ ZYD_CR160, 0xfe }, { ZYD_CR161, 0xee }, { ZYD_CR162, 0xaa },	\
532 	{ ZYD_CR163, 0xfa }, { ZYD_CR164, 0xfa }, { ZYD_CR165, 0xea },	\
533 	{ ZYD_CR166, 0xbe }, { ZYD_CR167, 0xbe }, { ZYD_CR168, 0x6a },	\
534 	{ ZYD_CR169, 0xba }, { ZYD_CR170, 0xba }, { ZYD_CR171, 0xba },	\
535 	{ ZYD_CR204, 0x7d }, { ZYD_CR203, 0x30 },			\
536 	{ 0, 0 }							\
537 }
538 
539 #define ZYD_RFMD_PHY							\
540 {									\
541 	{ ZYD_CR2,   0x1e }, { ZYD_CR9,   0x20 }, { ZYD_CR10,  0x89 },	\
542 	{ ZYD_CR11,  0x00 }, { ZYD_CR15,  0xd0 }, { ZYD_CR17,  0x68 },	\
543 	{ ZYD_CR19,  0x4a }, { ZYD_CR20,  0x0c }, { ZYD_CR21,  0x0e },	\
544 	{ ZYD_CR23,  0x48 }, { ZYD_CR24,  0x14 }, { ZYD_CR26,  0x90 },	\
545 	{ ZYD_CR27,  0x30 }, { ZYD_CR29,  0x20 }, { ZYD_CR31,  0xb2 },	\
546 	{ ZYD_CR32,  0x43 }, { ZYD_CR33,  0x28 }, { ZYD_CR38,  0x30 },	\
547 	{ ZYD_CR34,  0x0f }, { ZYD_CR35,  0xf0 }, { ZYD_CR41,  0x2a },	\
548 	{ ZYD_CR46,  0x7f }, { ZYD_CR47,  0x1e }, { ZYD_CR51,  0xc5 },	\
549 	{ ZYD_CR52,  0xc5 }, { ZYD_CR53,  0xc5 }, { ZYD_CR79,  0x58 },	\
550 	{ ZYD_CR80,  0x30 }, { ZYD_CR81,  0x30 }, { ZYD_CR82,  0x00 },	\
551 	{ ZYD_CR83,  0x24 }, { ZYD_CR84,  0x04 }, { ZYD_CR85,  0x00 },	\
552 	{ ZYD_CR86,  0x10 }, { ZYD_CR87,  0x2a }, { ZYD_CR88,  0x10 },	\
553 	{ ZYD_CR89,  0x24 }, { ZYD_CR90,  0x18 }, { ZYD_CR91,  0x00 },	\
554 	{ ZYD_CR92,  0x0a }, { ZYD_CR93,  0x00 }, { ZYD_CR94,  0x01 },	\
555 	{ ZYD_CR95,  0x00 }, { ZYD_CR96,  0x40 }, { ZYD_CR97,  0x37 },	\
556 	{ ZYD_CR98,  0x05 }, { ZYD_CR99,  0x28 }, { ZYD_CR100, 0x00 },	\
557 	{ ZYD_CR101, 0x13 }, { ZYD_CR102, 0x27 }, { ZYD_CR103, 0x27 },	\
558 	{ ZYD_CR104, 0x18 }, { ZYD_CR105, 0x12 }, { ZYD_CR106, 0x1a },	\
559 	{ ZYD_CR107, 0x24 }, { ZYD_CR108, 0x0a }, { ZYD_CR109, 0x13 },	\
560 	{ ZYD_CR110, 0x2f }, { ZYD_CR111, 0x27 }, { ZYD_CR112, 0x27 },	\
561 	{ ZYD_CR113, 0x27 }, { ZYD_CR114, 0x27 }, { ZYD_CR115, 0x40 },	\
562 	{ ZYD_CR116, 0x40 }, { ZYD_CR117, 0xf0 }, { ZYD_CR118, 0xf0 },	\
563 	{ ZYD_CR119, 0x16 }, { ZYD_CR122, 0x00 }, { ZYD_CR127, 0x03 },	\
564 	{ ZYD_CR131, 0x08 }, { ZYD_CR138, 0x28 }, { ZYD_CR148, 0x44 },	\
565 	{ ZYD_CR150, 0x10 }, { ZYD_CR169, 0xbb }, { ZYD_CR170, 0xbb }	\
566 }
567 
568 #define ZYD_RFMD_RF							\
569 {									\
570 	0x000007, 0x07dd43, 0x080959, 0x0e6666, 0x116a57, 0x17dd43,	\
571 	0x1819f9, 0x1e6666, 0x214554, 0x25e7fa, 0x27fffa, 0x294128,	\
572 	0x2c0000, 0x300000, 0x340000, 0x381e0f, 0x6c180f		\
573 }
574 
575 #define ZYD_RFMD_CHANTABLE	\
576 {				\
577 	{ 0x181979, 0x1e6666 },	\
578 	{ 0x181989, 0x1e6666 },	\
579 	{ 0x181999, 0x1e6666 },	\
580 	{ 0x1819a9, 0x1e6666 },	\
581 	{ 0x1819b9, 0x1e6666 },	\
582 	{ 0x1819c9, 0x1e6666 },	\
583 	{ 0x1819d9, 0x1e6666 },	\
584 	{ 0x1819e9, 0x1e6666 },	\
585 	{ 0x1819f9, 0x1e6666 },	\
586 	{ 0x181a09, 0x1e6666 },	\
587 	{ 0x181a19, 0x1e6666 },	\
588 	{ 0x181a29, 0x1e6666 },	\
589 	{ 0x181a39, 0x1e6666 },	\
590 	{ 0x181a60, 0x1c0000 }	\
591 }
592 
593 #define ZYD_AL2230_PHY							\
594 {									\
595 	{ ZYD_CR15,  0x20 }, { ZYD_CR23,  0x40 }, { ZYD_CR24,  0x20 },	\
596 	{ ZYD_CR26,  0x11 }, { ZYD_CR28,  0x3e }, { ZYD_CR29,  0x00 },	\
597 	{ ZYD_CR44,  0x33 }, { ZYD_CR106, 0x2a }, { ZYD_CR107, 0x1a },	\
598 	{ ZYD_CR109, 0x09 }, { ZYD_CR110, 0x27 }, { ZYD_CR111, 0x2b },	\
599 	{ ZYD_CR112, 0x2b }, { ZYD_CR119, 0x0a }, { ZYD_CR10,  0x89 },	\
600 	{ ZYD_CR17,  0x28 }, { ZYD_CR26,  0x93 }, { ZYD_CR34,  0x30 },	\
601 	{ ZYD_CR35,  0x3e }, { ZYD_CR41,  0x24 }, { ZYD_CR44,  0x32 },	\
602 	{ ZYD_CR46,  0x96 }, { ZYD_CR47,  0x1e }, { ZYD_CR79,  0x58 },	\
603 	{ ZYD_CR80,  0x30 }, { ZYD_CR81,  0x30 }, { ZYD_CR87,  0x0a },	\
604 	{ ZYD_CR89,  0x04 }, { ZYD_CR92,  0x0a }, { ZYD_CR99,  0x28 },	\
605 	{ ZYD_CR100, 0x00 }, { ZYD_CR101, 0x13 }, { ZYD_CR102, 0x27 },	\
606 	{ ZYD_CR106, 0x24 }, { ZYD_CR107, 0x2a }, { ZYD_CR109, 0x09 },	\
607 	{ ZYD_CR110, 0x13 }, { ZYD_CR111, 0x1f }, { ZYD_CR112, 0x1f },	\
608 	{ ZYD_CR113, 0x27 }, { ZYD_CR114, 0x27 }, { ZYD_CR115, 0x24 },	\
609 	{ ZYD_CR116, 0x24 }, { ZYD_CR117, 0xf4 }, { ZYD_CR118, 0xfc },	\
610 	{ ZYD_CR119, 0x10 }, { ZYD_CR120, 0x4f }, { ZYD_CR121, 0x77 },	\
611 	{ ZYD_CR122, 0xe0 }, { ZYD_CR137, 0x88 }, { ZYD_CR252, 0xff },	\
612 	{ ZYD_CR253, 0xff }, { ZYD_CR251, 0x2f }, { ZYD_CR251, 0x3f },	\
613 	{ ZYD_CR138, 0x28 }, { ZYD_CR203, 0x06 } 			\
614 }
615 
616 #define ZYD_AL2230_PHY_B						\
617 {									\
618 	{ ZYD_CR10,  0x89 }, { ZYD_CR15,  0x20 }, { ZYD_CR17,  0x2B },	\
619 	{ ZYD_CR23,  0x40 }, { ZYD_CR24,  0x20 }, { ZYD_CR26,  0x93 },	\
620 	{ ZYD_CR28,  0x3e }, { ZYD_CR29,  0x00 }, { ZYD_CR33,  0x28 },	\
621 	{ ZYD_CR34,  0x30 }, { ZYD_CR35,  0x3e }, { ZYD_CR41,  0x24 },	\
622 	{ ZYD_CR44,  0x32 }, { ZYD_CR46,  0x99 }, { ZYD_CR47,  0x1e },	\
623 	{ ZYD_CR48,  0x06 }, { ZYD_CR49,  0xf9 }, { ZYD_CR51,  0x01 },	\
624 	{ ZYD_CR52,  0x80 }, { ZYD_CR53,  0x7e }, { ZYD_CR65,  0x00 },	\
625 	{ ZYD_CR66,  0x00 }, { ZYD_CR67,  0x00 }, { ZYD_CR68,  0x00 },	\
626 	{ ZYD_CR69,  0x28 }, { ZYD_CR79,  0x58 }, { ZYD_CR80,  0x30 },	\
627 	{ ZYD_CR81,  0x30 }, { ZYD_CR87,  0x0a }, { ZYD_CR89,  0x04 },	\
628 	{ ZYD_CR91,  0x00 }, { ZYD_CR92,  0x0a }, { ZYD_CR98,  0x8d },	\
629 	{ ZYD_CR99,  0x00 }, { ZYD_CR101, 0x13 }, { ZYD_CR102, 0x27 },	\
630 	{ ZYD_CR106, 0x24 }, { ZYD_CR107, 0x2a }, { ZYD_CR109, 0x13 },	\
631 	{ ZYD_CR110, 0x1f }, { ZYD_CR111, 0x1f }, { ZYD_CR112, 0x1f },	\
632 	{ ZYD_CR113, 0x27 }, { ZYD_CR114, 0x27 }, { ZYD_CR115, 0x26 },	\
633 	{ ZYD_CR116, 0x24 }, { ZYD_CR117, 0xfa }, { ZYD_CR118, 0xfa },	\
634 	{ ZYD_CR119, 0x10 }, { ZYD_CR120, 0x4f }, { ZYD_CR121, 0x6c },	\
635 	{ ZYD_CR122, 0xfc }, { ZYD_CR123, 0x57 }, { ZYD_CR125, 0xad },	\
636 	{ ZYD_CR126, 0x6c }, { ZYD_CR127, 0x03 }, { ZYD_CR137, 0x50 },	\
637 	{ ZYD_CR138, 0xa8 }, { ZYD_CR144, 0xac }, { ZYD_CR150, 0x0d },	\
638 	{ ZYD_CR252, 0x34 }, { ZYD_CR253, 0x34 }			\
639 }
640 
641 #define ZYD_AL2230_PHY_PART1						\
642 {									\
643 	{ ZYD_CR240, 0x57 }, { ZYD_CR9,   0xe0 }			\
644 }
645 
646 #define ZYD_AL2230_PHY_PART2						\
647 {									\
648 	{ ZYD_CR251, 0x2f }, { ZYD_CR251, 0x7f },			\
649 }
650 
651 #define ZYD_AL2230_PHY_PART3						\
652 {									\
653 	{ ZYD_CR128, 0x14 }, { ZYD_CR129, 0x12 }, { ZYD_CR130, 0x10 },	\
654 }
655 
656 #define	ZYD_AL2230S_PHY_INIT						\
657 {									\
658 	{ ZYD_CR47,  0x1e }, { ZYD_CR106, 0x22 }, { ZYD_CR107, 0x2a },	\
659 	{ ZYD_CR109, 0x13 }, { ZYD_CR118, 0xf8 }, { ZYD_CR119, 0x12 },	\
660 	{ ZYD_CR122, 0xe0 }, { ZYD_CR128, 0x10 }, { ZYD_CR129, 0x0e },	\
661 	{ ZYD_CR130, 0x10 }						\
662 }
663 
664 #define	ZYD_AL2230_PHY_FINI_PART1					\
665 {									\
666 	{ ZYD_CR80,  0x30 }, { ZYD_CR81,  0x30 }, { ZYD_CR79,  0x58 },	\
667 	{ ZYD_CR12,  0xf0 }, { ZYD_CR77,  0x1b }, { ZYD_CR78,  0x58 },	\
668 	{ ZYD_CR203, 0x06 }, { ZYD_CR240, 0x80 },			\
669 }
670 
671 #define ZYD_AL2230_RF_PART1						\
672 {									\
673 	0x03f790, 0x033331, 0x00000d, 0x0b3331, 0x03b812, 0x00fff3	\
674 }
675 
676 #define ZYD_AL2230_RF_PART2						\
677 {									\
678 	0x000da4, 0x0f4dc5, 0x0805b6, 0x011687, 0x000688, 0x0403b9,	\
679 	0x00dbba, 0x00099b, 0x0bdffc, 0x00000d, 0x00500f		\
680 }
681 
682 #define ZYD_AL2230_RF_PART3						\
683 {									\
684 	0x00d00f, 0x004c0f, 0x00540f, 0x00700f, 0x00500f		\
685 }
686 
687 #define ZYD_AL2230_RF_B							\
688 {									\
689 	0x03f790, 0x033331, 0x00000d, 0x0b3331, 0x03b812, 0x00fff3,	\
690 	0x0005a4, 0x0f4dc5, 0x0805b6, 0x0146c7, 0x000688, 0x0403b9,	\
691 	0x00dbba, 0x00099b, 0x0bdffc, 0x00000d, 0x00580f		\
692 }
693 
694 #define ZYD_AL2230_RF_B_PART1						\
695 {									\
696 	0x8cccd0, 0x481dc0, 0xcfff00, 0x25a000				\
697 }
698 
699 #define ZYD_AL2230_RF_B_PART2						\
700 {									\
701 	0x25a000, 0xa3b2f0, 0x6da010, 0xe36280, 0x116000, 0x9dc020,	\
702 	0x5ddb00, 0xd99000, 0x3ffbd0, 0xb00000, 0xf01a00		\
703 }
704 
705 #define ZYD_AL2230_RF_B_PART3						\
706 {									\
707 	0xf01b00, 0xf01e00, 0xf01a00					\
708 }
709 
710 #define ZYD_AL2230_CHANTABLE			\
711 {						\
712 	{ 0x03f790, 0x033331, 0x00000d },	\
713 	{ 0x03f790, 0x0b3331, 0x00000d },	\
714 	{ 0x03e790, 0x033331, 0x00000d },	\
715 	{ 0x03e790, 0x0b3331, 0x00000d },	\
716 	{ 0x03f7a0, 0x033331, 0x00000d },	\
717 	{ 0x03f7a0, 0x0b3331, 0x00000d },	\
718 	{ 0x03e7a0, 0x033331, 0x00000d },	\
719 	{ 0x03e7a0, 0x0b3331, 0x00000d },	\
720 	{ 0x03f7b0, 0x033331, 0x00000d },	\
721 	{ 0x03f7b0, 0x0b3331, 0x00000d },	\
722 	{ 0x03e7b0, 0x033331, 0x00000d },	\
723 	{ 0x03e7b0, 0x0b3331, 0x00000d },	\
724 	{ 0x03f7c0, 0x033331, 0x00000d },	\
725 	{ 0x03e7c0, 0x066661, 0x00000d }	\
726 }
727 
728 #define ZYD_AL2230_CHANTABLE_B			\
729 {						\
730 	{ 0x09efc0, 0x8cccc0, 0xb00000 },	\
731 	{ 0x09efc0, 0x8cccd0, 0xb00000 },	\
732 	{ 0x09e7c0, 0x8cccc0, 0xb00000 },	\
733 	{ 0x09e7c0, 0x8cccd0, 0xb00000 },	\
734 	{ 0x05efc0, 0x8cccc0, 0xb00000 },	\
735 	{ 0x05efc0, 0x8cccd0, 0xb00000 },	\
736 	{ 0x05e7c0, 0x8cccc0, 0xb00000 },	\
737 	{ 0x05e7c0, 0x8cccd0, 0xb00000 },	\
738 	{ 0x0defc0, 0x8cccc0, 0xb00000 },	\
739 	{ 0x0defc0, 0x8cccd0, 0xb00000 },	\
740 	{ 0x0de7c0, 0x8cccc0, 0xb00000 },	\
741 	{ 0x0de7c0, 0x8cccd0, 0xb00000 },	\
742 	{ 0x03efc0, 0x8cccc0, 0xb00000 },	\
743 	{ 0x03e7c0, 0x866660, 0xb00000 }	\
744 }
745 
746 #define ZYD_AL7230B_PHY_1							\
747 {									\
748 	{ ZYD_CR240, 0x57 }, { ZYD_CR15,  0x20 }, { ZYD_CR23,  0x40 },	\
749 	{ ZYD_CR24,  0x20 }, { ZYD_CR26,  0x11 }, { ZYD_CR28,  0x3e },	\
750 	{ ZYD_CR29,  0x00 }, { ZYD_CR44,  0x33 }, { ZYD_CR106, 0x22 },	\
751 	{ ZYD_CR107, 0x1a }, { ZYD_CR109, 0x09 }, { ZYD_CR110, 0x27 },	\
752 	{ ZYD_CR111, 0x2b }, { ZYD_CR112, 0x2b }, { ZYD_CR119, 0x0a },	\
753 	{ ZYD_CR122, 0xfc }, { ZYD_CR10,  0x89 }, { ZYD_CR17,  0x28 },	\
754 	{ ZYD_CR26,  0x93 }, { ZYD_CR34,  0x30 }, { ZYD_CR35,  0x3e },	\
755 	{ ZYD_CR41,  0x24 }, { ZYD_CR44,  0x32 }, { ZYD_CR46,  0x96 },	\
756 	{ ZYD_CR47,  0x1e }, { ZYD_CR79,  0x58 }, { ZYD_CR80,  0x30 },	\
757 	{ ZYD_CR81,  0x30 }, { ZYD_CR87,  0x0a }, { ZYD_CR89,  0x04 },	\
758 	{ ZYD_CR92,  0x0a }, { ZYD_CR99,  0x28 }, { ZYD_CR100, 0x02 },	\
759 	{ ZYD_CR101, 0x13 }, { ZYD_CR102, 0x27 }, { ZYD_CR106, 0x22 },	\
760 	{ ZYD_CR107, 0x3f }, { ZYD_CR109, 0x09 }, { ZYD_CR110, 0x1f },	\
761 	{ ZYD_CR111, 0x1f }, { ZYD_CR112, 0x1f }, { ZYD_CR113, 0x27 },	\
762 	{ ZYD_CR114, 0x27 }, { ZYD_CR115, 0x24 }, { ZYD_CR116, 0x3f },	\
763 	{ ZYD_CR117, 0xfa }, { ZYD_CR118, 0xfc }, { ZYD_CR119, 0x10 },	\
764 	{ ZYD_CR120, 0x4f }, { ZYD_CR121, 0x77 }, { ZYD_CR137, 0x88 },	\
765 	{ ZYD_CR138, 0xa8 }, { ZYD_CR252, 0x34 }, { ZYD_CR253, 0x34 },	\
766 	{ ZYD_CR251, 0x2f }						\
767 }
768 
769 #define ZYD_AL7230B_PHY_2						\
770 {									\
771 	{ ZYD_CR251, 0x3f }, { ZYD_CR128, 0x14 }, { ZYD_CR129, 0x12 },	\
772 	{ ZYD_CR130, 0x10 }, { ZYD_CR38,  0x38 }, { ZYD_CR136, 0xdf }	\
773 }
774 
775 #define ZYD_AL7230B_PHY_3						\
776 {									\
777 	{ ZYD_CR203, 0x06 }, { ZYD_CR240, 0x80 }			\
778 }
779 
780 #define ZYD_AL7230B_RF_1						\
781 {									\
782 	0x09ec04, 0x8cccc8, 0x4ff821, 0xc5fbfc, 0x21ebfe, 0xafd401,	\
783 	0x6cf56a, 0xe04073, 0x193d76, 0x9dd844, 0x500007, 0xd8c010,	\
784 	0x3c9000, 0xbfffff, 0x700000, 0xf15d58				\
785 }
786 
787 #define ZYD_AL7230B_RF_2						\
788 {									\
789 	0xf15d59, 0xf15d5c, 0xf15d58					\
790 }
791 
792 #define ZYD_AL7230B_RF_SETCHANNEL					\
793 {									\
794 	0x4ff821, 0xc5fbfc, 0x21ebfe, 0xafd401, 0x6cf56a, 0xe04073,	\
795 	0x193d76, 0x9dd844, 0x500007, 0xd8c010, 0x3c9000, 0xf15d58	\
796 }
797 
798 #define ZYD_AL7230B_CHANTABLE	\
799 {				\
800 	{ 0x09ec00, 0x8cccc8 },	\
801 	{ 0x09ec00, 0x8cccd8 },	\
802 	{ 0x09ec00, 0x8cccc0 },	\
803 	{ 0x09ec00, 0x8cccd0 },	\
804 	{ 0x05ec00, 0x8cccc8 },	\
805 	{ 0x05ec00, 0x8cccd8 },	\
806 	{ 0x05ec00, 0x8cccc0 },	\
807 	{ 0x05ec00, 0x8cccd0 },	\
808 	{ 0x0dec00, 0x8cccc8 },	\
809 	{ 0x0dec00, 0x8cccd8 },	\
810 	{ 0x0dec00, 0x8cccc0 },	\
811 	{ 0x0dec00, 0x8cccd0 },	\
812 	{ 0x03ec00, 0x8cccc8 },	\
813 	{ 0x03ec00, 0x866660 }	\
814 }
815 
816 #define ZYD_AL2210_PHY							\
817 {									\
818 	{ ZYD_CR9,   0xe0 }, { ZYD_CR10, 0x91 }, { ZYD_CR12,  0x90 },	\
819 	{ ZYD_CR15,  0xd0 }, { ZYD_CR16, 0x40 }, { ZYD_CR17,  0x58 },	\
820 	{ ZYD_CR18,  0x04 }, { ZYD_CR23, 0x66 }, { ZYD_CR24,  0x14 },	\
821 	{ ZYD_CR26,  0x90 }, { ZYD_CR31, 0x80 }, { ZYD_CR34,  0x06 },	\
822 	{ ZYD_CR35,  0x3e }, { ZYD_CR38, 0x38 }, { ZYD_CR46,  0x90 },	\
823 	{ ZYD_CR47,  0x1e }, { ZYD_CR64, 0x64 }, { ZYD_CR79,  0xb5 },	\
824 	{ ZYD_CR80,  0x38 }, { ZYD_CR81, 0x30 }, { ZYD_CR113, 0xc0 },	\
825 	{ ZYD_CR127, 0x03 }						\
826 }
827 
828 #define ZYD_AL2210_RF							\
829 {									\
830 	0x2396c0, 0x00fcb1, 0x358132, 0x0108b3, 0xc77804, 0x456415,	\
831 	0xff2226, 0x806667, 0x7860f8, 0xbb01c9, 0x00000a, 0x00000b	\
832 }
833 
834 #define ZYD_AL2210_CHANTABLE						\
835 {									\
836 	0x0196c0, 0x019710, 0x019760, 0x0197b0,	0x019800, 0x019850,	\
837 	0x0198a0, 0x0198f0, 0x019940, 0x019990, 0x0199e0, 0x019a30,	\
838 	0x019a80, 0x019b40 						\
839 }
840 
841 #define ZYD_GCT_PHY							\
842 {									\
843 	{ ZYD_CR10,  0x89 }, { ZYD_CR15,  0x20 }, { ZYD_CR17,  0x28 },	\
844 	{ ZYD_CR23,  0x38 }, { ZYD_CR24,  0x20 }, { ZYD_CR26,  0x93 },	\
845 	{ ZYD_CR27,  0x15 }, { ZYD_CR28,  0x3e }, { ZYD_CR29,  0x00 },	\
846 	{ ZYD_CR33,  0x28 }, { ZYD_CR34,  0x30 }, { ZYD_CR35,  0x43 },	\
847 	{ ZYD_CR41,  0x24 }, { ZYD_CR44,  0x32 }, { ZYD_CR46,  0x92 },	\
848 	{ ZYD_CR47,  0x1e }, { ZYD_CR48,  0x04 }, { ZYD_CR49,  0xfa },	\
849 	{ ZYD_CR79,  0x58 }, { ZYD_CR80,  0x30 }, { ZYD_CR81,  0x30 },	\
850 	{ ZYD_CR87,  0x0a }, { ZYD_CR89,  0x04 }, { ZYD_CR91,  0x00 },	\
851 	{ ZYD_CR92,  0x0a }, { ZYD_CR98,  0x8d }, { ZYD_CR99,  0x28 },	\
852 	{ ZYD_CR100, 0x02 }, { ZYD_CR101, 0x09 }, { ZYD_CR102, 0x27 },	\
853 	{ ZYD_CR106, 0x1c }, { ZYD_CR107, 0x1c }, { ZYD_CR109, 0x13 },	\
854 	{ ZYD_CR110, 0x1f }, { ZYD_CR111, 0x13 }, { ZYD_CR112, 0x1f },	\
855 	{ ZYD_CR113, 0x27 }, { ZYD_CR114, 0x23 }, { ZYD_CR115, 0x24 },	\
856 	{ ZYD_CR116, 0x24 }, { ZYD_CR117, 0xfa }, { ZYD_CR118, 0xf0 },	\
857 	{ ZYD_CR119, 0x1a }, { ZYD_CR120, 0x4f }, { ZYD_CR121, 0x1f },	\
858 	{ ZYD_CR122, 0xf0 }, { ZYD_CR123, 0x57 }, { ZYD_CR125, 0xad },	\
859 	{ ZYD_CR126, 0x6c }, { ZYD_CR127, 0x03 }, { ZYD_CR128, 0x14 },	\
860 	{ ZYD_CR129, 0x12 }, { ZYD_CR130, 0x10 }, { ZYD_CR137, 0x50 },	\
861 	{ ZYD_CR138, 0xa8 }, { ZYD_CR144, 0xac }, { ZYD_CR146, 0x20 },	\
862 	{ ZYD_CR252, 0xff }, { ZYD_CR253, 0xff }			\
863 }
864 
865 #define ZYD_GCT_RF							\
866 {									\
867 	0x40002b, 0x519e4f, 0x6f81ad, 0x73fffe, 0x25f9c, 0x100047,	\
868 	0x200999, 0x307602, 0x346063,					\
869 }
870 
871 #define	ZYD_GCT_VCO							\
872 {									\
873 	{ 0x664d, 0x604d, 0x6675, 0x6475, 0x6655, 0x6455, 0x6665 },	\
874 	{ 0x666d, 0x606d, 0x664d, 0x644d, 0x6675, 0x6475, 0x6655 },	\
875 	{ 0x665d, 0x605d, 0x666d, 0x646d, 0x664d, 0x644d, 0x6675 },	\
876 	{ 0x667d, 0x607d, 0x665d, 0x645d, 0x666d, 0x646d, 0x664d },	\
877 	{ 0x6643, 0x6043, 0x667d, 0x647d, 0x665d, 0x645d, 0x666d },	\
878 	{ 0x6663, 0x6063, 0x6643, 0x6443, 0x667d, 0x647d, 0x665d },	\
879 	{ 0x6653, 0x6053, 0x6663, 0x6463, 0x6643, 0x6443, 0x667d },	\
880 	{ 0x6673, 0x6073, 0x6653, 0x6453, 0x6663, 0x6463, 0x6643 },	\
881 	{ 0x664b, 0x604b, 0x6673, 0x6473, 0x6653, 0x6453, 0x6663 },	\
882 	{ 0x666b, 0x606b, 0x664b, 0x644b, 0x6673, 0x6473, 0x6653 },	\
883 	{ 0x665b, 0x605b, 0x666b, 0x646b, 0x664b, 0x644b, 0x6673 }	\
884 }
885 
886 #define	ZYD_GCT_TXGAIN							\
887 {									\
888 	0x0e313, 0x0fb13, 0x0e093, 0x0f893, 0x0ea93, 0x1f093, 0x1f493,	\
889 	0x1f693, 0x1f393, 0x1f35b, 0x1e6db, 0x1ff3f, 0x1ffff, 0x361d7,	\
890 	0x37fbf, 0x3ff8b, 0x3ff33, 0x3fb3f, 0x3ffff			\
891 }
892 
893 #define	ZYD_GCT_CHANNEL_ACAL						\
894 {									\
895 	0x106847, 0x106847, 0x106867, 0x106867, 0x106867, 0x106867,	\
896 	0x106857, 0x106857, 0x106857, 0x106857, 0x106877, 0x106877,	\
897 	0x106877, 0x10684f						\
898 }
899 
900 #define	ZYD_GCT_CHANNEL_STD						\
901 {									\
902 	0x100047, 0x100047, 0x100067, 0x100067, 0x100067, 0x100067,	\
903 	0x100057, 0x100057, 0x100057, 0x100057, 0x100077, 0x100077,	\
904 	0x100077, 0x10004f						\
905 }
906 
907 #define	ZYD_GCT_CHANNEL_DIV						\
908 {									\
909 	0x200999, 0x20099b, 0x200998, 0x20099a, 0x200999, 0x20099b,	\
910 	0x200998, 0x20099a, 0x200999, 0x20099b, 0x200998, 0x20099a,	\
911 	0x200999, 0x200ccc						\
912 }
913 
914 #define ZYD_MAXIM2_PHY							\
915 {									\
916 	{ ZYD_CR23,  0x40 }, { ZYD_CR15,  0x20 }, { ZYD_CR28,  0x3e },	\
917 	{ ZYD_CR29,  0x00 }, { ZYD_CR26,  0x11 }, { ZYD_CR44,  0x33 },	\
918 	{ ZYD_CR106, 0x2a }, { ZYD_CR107, 0x1a }, { ZYD_CR109, 0x2b },	\
919 	{ ZYD_CR110, 0x2b }, { ZYD_CR111, 0x2b }, { ZYD_CR112, 0x2b },	\
920 	{ ZYD_CR10,  0x89 }, { ZYD_CR17,  0x20 }, { ZYD_CR26,  0x93 },	\
921 	{ ZYD_CR34,  0x30 }, { ZYD_CR35,  0x40 }, { ZYD_CR41,  0x24 },	\
922 	{ ZYD_CR44,  0x32 }, { ZYD_CR46,  0x90 }, { ZYD_CR89,  0x18 },	\
923 	{ ZYD_CR92,  0x0a }, { ZYD_CR101, 0x13 }, { ZYD_CR102, 0x27 },	\
924 	{ ZYD_CR106, 0x20 }, { ZYD_CR107, 0x24 }, { ZYD_CR109, 0x09 },	\
925 	{ ZYD_CR110, 0x13 }, { ZYD_CR111, 0x13 }, { ZYD_CR112, 0x13 },	\
926 	{ ZYD_CR113, 0x27 }, { ZYD_CR114, 0x27 }, { ZYD_CR115, 0x24 },	\
927 	{ ZYD_CR116, 0x24 }, { ZYD_CR117, 0xf4 }, { ZYD_CR118, 0xfa },	\
928 	{ ZYD_CR120, 0x4f }, { ZYD_CR121, 0x77 }, { ZYD_CR122, 0xfe },	\
929 	{ ZYD_CR10,  0x89 }, { ZYD_CR17,  0x20 }, { ZYD_CR26,  0x93 },	\
930 	{ ZYD_CR34,  0x30 }, { ZYD_CR35,  0x40 }, { ZYD_CR41,  0x24 },	\
931 	{ ZYD_CR44,  0x32 }, { ZYD_CR46,  0x90 }, { ZYD_CR79,  0x58 },	\
932 	{ ZYD_CR80,  0x30 }, { ZYD_CR81,  0x30 }, { ZYD_CR89,  0x18 },	\
933 	{ ZYD_CR92,  0x0a }, { ZYD_CR101, 0x13 }, { ZYD_CR102, 0x27 },	\
934 	{ ZYD_CR106, 0x20 }, { ZYD_CR107, 0x24 }, { ZYD_CR109, 0x09 },	\
935 	{ ZYD_CR110, 0x13 }, { ZYD_CR111, 0x13 }, { ZYD_CR112, 0x13 },	\
936 	{ ZYD_CR113, 0x27 }, { ZYD_CR114, 0x27 }, { ZYD_CR115, 0x24 },	\
937 	{ ZYD_CR116, 0x24 }, { ZYD_CR117, 0xf4 }, { ZYD_CR118, 0x00 },	\
938 	{ ZYD_CR120, 0x4f }, { ZYD_CR121, 0x06 }, { ZYD_CR122, 0xfe }	\
939 }
940 
941 #define ZYD_MAXIM2_RF							\
942 {									\
943 	0x33334, 0x10a03, 0x00400, 0x00ca1, 0x10072, 0x18645, 0x04006,	\
944 	0x000a7, 0x08258, 0x03fc9, 0x0040a, 0x0000b, 0x0026c		\
945 }
946 
947 #define ZYD_MAXIM2_CHANTABLE_F						\
948 {									\
949 	0x33334, 0x08884, 0x1ddd4, 0x33334, 0x08884, 0x1ddd4, 0x33334,	\
950 	0x08884, 0x1ddd4, 0x33334, 0x08884, 0x1ddd4, 0x33334, 0x26664	\
951 }
952 
953 #define ZYD_MAXIM2_CHANTABLE	\
954 {				\
955 	{ 0x33334, 0x10a03 },	\
956 	{ 0x08884, 0x20a13 },	\
957 	{ 0x1ddd4, 0x30a13 },	\
958 	{ 0x33334, 0x10a13 },	\
959 	{ 0x08884, 0x20a23 },	\
960 	{ 0x1ddd4, 0x30a23 },	\
961 	{ 0x33334, 0x10a23 },	\
962 	{ 0x08884, 0x20a33 },	\
963 	{ 0x1ddd4, 0x30a33 },	\
964 	{ 0x33334, 0x10a33 },	\
965 	{ 0x08884, 0x20a43 },	\
966 	{ 0x1ddd4, 0x30a43 },	\
967 	{ 0x33334, 0x10a43 },	\
968 	{ 0x26664, 0x20a53 }	\
969 }
970 
971 #define	ZYD_TX_RATEDIV							\
972 {									\
973 	0x1, 0x2, 0xb, 0xb, 0x1, 0x1, 0x1, 0x1, 0x30, 0x18, 0xc, 0x6,	\
974 	0x36, 0x24, 0x12, 0x9						\
975 }
976 
977 /*
978  * Control pipe requests.
979  */
980 #define ZYD_DOWNLOADREQ		0x30
981 #define ZYD_DOWNLOADSTS		0x31
982 #define	ZYD_READFWDATAREQ	0x32
983 
984 /* possible values for register ZYD_CR_INTERRUPT */
985 #define ZYD_HWINT_MASK		0x004f0000
986 
987 /* possible values for register ZYD_MAC_MISC */
988 #define ZYD_UNLOCK_PHY_REGS	0x80
989 
990 /* possible values for register ZYD_MAC_ENCRYPTION_TYPE */
991 #define ZYD_ENC_SNIFFER		8
992 
993 /* flags for register ZYD_MAC_RXFILTER */
994 #define ZYD_FILTER_ASS_REQ	(1 << 0)
995 #define ZYD_FILTER_ASS_RSP	(1 << 1)
996 #define ZYD_FILTER_REASS_REQ	(1 << 2)
997 #define ZYD_FILTER_REASS_RSP	(1 << 3)
998 #define ZYD_FILTER_PRB_REQ	(1 << 4)
999 #define ZYD_FILTER_PRB_RSP	(1 << 5)
1000 #define ZYD_FILTER_BCN		(1 << 8)
1001 #define ZYD_FILTER_ATIM		(1 << 9)
1002 #define ZYD_FILTER_DEASS	(1 << 10)
1003 #define ZYD_FILTER_AUTH		(1 << 11)
1004 #define ZYD_FILTER_DEAUTH	(1 << 12)
1005 #define ZYD_FILTER_PS_POLL	(1 << 26)
1006 #define ZYD_FILTER_RTS		(1 << 27)
1007 #define ZYD_FILTER_CTS		(1 << 28)
1008 #define ZYD_FILTER_ACK		(1 << 29)
1009 #define ZYD_FILTER_CFE		(1 << 30)
1010 #define ZYD_FILTER_CFE_A	(1U << 31)
1011 
1012 /* helpers for register ZYD_MAC_RXFILTER */
1013 #define ZYD_FILTER_MONITOR	0xffffffff
1014 #define ZYD_FILTER_BSS							\
1015 	(ZYD_FILTER_ASS_REQ | ZYD_FILTER_ASS_RSP |			\
1016 	 ZYD_FILTER_REASS_REQ | ZYD_FILTER_REASS_RSP |			\
1017 	 ZYD_FILTER_PRB_REQ | ZYD_FILTER_PRB_RSP |			\
1018 	 (0x3 << 6) |							\
1019 	 ZYD_FILTER_BCN | ZYD_FILTER_ATIM | ZYD_FILTER_DEASS |		\
1020 	 ZYD_FILTER_AUTH | ZYD_FILTER_DEAUTH |				\
1021 	 (0x7 << 13) |							\
1022 	 ZYD_FILTER_PS_POLL | ZYD_FILTER_ACK)
1023 #define ZYD_FILTER_HOSTAP						\
1024 	(ZYD_FILTER_ASS_REQ | ZYD_FILTER_REASS_REQ |			\
1025 	 ZYD_FILTER_PRB_REQ | ZYD_FILTER_DEASS | ZYD_FILTER_AUTH |	\
1026 	 ZYD_FILTER_DEAUTH | ZYD_FILTER_PS_POLL)
1027 
1028 struct zyd_tx_desc {
1029 	uint8_t			phy;
1030 #define ZYD_TX_PHY_SIGNAL(x)	((x) & 0xf)
1031 #define ZYD_TX_PHY_OFDM		(1 << 4)
1032 #define ZYD_TX_PHY_SHPREAMBLE	(1 << 5)	/* CCK */
1033 #define ZYD_TX_PHY_5GHZ		(1 << 5)	/* OFDM */
1034 	uint16_t		len;
1035 	uint8_t			flags;
1036 #define ZYD_TX_FLAG_BACKOFF	(1 << 0)
1037 #define ZYD_TX_FLAG_MULTICAST	(1 << 1)
1038 #define ZYD_TX_FLAG_TYPE(x)	(((x) & 0x3) << 2)
1039 #define ZYD_TX_TYPE_DATA	0
1040 #define ZYD_TX_TYPE_PS_POLL	1
1041 #define ZYD_TX_TYPE_MGMT	2
1042 #define ZYD_TX_TYPE_CTL		3
1043 #define ZYD_TX_FLAG_WAKEUP	(1 << 4)
1044 #define ZYD_TX_FLAG_RTS		(1 << 5)
1045 #define ZYD_TX_FLAG_ENCRYPT	(1 << 6)
1046 #define ZYD_TX_FLAG_CTS_TO_SELF	(1 << 7)
1047 	uint16_t		pktlen;
1048 	uint16_t		plcp_length;
1049 	uint8_t			plcp_service;
1050 #define ZYD_PLCP_LENGEXT	0x80
1051 	uint16_t		nextlen;
1052 } __packed;
1053 
1054 struct zyd_plcphdr {
1055 	uint8_t			signal;
1056 	uint8_t			reserved[2];
1057 	uint16_t		service;	/* unaligned! */
1058 } __packed;
1059 
1060 struct zyd_rx_stat {
1061 	uint8_t			signal_cck;
1062 	uint8_t			rssi;
1063 	uint8_t			signal_ofdm;
1064 	uint8_t			cipher;
1065 #define ZYD_RX_CIPHER_WEP64	1
1066 #define ZYD_RX_CIPHER_TKIP	2
1067 #define ZYD_RX_CIPHER_AES	4
1068 #define ZYD_RX_CIPHER_WEP128	5
1069 #define ZYD_RX_CIPHER_WEP256	6
1070 #define ZYD_RX_CIPHER_WEP	\
1071 	(ZYD_RX_CIPHER_WEP64 | ZYD_RX_CIPHER_WEP128 | ZYD_RX_CIPHER_WEP256)
1072 	uint8_t			flags;
1073 #define ZYD_RX_OFDM		(1 << 0)
1074 #define ZYD_RX_TIMEOUT		(1 << 1)
1075 #define ZYD_RX_OVERRUN		(1 << 2)
1076 #define ZYD_RX_DECRYPTERR	(1 << 3)
1077 #define ZYD_RX_BADCRC32		(1 << 4)
1078 #define ZYD_RX_NOT2ME		(1 << 5)
1079 #define ZYD_RX_BADCRC16		(1 << 6)
1080 #define ZYD_RX_ERROR		(1 << 7)
1081 } __packed;
1082 
1083 /* this structure may be unaligned */
1084 struct zyd_rx_desc {
1085 #define ZYD_MAX_RXFRAMECNT	3
1086 	uWord			len[ZYD_MAX_RXFRAMECNT];
1087 	uWord			tag;
1088 #define ZYD_TAG_MULTIFRAME	0x697e
1089 } __packed;
1090 
1091 /* I2C bus alike */
1092 struct zyd_rfwrite_cmd {
1093 	uint16_t		code;
1094 	uint16_t		width;
1095 	uint16_t		bit[32];
1096 #define ZYD_RF_IF_LE		(1 << 1)
1097 #define ZYD_RF_CLK		(1 << 2)
1098 #define ZYD_RF_DATA		(1 << 3)
1099 } __packed;
1100 
1101 struct zyd_cmd {
1102 	uint16_t		code;
1103 #define ZYD_CMD_IOWR		0x0021	/* write HMAC or PHY register */
1104 #define ZYD_CMD_IORD		0x0022	/* read HMAC or PHY register */
1105 #define ZYD_CMD_RFCFG		0x0023	/* write RF register */
1106 #define ZYD_NOTIF_IORD		0x9001	/* response for ZYD_CMD_IORD */
1107 #define ZYD_NOTIF_MACINTR	0x9001	/* interrupt notification */
1108 #define ZYD_NOTIF_RETRYSTATUS	0xa001	/* Tx retry notification */
1109 	uint8_t			data[64];
1110 } __packed;
1111 
1112 /* structure for command ZYD_CMD_IOWR */
1113 struct zyd_pair {
1114 	uint16_t		reg;
1115 /* helpers macros to read/write 32-bit registers */
1116 #define ZYD_REG32_LO(reg)	(reg)
1117 #define ZYD_REG32_HI(reg)	\
1118 	((reg) + ((((reg) & 0xf000) == 0x9000) ? 2 : 1))
1119 	uint16_t		val;
1120 } __packed;
1121 
1122 /* structure for notification ZYD_NOTIF_RETRYSTATUS */
1123 struct zyd_notif_retry {
1124 	uint16_t		rate;
1125 	uint8_t			macaddr[IEEE80211_ADDR_LEN];
1126 	uint16_t		count;
1127 } __packed;
1128 
1129 #define ZYD_CONFIG_INDEX	0
1130 #define ZYD_IFACE_INDEX		0
1131 
1132 #define ZYD_INTR_TIMEOUT	1000
1133 #define ZYD_TX_TIMEOUT		10000
1134 
1135 #define ZYD_MAX_TXBUFSZ	\
1136 	(sizeof(struct zyd_tx_desc) + MCLBYTES)
1137 #define ZYD_MIN_FRAGSZ							\
1138 	(sizeof(struct zyd_plcphdr) + IEEE80211_MIN_LEN + 		\
1139 	 sizeof(struct zyd_rx_stat))
1140 #define ZYD_MIN_RXBUFSZ	ZYD_MIN_FRAGSZ
1141 #define ZYX_MAX_RXBUFSZ							\
1142 	((sizeof (struct zyd_plcphdr) + IEEE80211_MAX_LEN +		\
1143 	  sizeof (struct zyd_rx_stat)) * ZYD_MAX_RXFRAMECNT + 		\
1144 	 sizeof (struct zyd_rx_desc))
1145 #define ZYD_TX_DESC_SIZE	(sizeof (struct zyd_tx_desc))
1146 
1147 #define ZYD_RX_LIST_CNT		1
1148 #define ZYD_TX_LIST_CNT		5
1149 #define ZYD_CMD_FLAG_READ	(1 << 0)
1150 #define ZYD_CMD_FLAG_SENT	(1 << 1)
1151 
1152 /* quickly determine if a given rate is CCK or OFDM */
1153 #define ZYD_RATE_IS_OFDM(rate)	((rate) >= 12 && (rate) != 22)
1154 
1155 struct zyd_phy_pair {
1156 	uint16_t		reg;
1157 	uint8_t			val;
1158 };
1159 
1160 struct zyd_mac_pair {
1161 	uint16_t		reg;
1162 	uint32_t		val;
1163 };
1164 
1165 struct zyd_tx_data {
1166 	STAILQ_ENTRY(zyd_tx_data)	next;
1167 	struct zyd_softc		*sc;
1168 	struct zyd_tx_desc		desc;
1169 	struct mbuf			*m;
1170 	struct ieee80211_node		*ni;
1171 	int				rate;
1172 };
1173 typedef STAILQ_HEAD(, zyd_tx_data) zyd_txdhead;
1174 
1175 struct zyd_rx_data {
1176 	struct mbuf			*m;
1177 	int				rssi;
1178 };
1179 
1180 struct zyd_rx_radiotap_header {
1181 	struct ieee80211_radiotap_header wr_ihdr;
1182 	uint8_t			wr_flags;
1183 	uint8_t			wr_rate;
1184 	uint16_t		wr_chan_freq;
1185 	uint16_t		wr_chan_flags;
1186 	int8_t			wr_antsignal;
1187 	int8_t			wr_antnoise;
1188 } __packed __aligned(8);
1189 
1190 #define ZYD_RX_RADIOTAP_PRESENT						\
1191 	((1 << IEEE80211_RADIOTAP_FLAGS) |				\
1192 	 (1 << IEEE80211_RADIOTAP_RATE) |				\
1193 	 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |			\
1194 	 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |			\
1195 	 (1 << IEEE80211_RADIOTAP_CHANNEL))
1196 
1197 struct zyd_tx_radiotap_header {
1198 	struct ieee80211_radiotap_header wt_ihdr;
1199 	uint8_t			wt_flags;
1200 	uint8_t			wt_rate;
1201 	uint16_t		wt_chan_freq;
1202 	uint16_t		wt_chan_flags;
1203 } __packed __aligned(8);
1204 
1205 #define ZYD_TX_RADIOTAP_PRESENT						\
1206 	((1 << IEEE80211_RADIOTAP_FLAGS) |				\
1207 	 (1 << IEEE80211_RADIOTAP_RATE) |				\
1208 	 (1 << IEEE80211_RADIOTAP_CHANNEL))
1209 
1210 struct zyd_softc;	/* forward declaration */
1211 
1212 struct zyd_rf {
1213 	/* RF methods */
1214 	int			(*init)(struct zyd_rf *);
1215 	int			(*switch_radio)(struct zyd_rf *, int);
1216 	int			(*set_channel)(struct zyd_rf *, uint8_t);
1217 	int			(*bandedge6)(struct zyd_rf *,
1218 				    struct ieee80211_channel *);
1219 	/* RF attributes */
1220 	struct zyd_softc	*rf_sc;	/* back-pointer */
1221 	int			width;
1222 	int			idx;	/* for GIT RF */
1223 	int			update_pwr;
1224 };
1225 
1226 struct zyd_rq {
1227 	struct zyd_cmd		*cmd;
1228 	const uint16_t		*idata;
1229 	struct zyd_pair		*odata;
1230 	int			ilen;
1231 	int			olen;
1232 	int			flags;
1233 	STAILQ_ENTRY(zyd_rq)	rq;
1234 };
1235 
1236 struct zyd_vap {
1237 	struct ieee80211vap	vap;
1238 	int			(*newstate)(struct ieee80211vap *,
1239 				    enum ieee80211_state, int);
1240 };
1241 #define	ZYD_VAP(vap)	((struct zyd_vap *)(vap))
1242 
1243 enum {
1244 	ZYD_BULK_WR,
1245 	ZYD_BULK_RD,
1246 	ZYD_INTR_WR,
1247 	ZYD_INTR_RD,
1248 	ZYD_N_TRANSFER = 4,
1249 };
1250 
1251 struct zyd_softc {
1252 	struct ifnet		*sc_ifp;
1253 	device_t		sc_dev;
1254 	struct usb_device	*sc_udev;
1255 
1256 	struct usb_xfer	*sc_xfer[ZYD_N_TRANSFER];
1257 
1258 	int			sc_flags;
1259 #define	ZYD_FLAG_FWLOADED		(1 << 0)
1260 #define	ZYD_FLAG_INITONCE		(1 << 1)
1261 #define	ZYD_FLAG_INITDONE		(1 << 2)
1262 #define	ZYD_FLAG_DETACHED		(1 << 3)
1263 
1264 	struct zyd_rf		sc_rf;
1265 
1266 	STAILQ_HEAD(, zyd_rq)	sc_rtx;
1267 	STAILQ_HEAD(, zyd_rq)	sc_rqh;
1268 
1269 	uint8_t			sc_bssid[IEEE80211_ADDR_LEN];
1270 	uint16_t		sc_fwbase;
1271 	uint8_t			sc_regdomain;
1272 	uint8_t			sc_macrev;
1273 	uint16_t		sc_fwrev;
1274 	uint8_t			sc_rfrev;
1275 	uint8_t			sc_parev;
1276 	uint8_t			sc_al2230s;
1277 	uint8_t			sc_bandedge6;
1278 	uint8_t			sc_newphy;
1279 	uint8_t			sc_cckgain;
1280 	uint8_t			sc_fix_cr157;
1281 	uint8_t			sc_ledtype;
1282 	uint8_t			sc_txled;
1283 
1284 	uint32_t		sc_atim_wnd;
1285 	uint32_t		sc_pre_tbtt;
1286 	uint32_t		sc_bcn_int;
1287 
1288 	uint8_t			sc_pwrcal[14];
1289 	uint8_t			sc_pwrint[14];
1290 	uint8_t			sc_ofdm36_cal[14];
1291 	uint8_t			sc_ofdm48_cal[14];
1292 	uint8_t			sc_ofdm54_cal[14];
1293 
1294 	struct mtx		sc_mtx;
1295 	struct zyd_tx_data	tx_data[ZYD_TX_LIST_CNT];
1296 	zyd_txdhead		tx_q;
1297 	zyd_txdhead		tx_free;
1298 	int			tx_nfree;
1299 	struct zyd_rx_desc	sc_rx_desc;
1300 	struct zyd_rx_data	sc_rx_data[ZYD_MAX_RXFRAMECNT];
1301 	int			sc_rx_count;
1302 
1303 	struct zyd_cmd		sc_ibuf;
1304 
1305 	struct zyd_rx_radiotap_header	sc_rxtap;
1306 	int			sc_rxtap_len;
1307 	struct zyd_tx_radiotap_header	sc_txtap;
1308 	int			sc_txtap_len;
1309 };
1310 
1311 #define	ZYD_LOCK(sc)		mtx_lock(&(sc)->sc_mtx)
1312 #define	ZYD_UNLOCK(sc)		mtx_unlock(&(sc)->sc_mtx)
1313 #define	ZYD_LOCK_ASSERT(sc, t)	mtx_assert(&(sc)->sc_mtx, t)
1314 
1315