1f70f23ccSOleksandr Tymoshenko /*- 2f70f23ccSOleksandr Tymoshenko * Copyright (c) 2012 Semihalf. 3f70f23ccSOleksandr Tymoshenko * All rights reserved. 4f70f23ccSOleksandr Tymoshenko * 5f70f23ccSOleksandr Tymoshenko * Redistribution and use in source and binary forms, with or without 6f70f23ccSOleksandr Tymoshenko * modification, are permitted provided that the following conditions 7f70f23ccSOleksandr Tymoshenko * are met: 8f70f23ccSOleksandr Tymoshenko * 1. Redistributions of source code must retain the above copyright 9f70f23ccSOleksandr Tymoshenko * notice, this list of conditions and the following disclaimer. 10f70f23ccSOleksandr Tymoshenko * 2. Redistributions in binary form must reproduce the above copyright 11f70f23ccSOleksandr Tymoshenko * notice, this list of conditions and the following disclaimer in the 12f70f23ccSOleksandr Tymoshenko * documentation and/or other materials provided with the distribution. 13f70f23ccSOleksandr Tymoshenko * 14f70f23ccSOleksandr Tymoshenko * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15f70f23ccSOleksandr Tymoshenko * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16f70f23ccSOleksandr Tymoshenko * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17f70f23ccSOleksandr Tymoshenko * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18f70f23ccSOleksandr Tymoshenko * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19f70f23ccSOleksandr Tymoshenko * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20f70f23ccSOleksandr Tymoshenko * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21f70f23ccSOleksandr Tymoshenko * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22f70f23ccSOleksandr Tymoshenko * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23f70f23ccSOleksandr Tymoshenko * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24f70f23ccSOleksandr Tymoshenko * SUCH DAMAGE. 25f70f23ccSOleksandr Tymoshenko */ 26f70f23ccSOleksandr Tymoshenko 27cf9df3c5SAndrew Turner #include "opt_acpi.h" 28cf9df3c5SAndrew Turner #include "opt_platform.h" 29cf9df3c5SAndrew Turner 30f70f23ccSOleksandr Tymoshenko #include <sys/cdefs.h> 31f70f23ccSOleksandr Tymoshenko __FBSDID("$FreeBSD$"); 32f70f23ccSOleksandr Tymoshenko 33f70f23ccSOleksandr Tymoshenko #include <sys/param.h> 34f70f23ccSOleksandr Tymoshenko #include <sys/systm.h> 35f70f23ccSOleksandr Tymoshenko #include <sys/kernel.h> 36f70f23ccSOleksandr Tymoshenko #include <sys/bus.h> 37f70f23ccSOleksandr Tymoshenko #include <machine/bus.h> 38f70f23ccSOleksandr Tymoshenko 39f70f23ccSOleksandr Tymoshenko #include <dev/uart/uart.h> 40f70f23ccSOleksandr Tymoshenko #include <dev/uart/uart_cpu.h> 41cf9df3c5SAndrew Turner #ifdef FDT 423bb693afSIan Lepore #include <dev/uart/uart_cpu_fdt.h> 43cf9df3c5SAndrew Turner #endif 44f70f23ccSOleksandr Tymoshenko #include <dev/uart/uart_bus.h> 45f70f23ccSOleksandr Tymoshenko #include "uart_if.h" 46f70f23ccSOleksandr Tymoshenko 47eba1a249SAndrew Turner #ifdef DEV_ACPI 48eba1a249SAndrew Turner #include <dev/uart/uart_cpu_acpi.h> 49eba1a249SAndrew Turner #include <contrib/dev/acpica/include/acpi.h> 50ef022bb1SAndrew Turner #include <contrib/dev/acpica/include/accommon.h> 51eba1a249SAndrew Turner #include <contrib/dev/acpica/include/actables.h> 52eba1a249SAndrew Turner #endif 53eba1a249SAndrew Turner 54f70f23ccSOleksandr Tymoshenko #include <sys/kdb.h> 55f70f23ccSOleksandr Tymoshenko 56f70f23ccSOleksandr Tymoshenko /* PL011 UART registers and masks*/ 57f70f23ccSOleksandr Tymoshenko #define UART_DR 0x00 /* Data register */ 58f70f23ccSOleksandr Tymoshenko #define DR_FE (1 << 8) /* Framing error */ 59f70f23ccSOleksandr Tymoshenko #define DR_PE (1 << 9) /* Parity error */ 60f70f23ccSOleksandr Tymoshenko #define DR_BE (1 << 10) /* Break error */ 61f70f23ccSOleksandr Tymoshenko #define DR_OE (1 << 11) /* Overrun error */ 62f70f23ccSOleksandr Tymoshenko 63f70f23ccSOleksandr Tymoshenko #define UART_FR 0x06 /* Flag register */ 6443ad57d3SJayachandran C. #define FR_RXFE (1 << 4) /* Receive FIFO/reg empty */ 6517d2ee01SZbigniew Bodek #define FR_TXFF (1 << 5) /* Transmit FIFO/reg full */ 66f70f23ccSOleksandr Tymoshenko #define FR_RXFF (1 << 6) /* Receive FIFO/reg full */ 67f70f23ccSOleksandr Tymoshenko #define FR_TXFE (1 << 7) /* Transmit FIFO/reg empty */ 68f70f23ccSOleksandr Tymoshenko 69f70f23ccSOleksandr Tymoshenko #define UART_IBRD 0x09 /* Integer baud rate register */ 70f70f23ccSOleksandr Tymoshenko #define IBRD_BDIVINT 0xffff /* Significant part of int. divisor value */ 71f70f23ccSOleksandr Tymoshenko 72f70f23ccSOleksandr Tymoshenko #define UART_FBRD 0x0a /* Fractional baud rate register */ 73f70f23ccSOleksandr Tymoshenko #define FBRD_BDIVFRAC 0x3f /* Significant part of frac. divisor value */ 74f70f23ccSOleksandr Tymoshenko 75f70f23ccSOleksandr Tymoshenko #define UART_LCR_H 0x0b /* Line control register */ 76f70f23ccSOleksandr Tymoshenko #define LCR_H_WLEN8 (0x3 << 5) 77f70f23ccSOleksandr Tymoshenko #define LCR_H_WLEN7 (0x2 << 5) 78f70f23ccSOleksandr Tymoshenko #define LCR_H_WLEN6 (0x1 << 5) 79f70f23ccSOleksandr Tymoshenko #define LCR_H_FEN (1 << 4) /* FIFO mode enable */ 80f70f23ccSOleksandr Tymoshenko #define LCR_H_STP2 (1 << 3) /* 2 stop frames at the end */ 81f70f23ccSOleksandr Tymoshenko #define LCR_H_EPS (1 << 2) /* Even parity select */ 82f70f23ccSOleksandr Tymoshenko #define LCR_H_PEN (1 << 1) /* Parity enable */ 83f70f23ccSOleksandr Tymoshenko 84f70f23ccSOleksandr Tymoshenko #define UART_CR 0x0c /* Control register */ 85f70f23ccSOleksandr Tymoshenko #define CR_RXE (1 << 9) /* Receive enable */ 86f70f23ccSOleksandr Tymoshenko #define CR_TXE (1 << 8) /* Transmit enable */ 87f70f23ccSOleksandr Tymoshenko #define CR_UARTEN (1 << 0) /* UART enable */ 88f70f23ccSOleksandr Tymoshenko 89f70f23ccSOleksandr Tymoshenko #define UART_IMSC 0x0e /* Interrupt mask set/clear register */ 90f70f23ccSOleksandr Tymoshenko #define IMSC_MASK_ALL 0x7ff /* Mask all interrupts */ 91f70f23ccSOleksandr Tymoshenko 92f70f23ccSOleksandr Tymoshenko #define UART_RIS 0x0f /* Raw interrupt status register */ 93f70f23ccSOleksandr Tymoshenko #define UART_RXREADY (1 << 4) /* RX buffer full */ 94f70f23ccSOleksandr Tymoshenko #define UART_TXEMPTY (1 << 5) /* TX buffer empty */ 9583dbea14SRuslan Bukin #define RIS_RTIM (1 << 6) /* Receive timeout */ 96f70f23ccSOleksandr Tymoshenko #define RIS_FE (1 << 7) /* Framing error interrupt status */ 97f70f23ccSOleksandr Tymoshenko #define RIS_PE (1 << 8) /* Parity error interrupt status */ 98f70f23ccSOleksandr Tymoshenko #define RIS_BE (1 << 9) /* Break error interrupt status */ 99f70f23ccSOleksandr Tymoshenko #define RIS_OE (1 << 10) /* Overrun interrupt status */ 100f70f23ccSOleksandr Tymoshenko 101f70f23ccSOleksandr Tymoshenko #define UART_MIS 0x10 /* Masked interrupt status register */ 102f70f23ccSOleksandr Tymoshenko #define UART_ICR 0x11 /* Interrupt clear register */ 103f70f23ccSOleksandr Tymoshenko 104f70f23ccSOleksandr Tymoshenko /* 105f70f23ccSOleksandr Tymoshenko * FIXME: actual register size is SoC-dependent, we need to handle it 106f70f23ccSOleksandr Tymoshenko */ 107f70f23ccSOleksandr Tymoshenko #define __uart_getreg(bas, reg) \ 108f70f23ccSOleksandr Tymoshenko bus_space_read_4((bas)->bst, (bas)->bsh, uart_regofs(bas, reg)) 109f70f23ccSOleksandr Tymoshenko #define __uart_setreg(bas, reg, value) \ 110f70f23ccSOleksandr Tymoshenko bus_space_write_4((bas)->bst, (bas)->bsh, uart_regofs(bas, reg), value) 111f70f23ccSOleksandr Tymoshenko 112f70f23ccSOleksandr Tymoshenko /* 113f70f23ccSOleksandr Tymoshenko * Low-level UART interface. 114f70f23ccSOleksandr Tymoshenko */ 115f70f23ccSOleksandr Tymoshenko static int uart_pl011_probe(struct uart_bas *bas); 116f70f23ccSOleksandr Tymoshenko static void uart_pl011_init(struct uart_bas *bas, int, int, int, int); 117f70f23ccSOleksandr Tymoshenko static void uart_pl011_term(struct uart_bas *bas); 118f70f23ccSOleksandr Tymoshenko static void uart_pl011_putc(struct uart_bas *bas, int); 119f70f23ccSOleksandr Tymoshenko static int uart_pl011_rxready(struct uart_bas *bas); 120f70f23ccSOleksandr Tymoshenko static int uart_pl011_getc(struct uart_bas *bas, struct mtx *); 121f70f23ccSOleksandr Tymoshenko 122f70f23ccSOleksandr Tymoshenko static struct uart_ops uart_pl011_ops = { 123f70f23ccSOleksandr Tymoshenko .probe = uart_pl011_probe, 124f70f23ccSOleksandr Tymoshenko .init = uart_pl011_init, 125f70f23ccSOleksandr Tymoshenko .term = uart_pl011_term, 126f70f23ccSOleksandr Tymoshenko .putc = uart_pl011_putc, 127f70f23ccSOleksandr Tymoshenko .rxready = uart_pl011_rxready, 128f70f23ccSOleksandr Tymoshenko .getc = uart_pl011_getc, 129f70f23ccSOleksandr Tymoshenko }; 130f70f23ccSOleksandr Tymoshenko 131f70f23ccSOleksandr Tymoshenko static int 132f70f23ccSOleksandr Tymoshenko uart_pl011_probe(struct uart_bas *bas) 133f70f23ccSOleksandr Tymoshenko { 134f70f23ccSOleksandr Tymoshenko 135f70f23ccSOleksandr Tymoshenko return (0); 136f70f23ccSOleksandr Tymoshenko } 137f70f23ccSOleksandr Tymoshenko 138f70f23ccSOleksandr Tymoshenko static void 139a0eae699SOleksandr Tymoshenko uart_pl011_param(struct uart_bas *bas, int baudrate, int databits, int stopbits, 140f70f23ccSOleksandr Tymoshenko int parity) 141f70f23ccSOleksandr Tymoshenko { 142f70f23ccSOleksandr Tymoshenko uint32_t ctrl, line; 143f70f23ccSOleksandr Tymoshenko uint32_t baud; 144f70f23ccSOleksandr Tymoshenko 145f70f23ccSOleksandr Tymoshenko /* 146f70f23ccSOleksandr Tymoshenko * Zero all settings to make sure 147f70f23ccSOleksandr Tymoshenko * UART is disabled and not configured 148f70f23ccSOleksandr Tymoshenko */ 149f70f23ccSOleksandr Tymoshenko ctrl = line = 0x0; 150f70f23ccSOleksandr Tymoshenko __uart_setreg(bas, UART_CR, ctrl); 151f70f23ccSOleksandr Tymoshenko 152f70f23ccSOleksandr Tymoshenko /* As we know UART is disabled we may setup the line */ 153f70f23ccSOleksandr Tymoshenko switch (databits) { 154f70f23ccSOleksandr Tymoshenko case 7: 155f70f23ccSOleksandr Tymoshenko line |= LCR_H_WLEN7; 156f70f23ccSOleksandr Tymoshenko break; 157f70f23ccSOleksandr Tymoshenko case 6: 158f70f23ccSOleksandr Tymoshenko line |= LCR_H_WLEN6; 159f70f23ccSOleksandr Tymoshenko break; 160f70f23ccSOleksandr Tymoshenko case 8: 161f70f23ccSOleksandr Tymoshenko default: 162f70f23ccSOleksandr Tymoshenko line |= LCR_H_WLEN8; 163f70f23ccSOleksandr Tymoshenko break; 164f70f23ccSOleksandr Tymoshenko } 165f70f23ccSOleksandr Tymoshenko 166f70f23ccSOleksandr Tymoshenko if (stopbits == 2) 167f70f23ccSOleksandr Tymoshenko line |= LCR_H_STP2; 168f70f23ccSOleksandr Tymoshenko else 169f70f23ccSOleksandr Tymoshenko line &= ~LCR_H_STP2; 170f70f23ccSOleksandr Tymoshenko 171f70f23ccSOleksandr Tymoshenko if (parity) 172f70f23ccSOleksandr Tymoshenko line |= LCR_H_PEN; 173f70f23ccSOleksandr Tymoshenko else 174f70f23ccSOleksandr Tymoshenko line &= ~LCR_H_PEN; 17543ad57d3SJayachandran C. line |= LCR_H_FEN; 176f70f23ccSOleksandr Tymoshenko 177f70f23ccSOleksandr Tymoshenko /* Configure the rest */ 178f70f23ccSOleksandr Tymoshenko ctrl |= (CR_RXE | CR_TXE | CR_UARTEN); 179f70f23ccSOleksandr Tymoshenko 1806dd028d8SIan Lepore if (bas->rclk != 0 && baudrate != 0) { 1816dd028d8SIan Lepore baud = bas->rclk * 4 / baudrate; 1826dd028d8SIan Lepore __uart_setreg(bas, UART_IBRD, ((uint32_t)(baud >> 6)) & IBRD_BDIVINT); 1836dd028d8SIan Lepore __uart_setreg(bas, UART_FBRD, (uint32_t)(baud & 0x3F) & FBRD_BDIVFRAC); 1846dd028d8SIan Lepore } 185f70f23ccSOleksandr Tymoshenko 186f70f23ccSOleksandr Tymoshenko /* Add config. to line before reenabling UART */ 187f70f23ccSOleksandr Tymoshenko __uart_setreg(bas, UART_LCR_H, (__uart_getreg(bas, UART_LCR_H) & 188f70f23ccSOleksandr Tymoshenko ~0xff) | line); 189f70f23ccSOleksandr Tymoshenko 190f70f23ccSOleksandr Tymoshenko __uart_setreg(bas, UART_CR, ctrl); 191f70f23ccSOleksandr Tymoshenko } 192f70f23ccSOleksandr Tymoshenko 193f70f23ccSOleksandr Tymoshenko static void 194a0eae699SOleksandr Tymoshenko uart_pl011_init(struct uart_bas *bas, int baudrate, int databits, int stopbits, 195a0eae699SOleksandr Tymoshenko int parity) 196a0eae699SOleksandr Tymoshenko { 197a0eae699SOleksandr Tymoshenko /* Mask all interrupts */ 198a0eae699SOleksandr Tymoshenko __uart_setreg(bas, UART_IMSC, __uart_getreg(bas, UART_IMSC) & 199a0eae699SOleksandr Tymoshenko ~IMSC_MASK_ALL); 200a0eae699SOleksandr Tymoshenko 201a0eae699SOleksandr Tymoshenko uart_pl011_param(bas, baudrate, databits, stopbits, parity); 202a0eae699SOleksandr Tymoshenko } 203a0eae699SOleksandr Tymoshenko 204a0eae699SOleksandr Tymoshenko static void 205f70f23ccSOleksandr Tymoshenko uart_pl011_term(struct uart_bas *bas) 206f70f23ccSOleksandr Tymoshenko { 207f70f23ccSOleksandr Tymoshenko } 208f70f23ccSOleksandr Tymoshenko 209f70f23ccSOleksandr Tymoshenko static void 210f70f23ccSOleksandr Tymoshenko uart_pl011_putc(struct uart_bas *bas, int c) 211f70f23ccSOleksandr Tymoshenko { 212f70f23ccSOleksandr Tymoshenko 21317d2ee01SZbigniew Bodek /* Wait when TX FIFO full. Push character otherwise. */ 21417d2ee01SZbigniew Bodek while (__uart_getreg(bas, UART_FR) & FR_TXFF) 215f70f23ccSOleksandr Tymoshenko ; 216f70f23ccSOleksandr Tymoshenko __uart_setreg(bas, UART_DR, c & 0xff); 217f70f23ccSOleksandr Tymoshenko } 218f70f23ccSOleksandr Tymoshenko 219f70f23ccSOleksandr Tymoshenko static int 220f70f23ccSOleksandr Tymoshenko uart_pl011_rxready(struct uart_bas *bas) 221f70f23ccSOleksandr Tymoshenko { 222f70f23ccSOleksandr Tymoshenko 22343ad57d3SJayachandran C. return !(__uart_getreg(bas, UART_FR) & FR_RXFE); 224f70f23ccSOleksandr Tymoshenko } 225f70f23ccSOleksandr Tymoshenko 226f70f23ccSOleksandr Tymoshenko static int 227f70f23ccSOleksandr Tymoshenko uart_pl011_getc(struct uart_bas *bas, struct mtx *hwmtx) 228f70f23ccSOleksandr Tymoshenko { 229f70f23ccSOleksandr Tymoshenko int c; 230f70f23ccSOleksandr Tymoshenko 231f70f23ccSOleksandr Tymoshenko while (!uart_pl011_rxready(bas)) 232f70f23ccSOleksandr Tymoshenko ; 233f70f23ccSOleksandr Tymoshenko c = __uart_getreg(bas, UART_DR) & 0xff; 234f70f23ccSOleksandr Tymoshenko 235f70f23ccSOleksandr Tymoshenko return (c); 236f70f23ccSOleksandr Tymoshenko } 237f70f23ccSOleksandr Tymoshenko 238f70f23ccSOleksandr Tymoshenko /* 239f70f23ccSOleksandr Tymoshenko * High-level UART interface. 240f70f23ccSOleksandr Tymoshenko */ 241f70f23ccSOleksandr Tymoshenko struct uart_pl011_softc { 242f70f23ccSOleksandr Tymoshenko struct uart_softc base; 243660c1ea0SJayachandran C. uint16_t imsc; /* Interrupt mask */ 244f70f23ccSOleksandr Tymoshenko }; 245f70f23ccSOleksandr Tymoshenko 246f70f23ccSOleksandr Tymoshenko static int uart_pl011_bus_attach(struct uart_softc *); 247f70f23ccSOleksandr Tymoshenko static int uart_pl011_bus_detach(struct uart_softc *); 248f70f23ccSOleksandr Tymoshenko static int uart_pl011_bus_flush(struct uart_softc *, int); 249f70f23ccSOleksandr Tymoshenko static int uart_pl011_bus_getsig(struct uart_softc *); 250f70f23ccSOleksandr Tymoshenko static int uart_pl011_bus_ioctl(struct uart_softc *, int, intptr_t); 251f70f23ccSOleksandr Tymoshenko static int uart_pl011_bus_ipend(struct uart_softc *); 252f70f23ccSOleksandr Tymoshenko static int uart_pl011_bus_param(struct uart_softc *, int, int, int, int); 253f70f23ccSOleksandr Tymoshenko static int uart_pl011_bus_probe(struct uart_softc *); 254f70f23ccSOleksandr Tymoshenko static int uart_pl011_bus_receive(struct uart_softc *); 255f70f23ccSOleksandr Tymoshenko static int uart_pl011_bus_setsig(struct uart_softc *, int); 256f70f23ccSOleksandr Tymoshenko static int uart_pl011_bus_transmit(struct uart_softc *); 257d76a1ef4SWarner Losh static void uart_pl011_bus_grab(struct uart_softc *); 258d76a1ef4SWarner Losh static void uart_pl011_bus_ungrab(struct uart_softc *); 259f70f23ccSOleksandr Tymoshenko 260f70f23ccSOleksandr Tymoshenko static kobj_method_t uart_pl011_methods[] = { 261f70f23ccSOleksandr Tymoshenko KOBJMETHOD(uart_attach, uart_pl011_bus_attach), 262f70f23ccSOleksandr Tymoshenko KOBJMETHOD(uart_detach, uart_pl011_bus_detach), 263f70f23ccSOleksandr Tymoshenko KOBJMETHOD(uart_flush, uart_pl011_bus_flush), 264f70f23ccSOleksandr Tymoshenko KOBJMETHOD(uart_getsig, uart_pl011_bus_getsig), 265f70f23ccSOleksandr Tymoshenko KOBJMETHOD(uart_ioctl, uart_pl011_bus_ioctl), 266f70f23ccSOleksandr Tymoshenko KOBJMETHOD(uart_ipend, uart_pl011_bus_ipend), 267f70f23ccSOleksandr Tymoshenko KOBJMETHOD(uart_param, uart_pl011_bus_param), 268f70f23ccSOleksandr Tymoshenko KOBJMETHOD(uart_probe, uart_pl011_bus_probe), 269f70f23ccSOleksandr Tymoshenko KOBJMETHOD(uart_receive, uart_pl011_bus_receive), 270f70f23ccSOleksandr Tymoshenko KOBJMETHOD(uart_setsig, uart_pl011_bus_setsig), 271f70f23ccSOleksandr Tymoshenko KOBJMETHOD(uart_transmit, uart_pl011_bus_transmit), 272d76a1ef4SWarner Losh KOBJMETHOD(uart_grab, uart_pl011_bus_grab), 273d76a1ef4SWarner Losh KOBJMETHOD(uart_ungrab, uart_pl011_bus_ungrab), 274d76a1ef4SWarner Losh 275f70f23ccSOleksandr Tymoshenko { 0, 0 } 276f70f23ccSOleksandr Tymoshenko }; 277f70f23ccSOleksandr Tymoshenko 2783bb693afSIan Lepore static struct uart_class uart_pl011_class = { 279f70f23ccSOleksandr Tymoshenko "uart_pl011", 280f70f23ccSOleksandr Tymoshenko uart_pl011_methods, 281f70f23ccSOleksandr Tymoshenko sizeof(struct uart_pl011_softc), 282f70f23ccSOleksandr Tymoshenko .uc_ops = &uart_pl011_ops, 283f70f23ccSOleksandr Tymoshenko .uc_range = 0x48, 284405ada37SAndrew Turner .uc_rclk = 0, 285405ada37SAndrew Turner .uc_rshift = 2 286f70f23ccSOleksandr Tymoshenko }; 287f70f23ccSOleksandr Tymoshenko 288cf9df3c5SAndrew Turner 289cf9df3c5SAndrew Turner #ifdef FDT 2903bb693afSIan Lepore static struct ofw_compat_data compat_data[] = { 2913bb693afSIan Lepore {"arm,pl011", (uintptr_t)&uart_pl011_class}, 2923bb693afSIan Lepore {NULL, (uintptr_t)NULL}, 2933bb693afSIan Lepore }; 2943bb693afSIan Lepore UART_FDT_CLASS_AND_DEVICE(compat_data); 295cf9df3c5SAndrew Turner #endif 296cf9df3c5SAndrew Turner 297cf9df3c5SAndrew Turner #ifdef DEV_ACPI 298cf9df3c5SAndrew Turner static struct acpi_uart_compat_data acpi_compat_data[] = { 299eba1a249SAndrew Turner {"ARMH0011", &uart_pl011_class, ACPI_DBG2_ARM_PL011}, 300eba1a249SAndrew Turner {NULL, NULL, 0}, 301cf9df3c5SAndrew Turner }; 302cf9df3c5SAndrew Turner UART_ACPI_CLASS_AND_DEVICE(acpi_compat_data); 303cf9df3c5SAndrew Turner #endif 3043bb693afSIan Lepore 305f70f23ccSOleksandr Tymoshenko static int 306f70f23ccSOleksandr Tymoshenko uart_pl011_bus_attach(struct uart_softc *sc) 307f70f23ccSOleksandr Tymoshenko { 308660c1ea0SJayachandran C. struct uart_pl011_softc *psc; 309f70f23ccSOleksandr Tymoshenko struct uart_bas *bas; 310f70f23ccSOleksandr Tymoshenko 311660c1ea0SJayachandran C. psc = (struct uart_pl011_softc *)sc; 312f70f23ccSOleksandr Tymoshenko bas = &sc->sc_bas; 31383dbea14SRuslan Bukin 31483dbea14SRuslan Bukin /* Enable interrupts */ 315660c1ea0SJayachandran C. psc->imsc = (UART_RXREADY | RIS_RTIM | UART_TXEMPTY); 316660c1ea0SJayachandran C. __uart_setreg(bas, UART_IMSC, psc->imsc); 31783dbea14SRuslan Bukin 31883dbea14SRuslan Bukin /* Clear interrupts */ 319f70f23ccSOleksandr Tymoshenko __uart_setreg(bas, UART_ICR, IMSC_MASK_ALL); 320f70f23ccSOleksandr Tymoshenko 321f70f23ccSOleksandr Tymoshenko return (0); 322f70f23ccSOleksandr Tymoshenko } 323f70f23ccSOleksandr Tymoshenko 324f70f23ccSOleksandr Tymoshenko static int 325f70f23ccSOleksandr Tymoshenko uart_pl011_bus_detach(struct uart_softc *sc) 326f70f23ccSOleksandr Tymoshenko { 327f70f23ccSOleksandr Tymoshenko 328f70f23ccSOleksandr Tymoshenko return (0); 329f70f23ccSOleksandr Tymoshenko } 330f70f23ccSOleksandr Tymoshenko 331f70f23ccSOleksandr Tymoshenko static int 332f70f23ccSOleksandr Tymoshenko uart_pl011_bus_flush(struct uart_softc *sc, int what) 333f70f23ccSOleksandr Tymoshenko { 334f70f23ccSOleksandr Tymoshenko 335f70f23ccSOleksandr Tymoshenko return (0); 336f70f23ccSOleksandr Tymoshenko } 337f70f23ccSOleksandr Tymoshenko 338f70f23ccSOleksandr Tymoshenko static int 339f70f23ccSOleksandr Tymoshenko uart_pl011_bus_getsig(struct uart_softc *sc) 340f70f23ccSOleksandr Tymoshenko { 341f70f23ccSOleksandr Tymoshenko 342f70f23ccSOleksandr Tymoshenko return (0); 343f70f23ccSOleksandr Tymoshenko } 344f70f23ccSOleksandr Tymoshenko 345f70f23ccSOleksandr Tymoshenko static int 346f70f23ccSOleksandr Tymoshenko uart_pl011_bus_ioctl(struct uart_softc *sc, int request, intptr_t data) 347f70f23ccSOleksandr Tymoshenko { 348f70f23ccSOleksandr Tymoshenko struct uart_bas *bas; 349f70f23ccSOleksandr Tymoshenko int error; 350f70f23ccSOleksandr Tymoshenko 351f70f23ccSOleksandr Tymoshenko bas = &sc->sc_bas; 352f70f23ccSOleksandr Tymoshenko error = 0; 353f70f23ccSOleksandr Tymoshenko uart_lock(sc->sc_hwmtx); 354f70f23ccSOleksandr Tymoshenko switch (request) { 355f70f23ccSOleksandr Tymoshenko case UART_IOCTL_BREAK: 356f70f23ccSOleksandr Tymoshenko break; 357f70f23ccSOleksandr Tymoshenko case UART_IOCTL_BAUD: 358f70f23ccSOleksandr Tymoshenko *(int*)data = 115200; 359f70f23ccSOleksandr Tymoshenko break; 360f70f23ccSOleksandr Tymoshenko default: 361f70f23ccSOleksandr Tymoshenko error = EINVAL; 362f70f23ccSOleksandr Tymoshenko break; 363f70f23ccSOleksandr Tymoshenko } 364f70f23ccSOleksandr Tymoshenko uart_unlock(sc->sc_hwmtx); 365f70f23ccSOleksandr Tymoshenko 366f70f23ccSOleksandr Tymoshenko return (error); 367f70f23ccSOleksandr Tymoshenko } 368f70f23ccSOleksandr Tymoshenko 369f70f23ccSOleksandr Tymoshenko static int 370f70f23ccSOleksandr Tymoshenko uart_pl011_bus_ipend(struct uart_softc *sc) 371f70f23ccSOleksandr Tymoshenko { 372660c1ea0SJayachandran C. struct uart_pl011_softc *psc; 373f70f23ccSOleksandr Tymoshenko struct uart_bas *bas; 374f70f23ccSOleksandr Tymoshenko uint32_t ints; 37583dbea14SRuslan Bukin int ipend; 376f70f23ccSOleksandr Tymoshenko 377660c1ea0SJayachandran C. psc = (struct uart_pl011_softc *)sc; 378f70f23ccSOleksandr Tymoshenko bas = &sc->sc_bas; 379660c1ea0SJayachandran C. 380f70f23ccSOleksandr Tymoshenko uart_lock(sc->sc_hwmtx); 381f70f23ccSOleksandr Tymoshenko ints = __uart_getreg(bas, UART_MIS); 382f70f23ccSOleksandr Tymoshenko ipend = 0; 383f70f23ccSOleksandr Tymoshenko 38483dbea14SRuslan Bukin if (ints & (UART_RXREADY | RIS_RTIM)) 385f70f23ccSOleksandr Tymoshenko ipend |= SER_INT_RXREADY; 386f70f23ccSOleksandr Tymoshenko if (ints & RIS_BE) 387f70f23ccSOleksandr Tymoshenko ipend |= SER_INT_BREAK; 388f70f23ccSOleksandr Tymoshenko if (ints & RIS_OE) 389f70f23ccSOleksandr Tymoshenko ipend |= SER_INT_OVERRUN; 390f70f23ccSOleksandr Tymoshenko if (ints & UART_TXEMPTY) { 391f70f23ccSOleksandr Tymoshenko if (sc->sc_txbusy) 392f70f23ccSOleksandr Tymoshenko ipend |= SER_INT_TXIDLE; 393f70f23ccSOleksandr Tymoshenko 39483dbea14SRuslan Bukin /* Disable TX interrupt */ 395660c1ea0SJayachandran C. __uart_setreg(bas, UART_IMSC, psc->imsc & ~UART_TXEMPTY); 396f70f23ccSOleksandr Tymoshenko } 397f70f23ccSOleksandr Tymoshenko 398f70f23ccSOleksandr Tymoshenko uart_unlock(sc->sc_hwmtx); 399f70f23ccSOleksandr Tymoshenko 400f70f23ccSOleksandr Tymoshenko return (ipend); 401f70f23ccSOleksandr Tymoshenko } 402f70f23ccSOleksandr Tymoshenko 403f70f23ccSOleksandr Tymoshenko static int 404f70f23ccSOleksandr Tymoshenko uart_pl011_bus_param(struct uart_softc *sc, int baudrate, int databits, 405f70f23ccSOleksandr Tymoshenko int stopbits, int parity) 406f70f23ccSOleksandr Tymoshenko { 407f70f23ccSOleksandr Tymoshenko 408f70f23ccSOleksandr Tymoshenko uart_lock(sc->sc_hwmtx); 409a0eae699SOleksandr Tymoshenko uart_pl011_param(&sc->sc_bas, baudrate, databits, stopbits, parity); 410f70f23ccSOleksandr Tymoshenko uart_unlock(sc->sc_hwmtx); 411f70f23ccSOleksandr Tymoshenko 412f70f23ccSOleksandr Tymoshenko return (0); 413f70f23ccSOleksandr Tymoshenko } 414f70f23ccSOleksandr Tymoshenko 415f70f23ccSOleksandr Tymoshenko static int 416f70f23ccSOleksandr Tymoshenko uart_pl011_bus_probe(struct uart_softc *sc) 417f70f23ccSOleksandr Tymoshenko { 418f70f23ccSOleksandr Tymoshenko 419f70f23ccSOleksandr Tymoshenko device_set_desc(sc->sc_dev, "PrimeCell UART (PL011)"); 420f70f23ccSOleksandr Tymoshenko 42143ad57d3SJayachandran C. sc->sc_rxfifosz = 16; 422*752e8c08SIan Lepore sc->sc_txfifosz = 8; 4234d7abca0SIan Lepore 424f70f23ccSOleksandr Tymoshenko return (0); 425f70f23ccSOleksandr Tymoshenko } 426f70f23ccSOleksandr Tymoshenko 427f70f23ccSOleksandr Tymoshenko static int 428f70f23ccSOleksandr Tymoshenko uart_pl011_bus_receive(struct uart_softc *sc) 429f70f23ccSOleksandr Tymoshenko { 430f70f23ccSOleksandr Tymoshenko struct uart_bas *bas; 431f70f23ccSOleksandr Tymoshenko uint32_t ints, xc; 43283dbea14SRuslan Bukin int rx; 433f70f23ccSOleksandr Tymoshenko 434f70f23ccSOleksandr Tymoshenko bas = &sc->sc_bas; 435f70f23ccSOleksandr Tymoshenko uart_lock(sc->sc_hwmtx); 436f70f23ccSOleksandr Tymoshenko 437*752e8c08SIan Lepore for (;;) { 438*752e8c08SIan Lepore ints = __uart_getreg(bas, UART_FR); 439*752e8c08SIan Lepore if (ints & FR_RXFE) 440*752e8c08SIan Lepore break; 441f70f23ccSOleksandr Tymoshenko if (uart_rx_full(sc)) { 442f70f23ccSOleksandr Tymoshenko sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN; 443f70f23ccSOleksandr Tymoshenko break; 444f70f23ccSOleksandr Tymoshenko } 445cbee50f1SJayachandran C. 446f70f23ccSOleksandr Tymoshenko xc = __uart_getreg(bas, UART_DR); 447f70f23ccSOleksandr Tymoshenko rx = xc & 0xff; 448f70f23ccSOleksandr Tymoshenko 449f70f23ccSOleksandr Tymoshenko if (xc & DR_FE) 450f70f23ccSOleksandr Tymoshenko rx |= UART_STAT_FRAMERR; 451f70f23ccSOleksandr Tymoshenko if (xc & DR_PE) 452f70f23ccSOleksandr Tymoshenko rx |= UART_STAT_PARERR; 453f70f23ccSOleksandr Tymoshenko 454f70f23ccSOleksandr Tymoshenko uart_rx_put(sc, rx); 455f70f23ccSOleksandr Tymoshenko } 456f70f23ccSOleksandr Tymoshenko 457f70f23ccSOleksandr Tymoshenko uart_unlock(sc->sc_hwmtx); 458f70f23ccSOleksandr Tymoshenko 459f70f23ccSOleksandr Tymoshenko return (0); 460f70f23ccSOleksandr Tymoshenko } 461f70f23ccSOleksandr Tymoshenko 462f70f23ccSOleksandr Tymoshenko static int 463f70f23ccSOleksandr Tymoshenko uart_pl011_bus_setsig(struct uart_softc *sc, int sig) 464f70f23ccSOleksandr Tymoshenko { 465f70f23ccSOleksandr Tymoshenko 466f70f23ccSOleksandr Tymoshenko return (0); 467f70f23ccSOleksandr Tymoshenko } 468f70f23ccSOleksandr Tymoshenko 469f70f23ccSOleksandr Tymoshenko static int 470f70f23ccSOleksandr Tymoshenko uart_pl011_bus_transmit(struct uart_softc *sc) 471f70f23ccSOleksandr Tymoshenko { 472660c1ea0SJayachandran C. struct uart_pl011_softc *psc; 473f70f23ccSOleksandr Tymoshenko struct uart_bas *bas; 474f70f23ccSOleksandr Tymoshenko int i; 475f70f23ccSOleksandr Tymoshenko 476660c1ea0SJayachandran C. psc = (struct uart_pl011_softc *)sc; 477f70f23ccSOleksandr Tymoshenko bas = &sc->sc_bas; 478f70f23ccSOleksandr Tymoshenko uart_lock(sc->sc_hwmtx); 479f70f23ccSOleksandr Tymoshenko 480f70f23ccSOleksandr Tymoshenko for (i = 0; i < sc->sc_txdatasz; i++) { 481f70f23ccSOleksandr Tymoshenko __uart_setreg(bas, UART_DR, sc->sc_txbuf[i]); 482f70f23ccSOleksandr Tymoshenko uart_barrier(bas); 483f70f23ccSOleksandr Tymoshenko } 48483724a87SAndrew Turner 48543ad57d3SJayachandran C. /* Mark busy and enable TX interrupt */ 486f70f23ccSOleksandr Tymoshenko sc->sc_txbusy = 1; 487660c1ea0SJayachandran C. __uart_setreg(bas, UART_IMSC, psc->imsc); 48883dbea14SRuslan Bukin 489f70f23ccSOleksandr Tymoshenko uart_unlock(sc->sc_hwmtx); 490f70f23ccSOleksandr Tymoshenko 491f70f23ccSOleksandr Tymoshenko return (0); 492f70f23ccSOleksandr Tymoshenko } 493d76a1ef4SWarner Losh 494d76a1ef4SWarner Losh static void 495d76a1ef4SWarner Losh uart_pl011_bus_grab(struct uart_softc *sc) 496d76a1ef4SWarner Losh { 497660c1ea0SJayachandran C. struct uart_pl011_softc *psc; 498d76a1ef4SWarner Losh struct uart_bas *bas; 499d76a1ef4SWarner Losh 500660c1ea0SJayachandran C. psc = (struct uart_pl011_softc *)sc; 501d76a1ef4SWarner Losh bas = &sc->sc_bas; 502660c1ea0SJayachandran C. 503660c1ea0SJayachandran C. /* Disable interrupts on switch to polling */ 504d76a1ef4SWarner Losh uart_lock(sc->sc_hwmtx); 505660c1ea0SJayachandran C. __uart_setreg(bas, UART_IMSC, psc->imsc & ~IMSC_MASK_ALL); 506d76a1ef4SWarner Losh uart_unlock(sc->sc_hwmtx); 507d76a1ef4SWarner Losh } 508d76a1ef4SWarner Losh 509d76a1ef4SWarner Losh static void 510d76a1ef4SWarner Losh uart_pl011_bus_ungrab(struct uart_softc *sc) 511d76a1ef4SWarner Losh { 512660c1ea0SJayachandran C. struct uart_pl011_softc *psc; 513d76a1ef4SWarner Losh struct uart_bas *bas; 514d76a1ef4SWarner Losh 515660c1ea0SJayachandran C. psc = (struct uart_pl011_softc *)sc; 516d76a1ef4SWarner Losh bas = &sc->sc_bas; 517660c1ea0SJayachandran C. 518660c1ea0SJayachandran C. /* Switch to using interrupts while not grabbed */ 519d76a1ef4SWarner Losh uart_lock(sc->sc_hwmtx); 520660c1ea0SJayachandran C. __uart_setreg(bas, UART_IMSC, psc->imsc); 521d76a1ef4SWarner Losh uart_unlock(sc->sc_hwmtx); 522d76a1ef4SWarner Losh } 523