xref: /freebsd/sys/dev/scc/scc_dev_quicc.c (revision db612abe8df3355d1eb23bb3b50fdd97bc21e979)
1 /*-
2  * Copyright (c) 2004-2006 Marcel Moolenaar
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  *
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  */
26 
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
29 
30 #define __RMAN_RESOURCE_VISIBLE
31 
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/bus.h>
35 #include <sys/conf.h>
36 #include <sys/endian.h>
37 #include <machine/bus.h>
38 #include <sys/rman.h>
39 #include <sys/serial.h>
40 
41 #include <dev/scc/scc_bfe.h>
42 #include <dev/scc/scc_bus.h>
43 
44 #include <dev/ic/quicc.h>
45 
46 #include "scc_if.h"
47 
48 #define	quicc_read2(bas, reg)		\
49 	bus_space_read_2((bas)->bst, (bas)->bsh, reg)
50 
51 #define	quicc_write2(bas, reg, val)	\
52 	bus_space_write_2((bas)->bst, (bas)->bsh, reg, val)
53 
54 static int quicc_bfe_attach(struct scc_softc *, int);
55 static int quicc_bfe_enabled(struct scc_softc *, struct scc_chan *);
56 static int quicc_bfe_iclear(struct scc_softc *, struct scc_chan *);
57 static int quicc_bfe_ipend(struct scc_softc *);
58 static int quicc_bfe_probe(struct scc_softc *);
59 
60 static kobj_method_t quicc_methods[] = {
61 	KOBJMETHOD(scc_attach,	quicc_bfe_attach),
62 	KOBJMETHOD(scc_enabled,	quicc_bfe_enabled),
63 	KOBJMETHOD(scc_iclear,	quicc_bfe_iclear),
64 	KOBJMETHOD(scc_ipend,	quicc_bfe_ipend),
65 	KOBJMETHOD(scc_probe,	quicc_bfe_probe),
66 	{ 0, 0 }
67 };
68 
69 struct scc_class scc_quicc_class = {
70 	"QUICC class",
71 	quicc_methods,
72 	sizeof(struct scc_softc),
73 	.cl_channels = 4,
74 	.cl_class = SCC_CLASS_QUICC,
75 	.cl_modes = SCC_MODE_ASYNC | SCC_MODE_BISYNC | SCC_MODE_HDLC,
76 	.cl_range = 0,
77 };
78 
79 static int
80 quicc_bfe_attach(struct scc_softc *sc, int reset)
81 {
82 	struct scc_bas *bas;
83 
84 	bas = &sc->sc_bas;
85 	return (0);
86 }
87 
88 static int
89 quicc_bfe_enabled(struct scc_softc *sc, struct scc_chan *ch)
90 {
91 	struct scc_bas *bas;
92 	int unit;
93 	uint16_t val0, val1;
94 
95 	bas = &sc->sc_bas;
96 	unit = ch->ch_nr - 1;
97 	val0 = quicc_read2(bas, QUICC_REG_SCC_TODR(unit));
98 	quicc_write2(bas, QUICC_REG_SCC_TODR(unit), ~val0);
99 	val1 = quicc_read2(bas, QUICC_REG_SCC_TODR(unit));
100 	quicc_write2(bas, QUICC_REG_SCC_TODR(unit), val0);
101 	return (((val0 | val1) == 0x8000) ? 1 : 0);
102 }
103 
104 static int
105 quicc_bfe_iclear(struct scc_softc *sc, struct scc_chan *ch)
106 {
107 
108 	return (0);
109 }
110 
111 static int
112 quicc_bfe_ipend(struct scc_softc *sc)
113 {
114 	struct scc_bas *bas;
115 	struct scc_chan *ch;
116 	int c, ipend;
117 	uint16_t scce;
118 
119 	bas = &sc->sc_bas;
120 	ipend = 0;
121 	for (c = 0; c < 4; c++) {
122 		ch = &sc->sc_chan[c];
123 		if (!ch->ch_enabled)
124 			continue;
125 		ch->ch_ipend = 0;
126 		mtx_lock_spin(&sc->sc_hwmtx);
127 		scce = quicc_read2(bas, QUICC_REG_SCC_SCCE(c));
128 		quicc_write2(bas, QUICC_REG_SCC_SCCE(c), ~0);
129 		mtx_unlock_spin(&sc->sc_hwmtx);
130 		if (scce & 0x0001)
131 			ch->ch_ipend |= SER_INT_RXREADY;
132 		if (scce & 0x0002)
133 			ch->ch_ipend |= SER_INT_TXIDLE;
134 		if (scce & 0x0004)
135 			ch->ch_ipend |= SER_INT_OVERRUN;
136 		if (scce & 0x0020)
137 			ch->ch_ipend |= SER_INT_BREAK;
138 		/* XXX SIGNALS */
139 		ipend |= ch->ch_ipend;
140 	}
141 	return (ipend);
142 }
143 
144 static int
145 quicc_bfe_probe(struct scc_softc *sc)
146 {
147 	struct scc_bas *bas;
148 
149 	bas = &sc->sc_bas;
150 	return (0);
151 }
152