xref: /freebsd/sys/dev/scc/scc_dev_quicc.c (revision 8eb2bee6c0f4957c6c1cea826e59cda4d18a2a64)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2004-2006 Marcel Moolenaar
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  *
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
31 
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/bus.h>
35 #include <sys/conf.h>
36 #include <machine/bus.h>
37 #include <sys/lock.h>
38 #include <sys/mutex.h>
39 #include <sys/rman.h>
40 #include <sys/serial.h>
41 
42 #include <dev/scc/scc_bfe.h>
43 #include <dev/scc/scc_bus.h>
44 
45 #include <dev/ic/quicc.h>
46 
47 #include "scc_if.h"
48 
49 #define	quicc_read2(bas, reg)		\
50 	bus_space_read_2((bas)->bst, (bas)->bsh, reg)
51 #define	quicc_read4(bas, reg)		\
52 	bus_space_read_4((bas)->bst, (bas)->bsh, reg)
53 
54 #define	quicc_write2(bas, reg, val)	\
55 	bus_space_write_2((bas)->bst, (bas)->bsh, reg, val)
56 #define	quicc_write4(bas, reg, val)	\
57 	bus_space_write_4((bas)->bst, (bas)->bsh, reg, val)
58 
59 static int quicc_bfe_attach(struct scc_softc *, int);
60 static int quicc_bfe_enabled(struct scc_softc *, struct scc_chan *);
61 static int quicc_bfe_iclear(struct scc_softc *, struct scc_chan *);
62 static int quicc_bfe_ipend(struct scc_softc *);
63 static int quicc_bfe_probe(struct scc_softc *);
64 
65 static kobj_method_t quicc_methods[] = {
66 	KOBJMETHOD(scc_attach,	quicc_bfe_attach),
67 	KOBJMETHOD(scc_enabled,	quicc_bfe_enabled),
68 	KOBJMETHOD(scc_iclear,	quicc_bfe_iclear),
69 	KOBJMETHOD(scc_ipend,	quicc_bfe_ipend),
70 	KOBJMETHOD(scc_probe,	quicc_bfe_probe),
71 	KOBJMETHOD_END
72 };
73 
74 struct scc_class scc_quicc_class = {
75 	"QUICC class",
76 	quicc_methods,
77 	sizeof(struct scc_softc),
78 	.cl_channels = 4,
79 	.cl_class = SCC_CLASS_QUICC,
80 	.cl_modes = SCC_MODE_ASYNC | SCC_MODE_BISYNC | SCC_MODE_HDLC,
81 	.cl_range = 0,
82 };
83 
84 static int
85 quicc_bfe_attach(struct scc_softc *sc __unused, int reset __unused)
86 {
87 
88 	return (0);
89 }
90 
91 static int
92 quicc_bfe_enabled(struct scc_softc *sc, struct scc_chan *ch)
93 {
94 	struct scc_bas *bas;
95 	int unit;
96 	uint16_t val0, val1;
97 
98 	bas = &sc->sc_bas;
99 	unit = ch->ch_nr - 1;
100 	val0 = quicc_read2(bas, QUICC_REG_SCC_TODR(unit));
101 	quicc_write2(bas, QUICC_REG_SCC_TODR(unit), ~val0);
102 	val1 = quicc_read2(bas, QUICC_REG_SCC_TODR(unit));
103 	quicc_write2(bas, QUICC_REG_SCC_TODR(unit), val0);
104 	return (((val0 | val1) == 0x8000) ? 1 : 0);
105 }
106 
107 static int
108 quicc_bfe_iclear(struct scc_softc *sc, struct scc_chan *ch)
109 {
110 	struct scc_bas *bas;
111 	uint16_t rb, st;
112 
113 	bas = &sc->sc_bas;
114 	mtx_lock_spin(&sc->sc_hwmtx);
115 	if (ch->ch_ipend & SER_INT_RXREADY) {
116 		rb = quicc_read2(bas, QUICC_PRAM_SCC_RBASE(ch->ch_nr - 1));
117 		st = quicc_read2(bas, rb);
118 		(void)quicc_read4(bas, rb + 4);
119 		quicc_write2(bas, rb, st | 0x9000);
120 	}
121 	mtx_unlock_spin(&sc->sc_hwmtx);
122 	return (0);
123 }
124 
125 static int
126 quicc_bfe_ipend(struct scc_softc *sc)
127 {
128 	struct scc_bas *bas;
129 	struct scc_chan *ch;
130 	int c, ipend;
131 	uint16_t scce;
132 
133 	bas = &sc->sc_bas;
134 	ipend = 0;
135 	for (c = 0; c < 4; c++) {
136 		ch = &sc->sc_chan[c];
137 		if (!ch->ch_enabled)
138 			continue;
139 		ch->ch_ipend = 0;
140 		mtx_lock_spin(&sc->sc_hwmtx);
141 		scce = quicc_read2(bas, QUICC_REG_SCC_SCCE(c));
142 		quicc_write2(bas, QUICC_REG_SCC_SCCE(c), ~0);
143 		mtx_unlock_spin(&sc->sc_hwmtx);
144 		if (scce & 0x0001)
145 			ch->ch_ipend |= SER_INT_RXREADY;
146 		if (scce & 0x0002)
147 			ch->ch_ipend |= SER_INT_TXIDLE;
148 		if (scce & 0x0004)
149 			ch->ch_ipend |= SER_INT_OVERRUN;
150 		if (scce & 0x0020)
151 			ch->ch_ipend |= SER_INT_BREAK;
152 		/* XXX SIGNALS */
153 		ipend |= ch->ch_ipend;
154 	}
155 	return (ipend);
156 }
157 
158 static int
159 quicc_bfe_probe(struct scc_softc *sc __unused)
160 {
161 
162 	return (0);
163 }
164