1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2025, Adrian Chadd <adrian@FreeBSD.org>
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice unmodified, this list of conditions, and the following
11 * disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 */
27
28 #include <sys/param.h>
29 #include <sys/kernel.h>
30 #include <sys/malloc.h>
31 #include <sys/module.h>
32 #include <sys/sglist.h>
33 #include <sys/random.h>
34 #include <sys/stdatomic.h>
35 #include <sys/mutex.h>
36
37 #include <machine/bus.h>
38 #include <machine/resource.h>
39 #include <sys/bus.h>
40
41 #include <dev/fdt/fdt_common.h>
42 #include <dev/ofw/ofw_bus.h>
43 #include <dev/ofw/ofw_bus_subr.h>
44
45 #include "qcom_gcc_var.h"
46
47 int
qcom_gcc_clock_read(device_t dev,bus_addr_t addr,uint32_t * val)48 qcom_gcc_clock_read(device_t dev, bus_addr_t addr, uint32_t *val)
49 {
50 struct qcom_gcc_softc *sc;
51
52 sc = device_get_softc(dev);
53 *val = bus_read_4(sc->reg, addr);
54 return (0);
55 }
56
57 int
qcom_gcc_clock_write(device_t dev,bus_addr_t addr,uint32_t val)58 qcom_gcc_clock_write(device_t dev, bus_addr_t addr, uint32_t val)
59 {
60 struct qcom_gcc_softc *sc;
61
62 sc = device_get_softc(dev);
63 bus_write_4(sc->reg, addr, val);
64 return (0);
65 }
66
67 int
qcom_gcc_clock_modify(device_t dev,bus_addr_t addr,uint32_t clear_mask,uint32_t set_mask)68 qcom_gcc_clock_modify(device_t dev, bus_addr_t addr,
69 uint32_t clear_mask, uint32_t set_mask)
70 {
71 struct qcom_gcc_softc *sc;
72 uint32_t reg;
73
74 sc = device_get_softc(dev);
75 reg = bus_read_4(sc->reg, addr);
76 reg &= clear_mask;
77 reg |= set_mask;
78 bus_write_4(sc->reg, addr, reg);
79 return (0);
80 }
81
82 void
qcom_gcc_clock_lock(device_t dev)83 qcom_gcc_clock_lock(device_t dev)
84 {
85 struct qcom_gcc_softc *sc;
86
87 sc = device_get_softc(dev);
88 mtx_lock(&sc->mtx);
89 }
90
91 void
qcom_gcc_clock_unlock(device_t dev)92 qcom_gcc_clock_unlock(device_t dev)
93 {
94 struct qcom_gcc_softc *sc;
95
96 sc = device_get_softc(dev);
97 mtx_unlock(&sc->mtx);
98 }
99