1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007 - 2022 Intel Corporation */
3 #include "qat_freebsd.h"
4 #include "adf_cfg.h"
5 #include "adf_common_drv.h"
6 #include "adf_accel_devices.h"
7 #include "adf_4xxx_hw_data.h"
8 #include "adf_gen4_hw_data.h"
9 #include "adf_fw_counters.h"
10 #include "adf_cfg_device.h"
11 #include <sys/types.h>
12 #include <sys/kernel.h>
13 #include <sys/malloc.h>
14 #include <machine/bus_dma.h>
15 #include <dev/pci/pcireg.h>
16 #include "adf_heartbeat_dbg.h"
17 #include "adf_cnvnr_freq_counters.h"
18
19 static MALLOC_DEFINE(M_QAT_4XXX, "qat_4xxx", "qat_4xxx");
20
21 #define ADF_SYSTEM_DEVICE(device_id) \
22 { \
23 PCI_VENDOR_ID_INTEL, device_id \
24 }
25
26 static const struct pci_device_id adf_pci_tbl[] =
27 { ADF_SYSTEM_DEVICE(ADF_4XXX_PCI_DEVICE_ID),
28 ADF_SYSTEM_DEVICE(ADF_401XX_PCI_DEVICE_ID),
29 {
30 0,
31 } };
32
33 static int
adf_probe(device_t dev)34 adf_probe(device_t dev)
35 {
36 const struct pci_device_id *id;
37
38 for (id = adf_pci_tbl; id->vendor != 0; id++) {
39 if (pci_get_vendor(dev) == id->vendor &&
40 pci_get_device(dev) == id->device) {
41 device_set_desc(dev,
42 "Intel " ADF_4XXX_DEVICE_NAME
43 " QuickAssist");
44 return BUS_PROBE_GENERIC;
45 }
46 }
47 return ENXIO;
48 }
49
50 static void
adf_cleanup_accel(struct adf_accel_dev * accel_dev)51 adf_cleanup_accel(struct adf_accel_dev *accel_dev)
52 {
53 struct adf_accel_pci *accel_pci_dev = &accel_dev->accel_pci_dev;
54 int i;
55
56 if (accel_dev->dma_tag)
57 bus_dma_tag_destroy(accel_dev->dma_tag);
58 for (i = 0; i < ADF_PCI_MAX_BARS; i++) {
59 struct adf_bar *bar = &accel_pci_dev->pci_bars[i];
60
61 if (bar->virt_addr)
62 bus_free_resource(accel_pci_dev->pci_dev,
63 SYS_RES_MEMORY,
64 bar->virt_addr);
65 }
66
67 if (accel_dev->hw_device) {
68 switch (pci_get_device(accel_pci_dev->pci_dev)) {
69 case ADF_4XXX_PCI_DEVICE_ID:
70 case ADF_401XX_PCI_DEVICE_ID:
71 adf_clean_hw_data_4xxx(accel_dev->hw_device);
72 break;
73 default:
74 break;
75 }
76 free(accel_dev->hw_device, M_QAT_4XXX);
77 accel_dev->hw_device = NULL;
78 }
79 adf_cfg_dev_remove(accel_dev);
80 adf_devmgr_rm_dev(accel_dev, NULL);
81 }
82
83 static int
adf_attach(device_t dev)84 adf_attach(device_t dev)
85 {
86 struct adf_accel_dev *accel_dev;
87 struct adf_accel_pci *accel_pci_dev;
88 struct adf_hw_device_data *hw_data;
89 unsigned int bar_nr;
90 int ret, rid;
91 struct adf_cfg_device *cfg_dev = NULL;
92
93 /* Set pci MaxPayLoad to 512. Implemented to avoid the issue of
94 * Pci-passthrough causing Maxpayload to be reset to 128 bytes
95 * when the device is reset.
96 */
97 if (pci_get_max_payload(dev) != 512)
98 pci_set_max_payload(dev, 512);
99
100 accel_dev = device_get_softc(dev);
101
102 INIT_LIST_HEAD(&accel_dev->crypto_list);
103 accel_pci_dev = &accel_dev->accel_pci_dev;
104 accel_pci_dev->pci_dev = dev;
105
106 if (bus_get_domain(dev, &accel_pci_dev->node) != 0)
107 accel_pci_dev->node = 0;
108
109 /* Add accel device to accel table.
110 * This should be called before adf_cleanup_accel is called
111 */
112 if (adf_devmgr_add_dev(accel_dev, NULL)) {
113 device_printf(dev, "Failed to add new accelerator device.\n");
114 return ENXIO;
115 }
116
117 /* Allocate and configure device configuration structure */
118 hw_data = malloc(sizeof(*hw_data), M_QAT_4XXX, M_WAITOK | M_ZERO);
119
120 accel_dev->hw_device = hw_data;
121 adf_init_hw_data_4xxx(accel_dev->hw_device, pci_get_device(dev));
122 accel_pci_dev->revid = pci_get_revid(dev);
123 hw_data->fuses = pci_read_config(dev, ADF_4XXX_FUSECTL4_OFFSET, 4);
124 if (accel_pci_dev->revid == 0x00) {
125 device_printf(dev, "A0 stepping is not supported.\n");
126 ret = ENODEV;
127 goto out_err;
128 }
129
130 /* Get PPAERUCM values and store */
131 ret = adf_aer_store_ppaerucm_reg(dev, hw_data);
132 if (ret)
133 goto out_err;
134
135 /* Get Accelerators and Accelerators Engines masks */
136 hw_data->accel_mask = hw_data->get_accel_mask(accel_dev);
137 hw_data->ae_mask = hw_data->get_ae_mask(accel_dev);
138
139 accel_pci_dev->sku = hw_data->get_sku(hw_data);
140 /* If the device has no acceleration engines then ignore it. */
141 if (!hw_data->accel_mask || !hw_data->ae_mask ||
142 (~hw_data->ae_mask & 0x01)) {
143 device_printf(dev, "No acceleration units found\n");
144 ret = ENXIO;
145 goto out_err;
146 }
147
148 /* Create device configuration table */
149 ret = adf_cfg_dev_add(accel_dev);
150 if (ret)
151 goto out_err;
152 ret = adf_clock_debugfs_add(accel_dev);
153 if (ret)
154 goto out_err;
155
156 pci_set_max_read_req(dev, 4096);
157
158 ret = bus_dma_tag_create(bus_get_dma_tag(dev),
159 1,
160 0,
161 BUS_SPACE_MAXADDR,
162 BUS_SPACE_MAXADDR,
163 NULL,
164 NULL,
165 BUS_SPACE_MAXSIZE,
166 /* BUS_SPACE_UNRESTRICTED */ 1,
167 BUS_SPACE_MAXSIZE,
168 0,
169 NULL,
170 NULL,
171 &accel_dev->dma_tag);
172 if (ret)
173 goto out_err;
174
175 if (hw_data->get_accel_cap) {
176 hw_data->accel_capabilities_mask =
177 hw_data->get_accel_cap(accel_dev);
178 }
179
180 /* Find and map all the device's BARS */
181 /* Logical BARs configuration for 64bit BARs:
182 bar 0 and 1 - logical BAR0
183 bar 2 and 3 - logical BAR1
184 bar 4 and 5 - logical BAR3
185 */
186 for (bar_nr = 0;
187 bar_nr < (ADF_PCI_MAX_BARS * 2) && bar_nr < PCIR_MAX_BAR_0;
188 bar_nr += 2) {
189 struct adf_bar *bar;
190
191 rid = PCIR_BAR(bar_nr);
192 bar = &accel_pci_dev->pci_bars[bar_nr / 2];
193
194 bar->virt_addr = bus_alloc_resource_any(dev,
195 SYS_RES_MEMORY,
196 &rid,
197 RF_ACTIVE);
198 if (!bar->virt_addr) {
199 device_printf(dev, "Failed to map BAR %d\n", bar_nr);
200 ret = ENXIO;
201 goto out_err;
202 }
203 bar->base_addr = rman_get_start(bar->virt_addr);
204 bar->size = rman_get_size(bar->virt_addr);
205 }
206 pci_enable_busmaster(dev);
207
208 if (!accel_dev->hw_device->config_device) {
209 ret = EFAULT;
210 goto out_err;
211 }
212
213 ret = accel_dev->hw_device->config_device(accel_dev);
214 if (ret)
215 goto out_err;
216
217 ret = adf_dev_init(accel_dev);
218 if (ret)
219 goto out_dev_shutdown;
220
221 ret = adf_dev_start(accel_dev);
222 if (ret)
223 goto out_dev_stop;
224
225 cfg_dev = accel_dev->cfg->dev;
226 adf_cfg_device_clear(cfg_dev, accel_dev);
227 free(cfg_dev, M_QAT);
228 accel_dev->cfg->dev = NULL;
229 return ret;
230 out_dev_stop:
231 adf_dev_stop(accel_dev);
232 out_dev_shutdown:
233 adf_dev_shutdown(accel_dev);
234 out_err:
235 adf_cleanup_accel(accel_dev);
236 return ret;
237 }
238
239 static int
adf_detach(device_t dev)240 adf_detach(device_t dev)
241 {
242 struct adf_accel_dev *accel_dev = device_get_softc(dev);
243
244 if (adf_dev_stop(accel_dev)) {
245 device_printf(dev, "Failed to stop QAT accel dev\n");
246 return EBUSY;
247 }
248
249 adf_dev_shutdown(accel_dev);
250
251 adf_cleanup_accel(accel_dev);
252
253 return 0;
254 }
255
256 static device_method_t adf_methods[] = { DEVMETHOD(device_probe, adf_probe),
257 DEVMETHOD(device_attach, adf_attach),
258 DEVMETHOD(device_detach, adf_detach),
259
260 DEVMETHOD_END };
261
262 static driver_t adf_driver = { "qat",
263 adf_methods,
264 sizeof(struct adf_accel_dev) };
265
266 DRIVER_MODULE_ORDERED(qat_4xxx, pci, adf_driver, NULL, NULL, SI_ORDER_THIRD);
267 MODULE_VERSION(qat_4xxx, 1);
268 MODULE_DEPEND(qat_4xxx, qat_common, 1, 1, 1);
269 MODULE_DEPEND(qat_4xxx, qat_api, 1, 1, 1);
270 MODULE_DEPEND(qat_4xxx, linuxkpi, 1, 1, 1);
271