xref: /freebsd/sys/dev/pms/RefTisa/tisa/sassata/common/tdesgl.c (revision 685dc743dc3b5645e34836464128e1c0558b404b)
1 /*******************************************************************************
2 *Copyright (c) 2014 PMC-Sierra, Inc.  All rights reserved.
3 *
4 *Redistribution and use in source and binary forms, with or without modification, are permitted provided
5 *that the following conditions are met:
6 *1. Redistributions of source code must retain the above copyright notice, this list of conditions and the
7 *following disclaimer.
8 *2. Redistributions in binary form must reproduce the above copyright notice,
9 *this list of conditions and the following disclaimer in the documentation and/or other materials provided
10 *with the distribution.
11 *
12 *THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED
13 *WARRANTIES,INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
14 *FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
15 *FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 *NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
17 *BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
18 *LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
19 *SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
20 
21 **
22 ********************************************************************************/
23 /*******************************************************************************/
24 /** \file
25  *
26  *
27  * This file contains ESGL realted functions
28  *
29  */
30 #include <sys/cdefs.h>
31 #include <dev/pms/config.h>
32 
33 #include <dev/pms/freebsd/driver/common/osenv.h>
34 #include <dev/pms/freebsd/driver/common/ostypes.h>
35 #include <dev/pms/freebsd/driver/common/osdebug.h>
36 
37 #include <dev/pms/RefTisa/sallsdk/api/sa.h>
38 #include <dev/pms/RefTisa/sallsdk/api/saapi.h>
39 #include <dev/pms/RefTisa/sallsdk/api/saosapi.h>
40 
41 #include <dev/pms/RefTisa/tisa/api/titypes.h>
42 #include <dev/pms/RefTisa/tisa/api/ostiapi.h>
43 #include <dev/pms/RefTisa/tisa/api/tiapi.h>
44 #include <dev/pms/RefTisa/tisa/api/tiglobal.h>
45 
46 #ifdef FDS_SM
47 #include <dev/pms/RefTisa/sat/api/sm.h>
48 #include <dev/pms/RefTisa/sat/api/smapi.h>
49 #include <dev/pms/RefTisa/sat/api/tdsmapi.h>
50 #endif
51 
52 #ifdef FDS_DM
53 #include <dev/pms/RefTisa/discovery/api/dm.h>
54 #include <dev/pms/RefTisa/discovery/api/dmapi.h>
55 #include <dev/pms/RefTisa/discovery/api/tddmapi.h>
56 #endif
57 
58 #include <dev/pms/RefTisa/tisa/sassata/sas/common/tdtypes.h>
59 #include <dev/pms/freebsd/driver/common/osstring.h>
60 #include <dev/pms/RefTisa/tisa/sassata/common/tdutil.h>
61 
62 #ifdef INITIATOR_DRIVER
63 #include <dev/pms/RefTisa/tisa/sassata/sas/ini/itdtypes.h>
64 #include <dev/pms/RefTisa/tisa/sassata/sas/ini/itddefs.h>
65 #include <dev/pms/RefTisa/tisa/sassata/sas/ini/itdglobl.h>
66 #endif
67 
68 #ifdef TARGET_DRIVER
69 #include <dev/pms/RefTisa/tisa/sassata/sas/tgt/ttdglobl.h>
70 #include <dev/pms/RefTisa/tisa/sassata/sas/tgt/ttdxchg.h>
71 #include <dev/pms/RefTisa/tisa/sassata/sas/tgt/ttdtypes.h>
72 #endif
73 
74 #include <dev/pms/RefTisa/tisa/sassata/common/tdsatypes.h>
75 #include <dev/pms/RefTisa/tisa/sassata/common/tdproto.h>
76 
77 /* no more esgl related functions */
78 #ifdef REMOVED
79 /*****************************************************************************
80 *! \brief  tdsaEsglInit
81 *
82 *  Purpose: This function initializes the linked list of ESGL pool
83 *
84 *  \param  tiRoot:  Pointer to root data structure.
85 *
86 *  \return: None
87 *
88 *  \note
89 *
90 *****************************************************************************/
91 osGLOBAL void
tdsaEsglInit(tiRoot_t * tiRoot)92 tdsaEsglInit(
93              tiRoot_t *tiRoot
94              )
95 {
96   tdsaRoot_t               *tdsaRoot    = (tdsaRoot_t *)tiRoot->tdData;
97   tdsaContext_t            *tdsaAllShared = (tdsaContext_t *)&tdsaRoot->tdsaAllShared;
98   tdsaEsglAllInfo_t        *pEsglAllInfo = (tdsaEsglAllInfo_t *)&(tdsaAllShared->EsglAllInfo);
99   tdsaEsglPagePool_t       *pEsglPagePool;
100 
101   bit32 pageno;
102   bit32 PagePhysAddrUpper;
103   bit32 PagePhysAddrLower;
104   bit32 prev_PagePhysAddrLower;
105   tdsaEsglPageInfo_t *pEsglPageInfo;
106   void *PageVirtAddr;
107   bit32 PageSizeInBytes;
108 
109   /* for memory index requirement */
110   agsaRoot_t          agRoot;
111   bit32               maxSALocks = 0;
112   bit32               usecsPerTick = 0;
113   agsaSwConfig_t      SwConfig;
114   agsaMemoryRequirement_t memRequirement;
115   agsaQueueConfig_t   *QueueConfig;
116   bit32                i;
117 
118   TI_DBG6(("tdsaEsglInit: start\n"));
119 
120   tdsaGetSwConfigParams(tiRoot);
121   QueueConfig = &tdsaAllShared->QueueConfig;
122 
123   for(i=0;i<QueueConfig->numInboundQueues;i++)
124   {
125     QueueConfig->inboundQueues[i].elementCount = tdsaAllShared->InboundQueueSize;
126     QueueConfig->inboundQueues[i].elementSize = tdsaAllShared->InboundQueueEleSize;
127     QueueConfig->inboundQueues[i].priority = tdsaAllShared->InboundQueuePriority[i];
128     QueueConfig->inboundQueues[i].reserved = 0;
129   }
130   for(i=0;i<QueueConfig->numOutboundQueues;i++)
131   {
132     QueueConfig->outboundQueues[i].elementCount = tdsaAllShared->OutboundQueueSize;
133     QueueConfig->outboundQueues[i].elementSize = tdsaAllShared->OutboundQueueEleSize;
134     QueueConfig->outboundQueues[i].interruptDelay = tdsaAllShared->OutboundQueueInterruptDelay[i]; /* default 0; no interrupt delay */
135     QueueConfig->outboundQueues[i].interruptCount = tdsaAllShared->OutboundQueueInterruptCount[i]; /* default 1*/
136     QueueConfig->outboundQueues[i].interruptVectorIndex = 0;
137   }
138 
139   /*
140     hardcoded Queue numbers
141   */
142   QueueConfig->sasHwEventQueue = 0;
143   QueueConfig->sataNCQErrorEventQueue = 0;
144   SwConfig.sizefEventLog1 = HOST_EVENT_LOG_SIZE;
145   SwConfig.sizefEventLog2 = HOST_EVENT_LOG_SIZE;
146   SwConfig.eventLog1Option = 0;
147   SwConfig.eventLog2Option = 0;
148   SwConfig.fatalErrorInterrtuptEnable = 1;
149   SwConfig.fatalErrorInterruptVector = 1;
150   SwConfig.reserved = 0;
151 
152 
153   SwConfig.param3 = (void *)&(tdsaAllShared->QueueConfig);
154   /* to find out memRequirement */
155   saGetRequirements(&agRoot, &SwConfig, &memRequirement, &usecsPerTick, &maxSALocks);
156 
157   /* initializes tdsaEsglAllInfo_t */
158   pEsglAllInfo->physAddrUpper = tdsaAllShared->loResource.loLevelMem.mem[memRequirement.count].physAddrUpper;
159   pEsglAllInfo->physAddrLower = tdsaAllShared->loResource.loLevelMem.mem[memRequirement.count].physAddrLower;
160   pEsglAllInfo->virtPtr       = tdsaAllShared->loResource.loLevelMem.mem[memRequirement.count].virtPtr;
161   pEsglAllInfo->NumEsglPages  = tdsaAllShared->loResource.loLevelMem.mem[memRequirement.count].numElements; /*   NUM_ESGL_PAGES;  number of esgl pages; configurable */
162   pEsglAllInfo->EsglPageSize  = tdsaAllShared->loResource.loLevelMem.mem[memRequirement.count].singleElementLength; /* sizeof(agsaEsgl_t) */
163   pEsglAllInfo->NumFreeEsglPages = pEsglAllInfo->NumEsglPages;
164   pEsglPagePool = pEsglAllInfo->EsglPagePool;
165 
166   TI_DBG6(("tdsaEsglInit: pEsglPagePool %p\n", pEsglPagePool));
167   TI_DBG6(("tdsaEsglInit: tdsaAllShared->loResource.loLevelMem.mem[18].singleElementLength %d\n", tdsaAllShared->loResource.loLevelMem.mem[18].singleElementLength));
168   TI_DBG6(("tdsaEsglInit: NumEsglPage %d EsglPageSize %d\n", pEsglAllInfo->NumEsglPages, pEsglAllInfo->EsglPageSize)); /* ?, 128 */
169   TI_DBG6(("tdsaEsglInit: NumFreeEsglPages %d\n", pEsglAllInfo->NumFreeEsglPages));
170   /* initialize the linked lists */
171   TDLIST_INIT_HDR(&pEsglAllInfo->freelist);
172 
173 
174   PageVirtAddr      = pEsglAllInfo->virtPtr;
175   PagePhysAddrUpper = pEsglAllInfo->physAddrUpper;
176   PagePhysAddrLower = pEsglAllInfo->physAddrLower;
177   PageSizeInBytes   = pEsglAllInfo->EsglPageSize;
178 
179   TI_DBG6(("tdsaEsglInit:  PageSizeInBytes 0x%x\n",  PageSizeInBytes));
180   for (pageno = 0 ; pageno < pEsglAllInfo->NumEsglPages ; pageno++)
181   {
182     pEsglPageInfo = &(pEsglPagePool->EsglPages[pageno]);
183     OSSA_WRITE_LE_32(agRoot, pEsglPageInfo, OSSA_OFFSET_OF(pEsglPageInfo, physAddressUpper), PagePhysAddrUpper);
184     OSSA_WRITE_LE_32(agRoot, pEsglPageInfo, OSSA_OFFSET_OF(pEsglPageInfo, physAddressLower), PagePhysAddrLower);
185     pEsglPageInfo->len = PageSizeInBytes;
186     /* for debugging onlye*/
187     pEsglPageInfo->id = pageno+123;
188     pEsglPageInfo->agEsgl = (agsaEsgl_t *)PageVirtAddr;
189 
190     /* for debugging only */
191     TI_DBG6(("tdsaEsglInit: index %d upper 0x%8x lower 0x%8x PageVirtAddr %p\n", pageno, PagePhysAddrUpper, PagePhysAddrLower, PageVirtAddr));
192 
193 
194     /* updates addresses */
195     prev_PagePhysAddrLower = PagePhysAddrLower;
196     PagePhysAddrLower += pEsglAllInfo->EsglPageSize;
197     /* if lower wraps around, increment upper */
198     if (PagePhysAddrLower <= prev_PagePhysAddrLower)
199     {
200       PagePhysAddrUpper++;
201     }
202 
203     if (pageno == pEsglAllInfo->NumEsglPages - 1) /* last page */
204     {
205       pEsglPageInfo->agEsgl->descriptor[MAX_ESGL_ENTRIES-1].len = 0;
206       /* set bit31 to zero */
207       CLEAR_ESGL_EXTEND(pEsglPageInfo->agEsgl->descriptor[MAX_ESGL_ENTRIES-1].extReserved);
208     }
209     else
210     {
211       /* first and so on */
212       pEsglPageInfo->agEsgl->descriptor[MAX_ESGL_ENTRIES-1].sgLower = PagePhysAddrLower;
213       pEsglPageInfo->agEsgl->descriptor[MAX_ESGL_ENTRIES-1].sgUpper = PagePhysAddrUpper;
214       pEsglPageInfo->agEsgl->descriptor[MAX_ESGL_ENTRIES-1].len = PageSizeInBytes; /* sizeof (agsaEsgl_t)*/
215       /* set bit31 to one */
216       SET_ESGL_EXTEND(pEsglPageInfo->agEsgl->descriptor[MAX_ESGL_ENTRIES-1].extReserved);
217     }
218 
219     TDLIST_INIT_ELEMENT(&pEsglPageInfo->tdlist);
220     tdsaSingleThreadedEnter(tiRoot, TD_ESGL_LOCK);
221     TDLIST_ENQUEUE_AT_TAIL(&pEsglPageInfo->tdlist, &pEsglAllInfo->freelist);
222     tdsaSingleThreadedLeave(tiRoot, TD_ESGL_LOCK);
223 
224     PageVirtAddr = (bit8 *)PageVirtAddr + PageSizeInBytes;
225   } /* end for */
226 
227 
228 
229 #ifdef TD_INTERNAL_DEBUG /* for debugging only, for keep now */
230   for (pageno = 0 ; pageno < pEsglAllInfo->NumEsglPages ; pageno++)
231   {
232     TI_DBG6(("tdsaEsglInit: index %d EsglPages %p\n", pageno, &pEsglPagePool->EsglPages[pageno]));
233     TI_DBG6(("tdsaEsglInit: nextupper 0x%8x nextlower 0x%8x\n", pEsglPagePool->EsglPages[pageno].agEsgl->nextPageUpper, pEsglPagePool->EsglPages[pageno].agEsgl->nextPageLower));
234   }
235   TI_DBG6(("tdsaEsglInit:  tdsaEsglPageInfo_t size %d 0x%x\n", sizeof(tdsaEsglPageInfo_t), sizeof(tdsaEsglPageInfo_t)));
236   TI_DBG6(("tdsaEsglInit: sizeof(SASG_DESCRIPTOR) %d 0x%x\n", sizeof(SASG_DESCRIPTOR), sizeof(SASG_DESCRIPTOR)));
237 #endif
238 
239   return;
240 }
241 
242 
243 /*****************************************************************************
244 *! \brief  tdsaGetEsglPages
245 *
246 *  Purpose: This function prepares linked list of ESGL pages from
247 *           the given scatter-gather list.
248 *
249 *  \param tiRoot:       Pointer to root data structure.
250 *  \param EsglListHdr:  pointer to list header where the list needs to be stored.
251 *  \param ptiSgl:       Pointer to scatter-gather list.
252 *  \param virtSgl:      virtual pointer to scatter-gather list.
253 *
254 *  \return None
255 *
256 *  \note -
257 *       1. If we are out of ESGL pages, then no pages will be added to the list
258 *          pointed to by EsglListHdr. The list should be empty before calling
259 *          this function, so that after returning from this function, the
260 *          function can check for the emptyness of the list and find out if
261 *          any pages were added or not.
262 *
263 *****************************************************************************/
264 osGLOBAL void
tdsaGetEsglPages(tiRoot_t * tiRoot,tdList_t * EsglListHdr,tiSgl_t * ptiSgl,tiSgl_t * virtSgl)265 tdsaGetEsglPages(
266                  tiRoot_t *tiRoot,
267                  tdList_t *EsglListHdr,
268                  tiSgl_t  *ptiSgl,
269                  tiSgl_t  *virtSgl
270                  )
271 {
272   tdsaRoot_t        *tdsaRoot        = (tdsaRoot_t *) tiRoot->tdData;
273   tdsaContext_t     *tdsaAllShared = (tdsaContext_t *)&tdsaRoot->tdsaAllShared;
274 
275   tdsaEsglAllInfo_t *pEsglAllInfo = &(tdsaAllShared->EsglAllInfo);
276   bit32 numSgElements = ptiSgl->len;
277   bit32 numEntriesPerPage = MAX_ESGL_ENTRIES;
278   bit32 numPagesRequired = ((numSgElements - 1) / numEntriesPerPage) + 1;
279   bit32 i, j;
280   tdList_t *tdlist_to_fill;
281   tdsaEsglPageInfo_t *page_to_fill;
282   tiSgl_t *tmp_tiSgl = (tiSgl_t *)virtSgl;
283   agsaSgl_t *pDesc;
284   agsaEsgl_t *agEsgl, *PrevagEsgl = agNULL;
285 
286   TI_DBG6(("tdsaGetEsglPages: start\n"));
287   TI_DBG6(("tdsaGetEsglPages: pEsglPagePool %p\n", pEsglAllInfo->EsglPagePool));
288   TI_DBG6(("tdsaGetEsglPages: &(pEsglAllInfo->freelist) %p\n", &pEsglAllInfo->freelist));
289   TI_DBG6(("tdsaGetEsglPages: numSgElements %d numEntriesPerPage %d\n", numSgElements, numEntriesPerPage)); /* ?,  10 */
290   TI_DBG6(("tdsaGetEsglPages: numPagesRequired %d NumFreeEsglPages %d\n", numPagesRequired, pEsglAllInfo->NumFreeEsglPages)); /* 1, 2 */
291   TI_DBG6(("tdsaGetEsglPages: free Pages %d\n", pEsglAllInfo->NumFreeEsglPages));
292 
293   if (numPagesRequired > pEsglAllInfo->NumFreeEsglPages)
294   {
295     TI_DBG1(("tdsaGetEsglPages:don't have enough freepages. required %d free %d\n", numPagesRequired, pEsglAllInfo->NumFreeEsglPages));
296     return;
297   }
298   tdsaSingleThreadedEnter(tiRoot, TD_ESGL_LOCK);
299   pEsglAllInfo->NumFreeEsglPages -= numPagesRequired;
300   tdsaSingleThreadedLeave(tiRoot, TD_ESGL_LOCK);
301 
302 
303 
304 #ifdef TD_INTERNAL_DEBUG  /* for debugging only */
305   for (i=0; i < 2; i++)
306   {
307     /* remove one page from freelist */
308     tdsaSingleThreadedEnter(tiRoot, TD_ESGL_LOCK);
309     TDLIST_DEQUEUE_FROM_HEAD(&tdlist_to_fill, &pEsglAllInfo->freelist);
310     tdsaSingleThreadedLeave(tiRoot, TD_ESGL_LOCK);
311 
312     /* get the pointer to the page from list pointer */
313     page_to_fill = TDLIST_OBJECT_BASE(tdsaEsglPageInfo_t, tdlist, tdlist_to_fill);
314     /* for debugging */
315     TI_DBG6(("tdsaGetEsglPages:page ID %d\n", page_to_fill->id));
316     agEsgl = page_to_fill->agEsgl;
317 
318     pDesc = (SASG_DESCRIPTOR *)agEsgl;
319 
320     for (j=0; j <numEntriesPerPage; j++)
321     {
322       TI_DBG6(("tdsaGetEsglPages: lower %d  upper %d\n", pDesc->sgLower, pDesc->sgUpper));
323       TI_DBG6(("tdsaGetEsglPages: len %d\n", pDesc->len));
324       pDesc++;
325     }
326     TI_DBG6(("tdsaGetEsglPages: next lower %d next upper %d\n", agEsgl->nextPageLower, agEsgl->nextPageUpper));
327 
328   }
329 #endif /* for debugging only  */
330 
331   for (i = 0 ; i < numPagesRequired; i++)
332   {
333     /* remove one page from freelist */
334     tdsaSingleThreadedEnter(tiRoot, TD_ESGL_LOCK);
335     TDLIST_DEQUEUE_FROM_HEAD(&tdlist_to_fill, &pEsglAllInfo->freelist);
336     tdsaSingleThreadedLeave(tiRoot, TD_ESGL_LOCK);
337 
338     /* get the pointer to the page from list pointer */
339     page_to_fill = TDLIST_OBJECT_BASE(tdsaEsglPageInfo_t, tdlist, tdlist_to_fill);
340     /* for debugging */
341     TI_DBG6(("tdsaGetEsglPages:page ID %d\n", page_to_fill->id));
342 
343     agEsgl = page_to_fill->agEsgl;
344     pDesc = (agsaSgl_t *)agEsgl;
345 
346     /*
347       adjust next page's address in the followings so that
348       the last entry must be (0,0,0)
349     */
350     if (i == numPagesRequired - 1) /* only one page of last page */
351     {
352       for (j=0; j < numSgElements; j++)
353       {
354         OSSA_WRITE_LE_32(agRoot, pDesc, OSSA_OFFSET_OF(pDesc, sgLower), tmp_tiSgl->lower);
355         OSSA_WRITE_LE_32(agRoot, pDesc, OSSA_OFFSET_OF(pDesc, sgUpper), tmp_tiSgl->upper);
356         OSSA_WRITE_LE_32(agRoot, pDesc, OSSA_OFFSET_OF(pDesc, len), tmp_tiSgl->len);
357         CLEAR_ESGL_EXTEND(pDesc->extReserved);
358         pDesc++;
359         tmp_tiSgl++;
360       }
361       for (j=numSgElements; j < numEntriesPerPage; j++)
362       {
363         /* left over(unused) in the page */
364         pDesc->sgLower = 0x0;
365         pDesc->sgUpper = 0x0;
366         pDesc->len = 0x0;
367         CLEAR_ESGL_EXTEND(pDesc->extReserved);
368         pDesc++;
369       }
370     }
371     else
372     {
373       /* in case of muliple pages, first and later, except one page only or last page */
374       for (j=0; j <numEntriesPerPage - 1; j++) /* else */
375       {
376         /* do this till (last - 1) */
377         OSSA_WRITE_LE_32(agRoot, pDesc, OSSA_OFFSET_OF(pDesc, sgLower), tmp_tiSgl->lower);
378         OSSA_WRITE_LE_32(agRoot, pDesc, OSSA_OFFSET_OF(pDesc, sgUpper), tmp_tiSgl->upper);
379         OSSA_WRITE_LE_32(agRoot, pDesc, OSSA_OFFSET_OF(pDesc, len), tmp_tiSgl->len);
380         CLEAR_ESGL_EXTEND(pDesc->extReserved);
381         pDesc++;
382         tmp_tiSgl++;
383       }
384       numSgElements -= (numEntriesPerPage - 1);
385     }
386     if (PrevagEsgl != agNULL)
387     {
388       /* subsequent pages (second or later pages) */
389       PrevagEsgl->descriptor[MAX_ESGL_ENTRIES-1].sgLower = page_to_fill->physAddressLower;
390       PrevagEsgl->descriptor[MAX_ESGL_ENTRIES-1].sgUpper = page_to_fill->physAddressUpper;
391       PrevagEsgl->descriptor[MAX_ESGL_ENTRIES-1].len = numSgElements;
392       /* set bit31 to one */
393       SET_ESGL_EXTEND(PrevagEsgl->descriptor[MAX_ESGL_ENTRIES-1].extReserved);
394     }
395     PrevagEsgl = agEsgl;
396     /* put ESGL onto the EsglListHdr */
397     tdsaSingleThreadedEnter(tiRoot, TD_ESGL_LOCK);
398     TDLIST_ENQUEUE_AT_TAIL(tdlist_to_fill, EsglListHdr);
399     tdsaSingleThreadedLeave(tiRoot, TD_ESGL_LOCK);
400 
401 
402   } /* end for */
403   return;
404 }
405 
406 
407 /*****************************************************************************
408 *! \brief  tdsaFreeEsglPages
409 *
410 *  Purpose: This function frees the ESGL pages pointed to by EsglListHdr
411 *           and puts them back onto the free list.
412 *
413 *  \param  tiRoot:       Pointer to root data structure.
414 *  \param  EsglListHdr:  pointer to list header where the pages to be freed
415 *                        are stored.
416 *
417 *  \return:     None
418 *
419 *  \note -
420 *   1. This function removes all the pages from the list until the list
421 *      empty and chains them at the end of the free list.
422 *****************************************************************************/
423 osGLOBAL void
tdsaFreeEsglPages(tiRoot_t * tiRoot,tdList_t * EsglListHdr)424 tdsaFreeEsglPages(
425                   tiRoot_t *tiRoot,
426                   tdList_t *EsglListHdr
427                   )
428 {
429   tdsaRoot_t         *tdsaRoot        = (tdsaRoot_t *) tiRoot->tdData;
430   tdsaContext_t      *tdsaAllShared = (tdsaContext_t *)&tdsaRoot->tdsaAllShared;
431   tdsaEsglAllInfo_t  *pEsglAllInfo = (tdsaEsglAllInfo_t *)&(tdsaAllShared->EsglAllInfo);
432   tdList_t           *tdlist_to_free;
433 
434   TI_DBG6(("tdsaFreeEsglPages: start\n"));
435   if (tiRoot == agNULL)
436   {
437     TI_DBG1(("tdsaFreeEsglPages: tiRoot is NULL\n"));
438     return;
439   }
440 
441   if (EsglListHdr == agNULL)
442   {
443     TI_DBG1(("tdsaFreeEsglPages: EsglListHdr is NULL\n"));
444     return;
445   }
446 
447   TI_DBG6(("tdsaFreeEsglPages: EsglListHdr %p\n", EsglListHdr));
448   tdsaSingleThreadedEnter(tiRoot, TD_ESGL_LOCK);
449   while (TDLIST_NOT_EMPTY(EsglListHdr))
450   {
451     TDLIST_DEQUEUE_FROM_HEAD(&tdlist_to_free, EsglListHdr);
452     TDLIST_ENQUEUE_AT_TAIL(tdlist_to_free, &pEsglAllInfo->freelist);
453     pEsglAllInfo->NumFreeEsglPages++;
454   }
455   tdsaSingleThreadedLeave(tiRoot, TD_ESGL_LOCK);
456   TI_DBG6(("tdsaFreeEsglPages: NumFreeEsglPages  %d\n", pEsglAllInfo->NumFreeEsglPages));
457   return;
458 }
459 
460 
461 /*****************************************************************************
462 *! \brief  tdsaGetEsglPagesInfo
463 *
464 *  Purpose: This function gets the information about the size of ESGL pages
465 *           and number pages to be configured.
466 *
467 *  \param tiRoot:     Pointer to root data structure.
468 *  \param pPageSize:  pointer to bit32 where pagesize information is to be
469 *                     stored
470 *  \param pNumPages:  Pointer to bit32 where number of pages information is
471 *                     to be stored
472 *
473 *  \return:     None
474 *
475 *  \note -
476 *
477 *****************************************************************************/
478 osGLOBAL void
tdsaGetEsglPagesInfo(tiRoot_t * tiRoot,bit32 * pPageSize,bit32 * pNumPages)479 tdsaGetEsglPagesInfo(
480                      tiRoot_t *tiRoot,
481                      bit32    *pPageSize,
482                      bit32    *pNumPages
483                      )
484 {
485   char    *buffer;
486   bit32   buffLen;
487   bit32   lenRecv = 0;
488   char    *pLastUsedChar = agNULL;
489   char    globalStr[]     = "Global";
490   char    SwParmsStr[]   = "ESGLParms";
491   char    tmpBuffer[DEFAULT_KEY_BUFFER_SIZE];
492   /* default value, defined in tdsatypes.h */
493   bit32   NumEsglPages = NUM_ESGL_PAGES;
494   TI_DBG6(("tdsaGetEsglPagesInfo: start \n"));
495 
496   /*
497     calls ostiGetTransportParam which parses the configuration file to get
498     parameters.
499   */
500 
501   buffer = tmpBuffer;
502   buffLen = sizeof(tmpBuffer);
503 
504   osti_memset(buffer, 0, buffLen);
505 
506 
507   if ((ostiGetTransportParam(
508                              tiRoot,
509                              globalStr,   /* key */
510                              SwParmsStr,  /* subkey1 */
511                              agNULL,      /* subkey2 */
512                              agNULL,
513                              agNULL,
514                              agNULL,      /* subkey5 */
515                              "NumESGLPg", /* valueName */
516                              buffer,
517                              buffLen,
518                              &lenRecv
519                              ) == tiSuccess) && (lenRecv != 0))
520   {
521 
522     NumEsglPages = osti_strtoul(buffer, &pLastUsedChar, 10);
523   }
524 
525   osti_memset(buffer, 0, buffLen);
526   lenRecv = 0;
527 
528   TI_DBG6(("tdsaGetEsglPagesInfo: esgl page number %d\n",NumEsglPages));
529   *pPageSize = ESGL_PAGES_SIZE;/* sizeof(agsaEsgl_t); defined in tdsatypes.h */
530   *pNumPages = NumEsglPages;
531 
532   return;
533 }
534 #endif
535 
536 
537 
538 
539 
540 
541 
542 
543