xref: /freebsd/sys/dev/mvs/mvs_soc.c (revision ddd5b8e9b4d8957fce018c520657cdfa4ecffad3)
1 /*-
2  * Copyright (c) 2010 Alexander Motin <mav@FreeBSD.org>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer,
10  *    without modification, immediately at the beginning of the file.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  */
26 
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
29 
30 #include <sys/param.h>
31 #include <sys/module.h>
32 #include <sys/systm.h>
33 #include <sys/kernel.h>
34 #include <sys/bus.h>
35 #include <sys/endian.h>
36 #include <sys/malloc.h>
37 #include <sys/lock.h>
38 #include <sys/mutex.h>
39 #include <vm/uma.h>
40 #include <machine/stdarg.h>
41 #include <machine/resource.h>
42 #include <machine/bus.h>
43 #include <sys/rman.h>
44 #include <arm/mv/mvreg.h>
45 #include <arm/mv/mvvar.h>
46 #include <dev/ofw/ofw_bus.h>
47 #include <dev/ofw/ofw_bus_subr.h>
48 #include "mvs.h"
49 
50 /* local prototypes */
51 static int mvs_setup_interrupt(device_t dev);
52 static void mvs_intr(void *data);
53 static int mvs_suspend(device_t dev);
54 static int mvs_resume(device_t dev);
55 static int mvs_ctlr_setup(device_t dev);
56 
57 static struct {
58 	uint32_t	id;
59 	uint8_t		rev;
60 	const char	*name;
61 	int		ports;
62 	int		quirks;
63 } mvs_ids[] = {
64 	{MV_DEV_88F5182, 0x00,   "Marvell 88F5182",	2, MVS_Q_GENIIE|MVS_Q_SOC},
65 	{MV_DEV_88F6281, 0x00,   "Marvell 88F6281",	2, MVS_Q_GENIIE|MVS_Q_SOC},
66 	{MV_DEV_88F6282, 0x00,   "Marvell 88F6282",	2, MVS_Q_GENIIE|MVS_Q_SOC},
67 	{MV_DEV_MV78100, 0x00,   "Marvell MV78100",	2, MVS_Q_GENIIE|MVS_Q_SOC},
68 	{MV_DEV_MV78100_Z0, 0x00,"Marvell MV78100",	2, MVS_Q_GENIIE|MVS_Q_SOC},
69 	{0,              0x00,   NULL,			0, 0}
70 };
71 
72 static int
73 mvs_probe(device_t dev)
74 {
75 	char buf[64];
76 	int i;
77 	uint32_t devid, revid;
78 
79 	if (!ofw_bus_is_compatible(dev, "mrvl,sata"))
80 		return (ENXIO);
81 
82 	soc_id(&devid, &revid);
83 	for (i = 0; mvs_ids[i].id != 0; i++) {
84 		if (mvs_ids[i].id == devid &&
85 		    mvs_ids[i].rev <= revid) {
86 			snprintf(buf, sizeof(buf), "%s SATA controller",
87 			    mvs_ids[i].name);
88 			device_set_desc_copy(dev, buf);
89 			return (BUS_PROBE_VENDOR);
90 		}
91 	}
92 	return (ENXIO);
93 }
94 
95 static int
96 mvs_attach(device_t dev)
97 {
98 	struct mvs_controller *ctlr = device_get_softc(dev);
99 	device_t child;
100 	int	error, unit, i;
101 	uint32_t devid, revid;
102 
103 	soc_id(&devid, &revid);
104 	ctlr->dev = dev;
105 	i = 0;
106 	while (mvs_ids[i].id != 0 &&
107 	    (mvs_ids[i].id != devid ||
108 	     mvs_ids[i].rev > revid))
109 		i++;
110 	ctlr->channels = mvs_ids[i].ports;
111 	ctlr->quirks = mvs_ids[i].quirks;
112 	resource_int_value(device_get_name(dev),
113 	    device_get_unit(dev), "ccc", &ctlr->ccc);
114 	ctlr->cccc = 8;
115 	resource_int_value(device_get_name(dev),
116 	    device_get_unit(dev), "cccc", &ctlr->cccc);
117 	if (ctlr->ccc == 0 || ctlr->cccc == 0) {
118 		ctlr->ccc = 0;
119 		ctlr->cccc = 0;
120 	}
121 	if (ctlr->ccc > 100000)
122 		ctlr->ccc = 100000;
123 	device_printf(dev,
124 	    "Gen-%s, %d %sGbps ports, Port Multiplier %s%s\n",
125 	    ((ctlr->quirks & MVS_Q_GENI) ? "I" :
126 	     ((ctlr->quirks & MVS_Q_GENII) ? "II" : "IIe")),
127 	    ctlr->channels,
128 	    ((ctlr->quirks & MVS_Q_GENI) ? "1.5" : "3"),
129 	    ((ctlr->quirks & MVS_Q_GENI) ?
130 	    "not supported" : "supported"),
131 	    ((ctlr->quirks & MVS_Q_GENIIE) ?
132 	    " with FBS" : ""));
133 	mtx_init(&ctlr->mtx, "MVS controller lock", NULL, MTX_DEF);
134 	/* We should have a memory BAR(0). */
135 	ctlr->r_rid = 0;
136 	if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
137 	    &ctlr->r_rid, RF_ACTIVE)))
138 		return ENXIO;
139 	if (ATA_INL(ctlr->r_mem, PORT_BASE(0) + SATA_PHYCFG_OFS) != 0)
140 		ctlr->quirks |= MVS_Q_SOC65;
141 	/* Setup our own memory management for channels. */
142 	ctlr->sc_iomem.rm_start = rman_get_start(ctlr->r_mem);
143 	ctlr->sc_iomem.rm_end = rman_get_end(ctlr->r_mem);
144 	ctlr->sc_iomem.rm_type = RMAN_ARRAY;
145 	ctlr->sc_iomem.rm_descr = "I/O memory addresses";
146 	if ((error = rman_init(&ctlr->sc_iomem)) != 0) {
147 		bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem);
148 		return (error);
149 	}
150 	if ((error = rman_manage_region(&ctlr->sc_iomem,
151 	    rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) {
152 		bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem);
153 		rman_fini(&ctlr->sc_iomem);
154 		return (error);
155 	}
156 	mvs_ctlr_setup(dev);
157 	/* Setup interrupts. */
158 	if (mvs_setup_interrupt(dev)) {
159 		bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem);
160 		rman_fini(&ctlr->sc_iomem);
161 		return ENXIO;
162 	}
163 	/* Attach all channels on this controller */
164 	for (unit = 0; unit < ctlr->channels; unit++) {
165 		child = device_add_child(dev, "mvsch", -1);
166 		if (child == NULL)
167 			device_printf(dev, "failed to add channel device\n");
168 		else
169 			device_set_ivars(child, (void *)(intptr_t)unit);
170 	}
171 	bus_generic_attach(dev);
172 	return 0;
173 }
174 
175 static int
176 mvs_detach(device_t dev)
177 {
178 	struct mvs_controller *ctlr = device_get_softc(dev);
179 
180 	/* Detach & delete all children */
181 	device_delete_children(dev);
182 
183 	/* Free interrupt. */
184 	if (ctlr->irq.r_irq) {
185 		bus_teardown_intr(dev, ctlr->irq.r_irq,
186 		    ctlr->irq.handle);
187 		bus_release_resource(dev, SYS_RES_IRQ,
188 		    ctlr->irq.r_irq_rid, ctlr->irq.r_irq);
189 	}
190 	/* Free memory. */
191 	rman_fini(&ctlr->sc_iomem);
192 	if (ctlr->r_mem)
193 		bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem);
194 	mtx_destroy(&ctlr->mtx);
195 	return (0);
196 }
197 
198 static int
199 mvs_ctlr_setup(device_t dev)
200 {
201 	struct mvs_controller *ctlr = device_get_softc(dev);
202 	int ccc = ctlr->ccc, cccc = ctlr->cccc, ccim = 0;
203 
204 	/* Mask chip interrupts */
205 	ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, 0x00000000);
206 	/* Clear HC interrupts */
207 	ATA_OUTL(ctlr->r_mem, HC_IC, 0x00000000);
208 	/* Clear chip interrupts */
209 	ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIC, 0);
210 	/* Configure per-HC CCC */
211 	if (ccc && bootverbose) {
212 		device_printf(dev,
213 		    "CCC with %dus/%dcmd enabled\n",
214 		    ctlr->ccc, ctlr->cccc);
215 	}
216 	ccc *= 150;
217 	ATA_OUTL(ctlr->r_mem, HC_ICT, cccc);
218 	ATA_OUTL(ctlr->r_mem, HC_ITT, ccc);
219 	if (ccc)
220 		ccim |= IC_HC0_COAL_DONE;
221 	/* Enable chip interrupts */
222 	ctlr->gmim = ((ccc ? IC_HC0_COAL_DONE :
223 	    (IC_DONE_HC0 & CHIP_SOC_HC0_MASK(ctlr->channels))) |
224 	    (IC_ERR_HC0 & CHIP_SOC_HC0_MASK(ctlr->channels)));
225 	ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, ctlr->gmim | ctlr->pmim);
226 	return (0);
227 }
228 
229 static void
230 mvs_edma(device_t dev, device_t child, int mode)
231 {
232 	struct mvs_controller *ctlr = device_get_softc(dev);
233 	int unit = ((struct mvs_channel *)device_get_softc(child))->unit;
234 	int bit = IC_DONE_IRQ << (unit * 2);
235 
236 	if (ctlr->ccc == 0)
237 		return;
238 	/* CCC is not working for non-EDMA mode. Unmask device interrupts. */
239 	mtx_lock(&ctlr->mtx);
240 	if (mode == MVS_EDMA_OFF)
241 		ctlr->pmim |= bit;
242 	else
243 		ctlr->pmim &= ~bit;
244 	ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, ctlr->gmim | ctlr->pmim);
245 	mtx_unlock(&ctlr->mtx);
246 }
247 
248 static int
249 mvs_suspend(device_t dev)
250 {
251 	struct mvs_controller *ctlr = device_get_softc(dev);
252 
253 	bus_generic_suspend(dev);
254 	/* Mask chip interrupts */
255 	ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, 0x00000000);
256 	return 0;
257 }
258 
259 static int
260 mvs_resume(device_t dev)
261 {
262 
263 	mvs_ctlr_setup(dev);
264 	return (bus_generic_resume(dev));
265 }
266 
267 static int
268 mvs_setup_interrupt(device_t dev)
269 {
270 	struct mvs_controller *ctlr = device_get_softc(dev);
271 
272 	/* Allocate all IRQs. */
273 	ctlr->irq.r_irq_rid = 0;
274 	if (!(ctlr->irq.r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
275 	    &ctlr->irq.r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) {
276 		device_printf(dev, "unable to map interrupt\n");
277 		return (ENXIO);
278 	}
279 	if ((bus_setup_intr(dev, ctlr->irq.r_irq, ATA_INTR_FLAGS, NULL,
280 	    mvs_intr, ctlr, &ctlr->irq.handle))) {
281 		device_printf(dev, "unable to setup interrupt\n");
282 		bus_release_resource(dev, SYS_RES_IRQ,
283 		    ctlr->irq.r_irq_rid, ctlr->irq.r_irq);
284 		ctlr->irq.r_irq = 0;
285 		return (ENXIO);
286 	}
287 	return (0);
288 }
289 
290 /*
291  * Common case interrupt handler.
292  */
293 static void
294 mvs_intr(void *data)
295 {
296 	struct mvs_controller *ctlr = data;
297 	struct mvs_intr_arg arg;
298 	void (*function)(void *);
299 	int p, chan_num;
300 	u_int32_t ic, aic;
301 
302 	ic = ATA_INL(ctlr->r_mem, CHIP_SOC_MIC);
303 	if ((ic & IC_HC0) == 0)
304 		return;
305 
306 	/* Acknowledge interrupts of this HC. */
307 	aic = 0;
308 
309 	/* Processing interrupts from each initialized channel */
310 	for (chan_num = 0; chan_num < ctlr->channels; chan_num++) {
311 		if (ic & (IC_DONE_IRQ << (chan_num * 2)))
312 			aic |= HC_IC_DONE(chan_num) | HC_IC_DEV(chan_num);
313 	}
314 
315 	if (ic & IC_HC0_COAL_DONE)
316 		aic |= HC_IC_COAL;
317 	ATA_OUTL(ctlr->r_mem, HC_IC, ~aic);
318 
319 	/* Call per-port interrupt handler. */
320 	for (p = 0; p < ctlr->channels; p++) {
321 		arg.cause = ic & (IC_ERR_IRQ|IC_DONE_IRQ);
322 		if ((arg.cause != 0) &&
323 		    (function = ctlr->interrupt[p].function)) {
324 			arg.arg = ctlr->interrupt[p].argument;
325 			function(&arg);
326 		}
327 		ic >>= 2;
328 	}
329 }
330 
331 static struct resource *
332 mvs_alloc_resource(device_t dev, device_t child, int type, int *rid,
333 		       u_long start, u_long end, u_long count, u_int flags)
334 {
335 	struct mvs_controller *ctlr = device_get_softc(dev);
336 	int unit = ((struct mvs_channel *)device_get_softc(child))->unit;
337 	struct resource *res = NULL;
338 	int offset = PORT_BASE(unit & 0x03);
339 	long st;
340 
341 	switch (type) {
342 	case SYS_RES_MEMORY:
343 		st = rman_get_start(ctlr->r_mem);
344 		res = rman_reserve_resource(&ctlr->sc_iomem, st + offset,
345 		    st + offset + PORT_SIZE - 1, PORT_SIZE, RF_ACTIVE, child);
346 		if (res) {
347 			bus_space_handle_t bsh;
348 			bus_space_tag_t bst;
349 			bsh = rman_get_bushandle(ctlr->r_mem);
350 			bst = rman_get_bustag(ctlr->r_mem);
351 			bus_space_subregion(bst, bsh, offset, PORT_SIZE, &bsh);
352 			rman_set_bushandle(res, bsh);
353 			rman_set_bustag(res, bst);
354 		}
355 		break;
356 	case SYS_RES_IRQ:
357 		if (*rid == ATA_IRQ_RID)
358 			res = ctlr->irq.r_irq;
359 		break;
360 	}
361 	return (res);
362 }
363 
364 static int
365 mvs_release_resource(device_t dev, device_t child, int type, int rid,
366 			 struct resource *r)
367 {
368 
369 	switch (type) {
370 	case SYS_RES_MEMORY:
371 		rman_release_resource(r);
372 		return (0);
373 	case SYS_RES_IRQ:
374 		if (rid != ATA_IRQ_RID)
375 			return ENOENT;
376 		return (0);
377 	}
378 	return (EINVAL);
379 }
380 
381 static int
382 mvs_setup_intr(device_t dev, device_t child, struct resource *irq,
383 		   int flags, driver_filter_t *filter, driver_intr_t *function,
384 		   void *argument, void **cookiep)
385 {
386 	struct mvs_controller *ctlr = device_get_softc(dev);
387 	int unit = (intptr_t)device_get_ivars(child);
388 
389 	if (filter != NULL) {
390 		printf("mvs.c: we cannot use a filter here\n");
391 		return (EINVAL);
392 	}
393 	ctlr->interrupt[unit].function = function;
394 	ctlr->interrupt[unit].argument = argument;
395 	return (0);
396 }
397 
398 static int
399 mvs_teardown_intr(device_t dev, device_t child, struct resource *irq,
400 		      void *cookie)
401 {
402 	struct mvs_controller *ctlr = device_get_softc(dev);
403 	int unit = (intptr_t)device_get_ivars(child);
404 
405 	ctlr->interrupt[unit].function = NULL;
406 	ctlr->interrupt[unit].argument = NULL;
407 	return (0);
408 }
409 
410 static int
411 mvs_print_child(device_t dev, device_t child)
412 {
413 	int retval;
414 
415 	retval = bus_print_child_header(dev, child);
416 	retval += printf(" at channel %d",
417 	    (int)(intptr_t)device_get_ivars(child));
418 	retval += bus_print_child_footer(dev, child);
419 
420 	return (retval);
421 }
422 
423 static int
424 mvs_child_location_str(device_t dev, device_t child, char *buf,
425     size_t buflen)
426 {
427 
428 	snprintf(buf, buflen, "channel=%d",
429 	    (int)(intptr_t)device_get_ivars(child));
430 	return (0);
431 }
432 
433 static device_method_t mvs_methods[] = {
434 	DEVMETHOD(device_probe,     mvs_probe),
435 	DEVMETHOD(device_attach,    mvs_attach),
436 	DEVMETHOD(device_detach,    mvs_detach),
437 	DEVMETHOD(device_suspend,   mvs_suspend),
438 	DEVMETHOD(device_resume,    mvs_resume),
439 	DEVMETHOD(bus_print_child,  mvs_print_child),
440 	DEVMETHOD(bus_alloc_resource,       mvs_alloc_resource),
441 	DEVMETHOD(bus_release_resource,     mvs_release_resource),
442 	DEVMETHOD(bus_setup_intr,   mvs_setup_intr),
443 	DEVMETHOD(bus_teardown_intr,mvs_teardown_intr),
444 	DEVMETHOD(mvs_edma,         mvs_edma),
445 	DEVMETHOD(bus_child_location_str, mvs_child_location_str),
446 	{ 0, 0 }
447 };
448 static driver_t mvs_driver = {
449         "mvs",
450         mvs_methods,
451         sizeof(struct mvs_controller)
452 };
453 DRIVER_MODULE(mvs, simplebus, mvs_driver, mvs_devclass, 0, 0);
454 MODULE_VERSION(mvs, 1);
455 MODULE_DEPEND(mvs, cam, 1, 1, 1);
456