1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2010 Alexander Motin <mav@FreeBSD.org>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer,
12 * without modification, immediately at the beginning of the file.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #include <sys/param.h>
30 #include <sys/module.h>
31 #include <sys/systm.h>
32 #include <sys/kernel.h>
33 #include <sys/bus.h>
34 #include <sys/endian.h>
35 #include <sys/malloc.h>
36 #include <sys/lock.h>
37 #include <sys/mutex.h>
38 #include <vm/uma.h>
39 #include <machine/stdarg.h>
40 #include <machine/resource.h>
41 #include <machine/bus.h>
42 #include <sys/rman.h>
43 #include <sys/sbuf.h>
44 #include <arm/mv/mvreg.h>
45 #include <arm/mv/mvvar.h>
46 #include <dev/ofw/ofw_bus.h>
47 #include <dev/ofw/ofw_bus_subr.h>
48 #include "mvs.h"
49
50 /* local prototypes */
51 static int mvs_setup_interrupt(device_t dev);
52 static void mvs_intr(void *data);
53 static int mvs_suspend(device_t dev);
54 static int mvs_resume(device_t dev);
55 static int mvs_ctlr_setup(device_t dev);
56
57 static struct {
58 uint32_t id;
59 uint8_t rev;
60 const char *name;
61 int ports;
62 int quirks;
63 } mvs_ids[] = {
64 {MV_DEV_88F5182, 0x00, "Marvell 88F5182", 2, MVS_Q_GENIIE|MVS_Q_SOC},
65 {MV_DEV_88F6281, 0x00, "Marvell 88F6281", 2, MVS_Q_GENIIE|MVS_Q_SOC},
66 {MV_DEV_88F6282, 0x00, "Marvell 88F6282", 2, MVS_Q_GENIIE|MVS_Q_SOC},
67 {MV_DEV_MV78100, 0x00, "Marvell MV78100", 2, MVS_Q_GENIIE|MVS_Q_SOC},
68 {MV_DEV_MV78100_Z0, 0x00,"Marvell MV78100", 2, MVS_Q_GENIIE|MVS_Q_SOC},
69 {MV_DEV_MV78260, 0x00, "Marvell MV78260", 2, MVS_Q_GENIIE|MVS_Q_SOC},
70 {MV_DEV_MV78460, 0x00, "Marvell MV78460", 2, MVS_Q_GENIIE|MVS_Q_SOC},
71 {0, 0x00, NULL, 0, 0}
72 };
73
74 static int
mvs_probe(device_t dev)75 mvs_probe(device_t dev)
76 {
77 int i;
78 uint32_t devid, revid;
79
80 if (!ofw_bus_status_okay(dev))
81 return (ENXIO);
82
83 if (!ofw_bus_is_compatible(dev, "mrvl,sata"))
84 return (ENXIO);
85
86 soc_id(&devid, &revid);
87 for (i = 0; mvs_ids[i].id != 0; i++) {
88 if (mvs_ids[i].id == devid &&
89 mvs_ids[i].rev <= revid) {
90 device_set_descf(dev, "%s SATA controller",
91 mvs_ids[i].name);
92 return (BUS_PROBE_DEFAULT);
93 }
94 }
95 return (ENXIO);
96 }
97
98 static int
mvs_attach(device_t dev)99 mvs_attach(device_t dev)
100 {
101 struct mvs_controller *ctlr = device_get_softc(dev);
102 device_t child;
103 int error, unit, i;
104 uint32_t devid, revid;
105
106 soc_id(&devid, &revid);
107 ctlr->dev = dev;
108 i = 0;
109 while (mvs_ids[i].id != 0 &&
110 (mvs_ids[i].id != devid ||
111 mvs_ids[i].rev > revid))
112 i++;
113 ctlr->channels = mvs_ids[i].ports;
114 ctlr->quirks = mvs_ids[i].quirks;
115 ctlr->ccc = 0;
116 resource_int_value(device_get_name(dev),
117 device_get_unit(dev), "ccc", &ctlr->ccc);
118 ctlr->cccc = 8;
119 resource_int_value(device_get_name(dev),
120 device_get_unit(dev), "cccc", &ctlr->cccc);
121 if (ctlr->ccc == 0 || ctlr->cccc == 0) {
122 ctlr->ccc = 0;
123 ctlr->cccc = 0;
124 }
125 if (ctlr->ccc > 100000)
126 ctlr->ccc = 100000;
127 device_printf(dev,
128 "Gen-%s, %d %sGbps ports, Port Multiplier %s%s\n",
129 ((ctlr->quirks & MVS_Q_GENI) ? "I" :
130 ((ctlr->quirks & MVS_Q_GENII) ? "II" : "IIe")),
131 ctlr->channels,
132 ((ctlr->quirks & MVS_Q_GENI) ? "1.5" : "3"),
133 ((ctlr->quirks & MVS_Q_GENI) ?
134 "not supported" : "supported"),
135 ((ctlr->quirks & MVS_Q_GENIIE) ?
136 " with FBS" : ""));
137 mtx_init(&ctlr->mtx, "MVS controller lock", NULL, MTX_DEF);
138 /* We should have a memory BAR(0). */
139 ctlr->r_rid = 0;
140 if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
141 &ctlr->r_rid, RF_ACTIVE)))
142 return ENXIO;
143 if (ATA_INL(ctlr->r_mem, PORT_BASE(0) + SATA_PHYCFG_OFS) != 0)
144 ctlr->quirks |= MVS_Q_SOC65;
145 /* Setup our own memory management for channels. */
146 ctlr->sc_iomem.rm_start = rman_get_start(ctlr->r_mem);
147 ctlr->sc_iomem.rm_end = rman_get_end(ctlr->r_mem);
148 ctlr->sc_iomem.rm_type = RMAN_ARRAY;
149 ctlr->sc_iomem.rm_descr = "I/O memory addresses";
150 if ((error = rman_init(&ctlr->sc_iomem)) != 0) {
151 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem);
152 return (error);
153 }
154 if ((error = rman_manage_region(&ctlr->sc_iomem,
155 rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) {
156 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem);
157 rman_fini(&ctlr->sc_iomem);
158 return (error);
159 }
160 mvs_ctlr_setup(dev);
161 /* Setup interrupts. */
162 if (mvs_setup_interrupt(dev)) {
163 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem);
164 rman_fini(&ctlr->sc_iomem);
165 return ENXIO;
166 }
167 /* Attach all channels on this controller */
168 for (unit = 0; unit < ctlr->channels; unit++) {
169 child = device_add_child(dev, "mvsch", DEVICE_UNIT_ANY);
170 if (child == NULL)
171 device_printf(dev, "failed to add channel device\n");
172 else
173 device_set_ivars(child, (void *)(intptr_t)unit);
174 }
175 bus_attach_children(dev);
176 return 0;
177 }
178
179 static int
mvs_detach(device_t dev)180 mvs_detach(device_t dev)
181 {
182 struct mvs_controller *ctlr = device_get_softc(dev);
183 int error;
184
185 /* Detach & delete all children */
186 error = bus_generic_detach(dev);
187 if (error != 0)
188 return (error);
189
190 /* Free interrupt. */
191 if (ctlr->irq.r_irq) {
192 bus_teardown_intr(dev, ctlr->irq.r_irq,
193 ctlr->irq.handle);
194 bus_release_resource(dev, SYS_RES_IRQ,
195 ctlr->irq.r_irq_rid, ctlr->irq.r_irq);
196 }
197 /* Free memory. */
198 rman_fini(&ctlr->sc_iomem);
199 if (ctlr->r_mem)
200 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem);
201 mtx_destroy(&ctlr->mtx);
202 return (0);
203 }
204
205 static int
mvs_ctlr_setup(device_t dev)206 mvs_ctlr_setup(device_t dev)
207 {
208 struct mvs_controller *ctlr = device_get_softc(dev);
209 int ccc = ctlr->ccc, cccc = ctlr->cccc;
210
211 /* Mask chip interrupts */
212 ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, 0x00000000);
213 /* Clear HC interrupts */
214 ATA_OUTL(ctlr->r_mem, HC_IC, 0x00000000);
215 /* Clear chip interrupts */
216 ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIC, 0);
217 /* Configure per-HC CCC */
218 if (ccc && bootverbose) {
219 device_printf(dev,
220 "CCC with %dus/%dcmd enabled\n",
221 ctlr->ccc, ctlr->cccc);
222 }
223 ccc *= 150;
224 ATA_OUTL(ctlr->r_mem, HC_ICT, cccc);
225 ATA_OUTL(ctlr->r_mem, HC_ITT, ccc);
226 /* Enable chip interrupts */
227 ctlr->gmim = ((ccc ? IC_HC0_COAL_DONE :
228 (IC_DONE_HC0 & CHIP_SOC_HC0_MASK(ctlr->channels))) |
229 (IC_ERR_HC0 & CHIP_SOC_HC0_MASK(ctlr->channels)));
230 ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, ctlr->gmim | ctlr->pmim);
231 return (0);
232 }
233
234 static void
mvs_edma(device_t dev,device_t child,int mode)235 mvs_edma(device_t dev, device_t child, int mode)
236 {
237 struct mvs_controller *ctlr = device_get_softc(dev);
238 int unit = ((struct mvs_channel *)device_get_softc(child))->unit;
239 int bit = IC_DONE_IRQ << (unit * 2);
240
241 if (ctlr->ccc == 0)
242 return;
243 /* CCC is not working for non-EDMA mode. Unmask device interrupts. */
244 mtx_lock(&ctlr->mtx);
245 if (mode == MVS_EDMA_OFF)
246 ctlr->pmim |= bit;
247 else
248 ctlr->pmim &= ~bit;
249 ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, ctlr->gmim | ctlr->pmim);
250 mtx_unlock(&ctlr->mtx);
251 }
252
253 static int
mvs_suspend(device_t dev)254 mvs_suspend(device_t dev)
255 {
256 struct mvs_controller *ctlr = device_get_softc(dev);
257
258 bus_generic_suspend(dev);
259 /* Mask chip interrupts */
260 ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, 0x00000000);
261 return 0;
262 }
263
264 static int
mvs_resume(device_t dev)265 mvs_resume(device_t dev)
266 {
267
268 mvs_ctlr_setup(dev);
269 return (bus_generic_resume(dev));
270 }
271
272 static int
mvs_setup_interrupt(device_t dev)273 mvs_setup_interrupt(device_t dev)
274 {
275 struct mvs_controller *ctlr = device_get_softc(dev);
276
277 /* Allocate all IRQs. */
278 ctlr->irq.r_irq_rid = 0;
279 if (!(ctlr->irq.r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
280 &ctlr->irq.r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) {
281 device_printf(dev, "unable to map interrupt\n");
282 return (ENXIO);
283 }
284 if ((bus_setup_intr(dev, ctlr->irq.r_irq, ATA_INTR_FLAGS, NULL,
285 mvs_intr, ctlr, &ctlr->irq.handle))) {
286 device_printf(dev, "unable to setup interrupt\n");
287 bus_release_resource(dev, SYS_RES_IRQ,
288 ctlr->irq.r_irq_rid, ctlr->irq.r_irq);
289 ctlr->irq.r_irq = NULL;
290 return (ENXIO);
291 }
292 return (0);
293 }
294
295 /*
296 * Common case interrupt handler.
297 */
298 static void
mvs_intr(void * data)299 mvs_intr(void *data)
300 {
301 struct mvs_controller *ctlr = data;
302 struct mvs_intr_arg arg;
303 void (*function)(void *);
304 int p, chan_num;
305 u_int32_t ic, aic;
306
307 ic = ATA_INL(ctlr->r_mem, CHIP_SOC_MIC);
308 if ((ic & IC_HC0) == 0)
309 return;
310
311 /* Acknowledge interrupts of this HC. */
312 aic = 0;
313
314 /* Processing interrupts from each initialized channel */
315 for (chan_num = 0; chan_num < ctlr->channels; chan_num++) {
316 if (ic & (IC_DONE_IRQ << (chan_num * 2)))
317 aic |= HC_IC_DONE(chan_num) | HC_IC_DEV(chan_num);
318 }
319
320 if (ic & IC_HC0_COAL_DONE)
321 aic |= HC_IC_COAL;
322 ATA_OUTL(ctlr->r_mem, HC_IC, ~aic);
323
324 /* Call per-port interrupt handler. */
325 for (p = 0; p < ctlr->channels; p++) {
326 arg.cause = ic & (IC_ERR_IRQ|IC_DONE_IRQ);
327 if ((arg.cause != 0) &&
328 (function = ctlr->interrupt[p].function)) {
329 arg.arg = ctlr->interrupt[p].argument;
330 function(&arg);
331 }
332 ic >>= 2;
333 }
334 }
335
336 static struct resource *
mvs_alloc_resource(device_t dev,device_t child,int type,int * rid,rman_res_t start,rman_res_t end,rman_res_t count,u_int flags)337 mvs_alloc_resource(device_t dev, device_t child, int type, int *rid,
338 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
339 {
340 struct mvs_controller *ctlr = device_get_softc(dev);
341 int unit = ((struct mvs_channel *)device_get_softc(child))->unit;
342 struct resource *res = NULL;
343 int offset = PORT_BASE(unit & 0x03);
344 rman_res_t st;
345
346 switch (type) {
347 case SYS_RES_MEMORY:
348 st = rman_get_start(ctlr->r_mem);
349 res = rman_reserve_resource(&ctlr->sc_iomem, st + offset,
350 st + offset + PORT_SIZE - 1, PORT_SIZE, RF_ACTIVE, child);
351 if (res) {
352 bus_space_handle_t bsh;
353 bus_space_tag_t bst;
354 bsh = rman_get_bushandle(ctlr->r_mem);
355 bst = rman_get_bustag(ctlr->r_mem);
356 bus_space_subregion(bst, bsh, offset, PORT_SIZE, &bsh);
357 rman_set_bushandle(res, bsh);
358 rman_set_bustag(res, bst);
359 }
360 break;
361 case SYS_RES_IRQ:
362 if (*rid == ATA_IRQ_RID)
363 res = ctlr->irq.r_irq;
364 break;
365 }
366 return (res);
367 }
368
369 static int
mvs_release_resource(device_t dev,device_t child,struct resource * r)370 mvs_release_resource(device_t dev, device_t child, struct resource *r)
371 {
372
373 switch (rman_get_type(r)) {
374 case SYS_RES_MEMORY:
375 rman_release_resource(r);
376 return (0);
377 case SYS_RES_IRQ:
378 if (rman_get_rid(r) != ATA_IRQ_RID)
379 return ENOENT;
380 return (0);
381 }
382 return (EINVAL);
383 }
384
385 static int
mvs_setup_intr(device_t dev,device_t child,struct resource * irq,int flags,driver_filter_t * filter,driver_intr_t * function,void * argument,void ** cookiep)386 mvs_setup_intr(device_t dev, device_t child, struct resource *irq,
387 int flags, driver_filter_t *filter, driver_intr_t *function,
388 void *argument, void **cookiep)
389 {
390 struct mvs_controller *ctlr = device_get_softc(dev);
391 int unit = (intptr_t)device_get_ivars(child);
392
393 if (filter != NULL) {
394 printf("mvs.c: we cannot use a filter here\n");
395 return (EINVAL);
396 }
397 ctlr->interrupt[unit].function = function;
398 ctlr->interrupt[unit].argument = argument;
399 return (0);
400 }
401
402 static int
mvs_teardown_intr(device_t dev,device_t child,struct resource * irq,void * cookie)403 mvs_teardown_intr(device_t dev, device_t child, struct resource *irq,
404 void *cookie)
405 {
406 struct mvs_controller *ctlr = device_get_softc(dev);
407 int unit = (intptr_t)device_get_ivars(child);
408
409 ctlr->interrupt[unit].function = NULL;
410 ctlr->interrupt[unit].argument = NULL;
411 return (0);
412 }
413
414 static int
mvs_print_child(device_t dev,device_t child)415 mvs_print_child(device_t dev, device_t child)
416 {
417 int retval;
418
419 retval = bus_print_child_header(dev, child);
420 retval += printf(" at channel %d",
421 (int)(intptr_t)device_get_ivars(child));
422 retval += bus_print_child_footer(dev, child);
423
424 return (retval);
425 }
426
427 static int
mvs_child_location(device_t dev,device_t child,struct sbuf * sb)428 mvs_child_location(device_t dev, device_t child, struct sbuf *sb)
429 {
430
431 sbuf_printf(sb, "channel=%d", (int)(intptr_t)device_get_ivars(child));
432 return (0);
433 }
434
435 static bus_dma_tag_t
mvs_get_dma_tag(device_t bus,device_t child)436 mvs_get_dma_tag(device_t bus, device_t child)
437 {
438
439 return (bus_get_dma_tag(bus));
440 }
441
442 static device_method_t mvs_methods[] = {
443 DEVMETHOD(device_probe, mvs_probe),
444 DEVMETHOD(device_attach, mvs_attach),
445 DEVMETHOD(device_detach, mvs_detach),
446 DEVMETHOD(device_suspend, mvs_suspend),
447 DEVMETHOD(device_resume, mvs_resume),
448 DEVMETHOD(bus_print_child, mvs_print_child),
449 DEVMETHOD(bus_alloc_resource, mvs_alloc_resource),
450 DEVMETHOD(bus_release_resource, mvs_release_resource),
451 DEVMETHOD(bus_setup_intr, mvs_setup_intr),
452 DEVMETHOD(bus_teardown_intr,mvs_teardown_intr),
453 DEVMETHOD(bus_child_location, mvs_child_location),
454 DEVMETHOD(bus_get_dma_tag, mvs_get_dma_tag),
455 DEVMETHOD(mvs_edma, mvs_edma),
456 { 0, 0 }
457 };
458 static driver_t mvs_driver = {
459 "mvs",
460 mvs_methods,
461 sizeof(struct mvs_controller)
462 };
463 DRIVER_MODULE(mvs, simplebus, mvs_driver, 0, 0);
464 MODULE_VERSION(mvs, 1);
465 MODULE_DEPEND(mvs, cam, 1, 1, 1);
466